1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 2 2; RUN: llc < %s -mcpu=cortex-a8 -arm-atomic-cfg-tidy=0 | FileCheck %s 3; ModuleID = 'bugpoint-reduced-simplified.bc' 4target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:64:128-a0:0:64-n32-S64" 5target triple = "armv7--linux-gnueabi" 6 7; CHECK-LABEL: function 8define void @function() { 9; CHECK-LABEL: function: 10; CHECK: @ %bb.0: @ %entry 11; CHECK-NEXT: mov r0, #0 12; CHECK-NEXT: cmp r0, #0 13; CHECK-NEXT: bxne lr 14; CHECK-NEXT: .LBB0_1: @ %vector.body 15; CHECK-NEXT: @ =>This Inner Loop Header: Depth=1 16; CHECK-NEXT: vld1.32 {d16, d17}, [r0] 17; CHECK-NEXT: adr r0, .LCPI0_0 18; CHECK-NEXT: vbic.i32 q8, #0xff 19; CHECK-NEXT: vld1.64 {d18, d19}, [r0:128] 20; CHECK-NEXT: vorr q8, q8, q9 21; CHECK-NEXT: vst1.32 {d16, d17}, [r0] 22; CHECK-NEXT: b .LBB0_1 23; CHECK-NEXT: .p2align 4 24; CHECK-NEXT: @ %bb.2: 25; CHECK-NEXT: .LCPI0_0: 26; CHECK-NEXT: .long 1 @ 0x1 27; CHECK-NEXT: .long 2 @ 0x2 28; CHECK-NEXT: .long 3 @ 0x3 29; CHECK-NEXT: .long 4 @ 0x4 30entry: 31 br i1 undef, label %vector.body, label %for.end 32 33vector.body: 34 %wide.load = load <4 x i32>, ptr undef, align 4 35 %0 = and <4 x i32> %wide.load, <i32 -16711936, i32 -16711936, i32 -16711936, i32 -16711936> 36 %1 = sub <4 x i32> %wide.load, zeroinitializer 37 %2 = and <4 x i32> %1, <i32 16711680, i32 16711680, i32 16711680, i32 16711680> 38 %3 = or <4 x i32> %0, <i32 1, i32 2, i32 3, i32 4> 39 %4 = or <4 x i32> %3, %2 40 store <4 x i32> %4, ptr undef, align 4 41 br label %vector.body 42 43for.end: 44 ret void 45} 46 47