xref: /llvm-project/llvm/test/CodeGen/ARM/2013-05-13-AAPCS-byval-padding.ll (revision 78ec2e2ed5e3dc61339b51f9d614029314a42005)
1;PR15293: ARM codegen ice - expected larger existing stack allocation
2;RUN: llc -mtriple=arm-linux-gnueabihf < %s | FileCheck %s
3
4%struct.S227 = type { [49 x i32], i32 }
5
6define void @check227(
7                      i32 %b,
8                      ptr byval(%struct.S227) nocapture %arg0,
9                      ptr %arg1) {
10; b --> R0
11; arg0 --> [R1, R2, R3, SP+0 .. SP+188)
12; arg1 --> SP+188
13
14entry:
15; CHECK: sub     sp, sp, #12
16; CHECK: stm     sp, {r1, r2, r3}
17; CHECK: ldr     r0, [sp, #200]
18; CHECK: add     sp, sp, #12
19; CHECK: b       useInt
20
21  %0 = ptrtoint ptr %arg1 to i32
22  tail call void @useInt(i32 %0)
23  ret void
24}
25
26declare void @useInt(i32)
27
28