xref: /llvm-project/llvm/test/CodeGen/AMDGPU/wwm-regalloc-error.ll (revision ac0f64f06d67a93817ccd9a3c529ad40920115c9)
1; RUN: not llc -mtriple=amdgcn-amd-amdhsa -mcpu=gfx900 -stress-regalloc=2 -filetype=null %s 2>&1 | FileCheck %s
2
3; A negative test to capture the expected error when the VGPRs are insufficient for wwm-regalloc.
4
5; CHECK: error: can't find enough VGPRs for wwm-regalloc
6
7define amdgpu_kernel void @test(i32 %in) {
8entry:
9  call void asm sideeffect "", "~{v[0:7]}" ()
10  call void asm sideeffect "", "~{v[8:15]}" ()
11  call void asm sideeffect "", "~{v[16:23]}" ()
12  call void asm sideeffect "", "~{v[24:31]}" ()
13  call void asm sideeffect "", "~{v[32:39]}" ()
14  call void asm sideeffect "", "~{v[40:47]}" ()
15  call void asm sideeffect "", "~{v[48:55]}" ()
16  call void asm sideeffect "", "~{v[56:63]}" ()
17  %val0 = call i32 asm sideeffect "; def $0", "=s" ()
18  %val1 = call i32 asm sideeffect "; def $0", "=s" ()
19  %val2 = call i32 asm sideeffect "; def $0", "=s" ()
20  %cmp = icmp eq i32 %in, 0
21  br i1 %cmp, label %bb0, label %ret
22bb0:
23  call void asm sideeffect "; use $0", "s"(i32 %val0)
24  call void asm sideeffect "; use $0", "s"(i32 %val1)
25  call void asm sideeffect "; use $0", "s"(i32 %val2)
26  br label %ret
27ret:
28  ret void
29}
30