xref: /llvm-project/llvm/test/CodeGen/AMDGPU/unhandled-loop-condition-assertion.ll (revision 9e9907f1cfa424366fba58d9520f9305b537cec9)
1; RUN: llc -O0 -verify-machineinstrs -asm-verbose=0 -mtriple=amdgcn < %s | FileCheck -check-prefix=SI -check-prefix=COMMON %s
2; RUN: llc -O0 -verify-machineinstrs -asm-verbose=0 -mtriple=amdgcn -mcpu=tonga < %s | FileCheck -check-prefix=SI -check-prefix=COMMON %s
3; XUN: llc -O0 -verify-machineinstrs -asm-verbose=0 -mtriple=r600 -mcpu=redwood < %s | FileCheck -check-prefix=EG -check-prefix=COMMON %s
4
5; SI hits an assertion at -O0, evergreen hits a not implemented unreachable.
6
7; COMMON-LABEL: {{^}}branch_true:
8define amdgpu_kernel void @branch_true(ptr addrspace(1) nocapture %main, i32 %main_stride) #0 {
9entry:
10  br i1 true, label %for.end, label %for.body.lr.ph
11
12for.body.lr.ph:                                   ; preds = %entry
13  %add.ptr.sum = shl i32 %main_stride, 1
14  %add.ptr1.sum = add i32 %add.ptr.sum, %main_stride
15  %add.ptr4.sum = shl i32 %main_stride, 2
16  br label %for.body
17
18for.body:                                         ; preds = %for.body, %for.body.lr.ph
19  %main.addr.011 = phi ptr addrspace(1) [ %main, %for.body.lr.ph ], [ %add.ptr6, %for.body ]
20  %0 = load i32, ptr addrspace(1) %main.addr.011, align 4
21  %add.ptr = getelementptr inbounds i8, ptr addrspace(1) %main.addr.011, i32 %main_stride
22  %1 = load i32, ptr addrspace(1) %add.ptr, align 4
23  %add.ptr1 = getelementptr inbounds i8, ptr addrspace(1) %main.addr.011, i32 %add.ptr.sum
24  %2 = load i32, ptr addrspace(1) %add.ptr1, align 4
25  %add.ptr2 = getelementptr inbounds i8, ptr addrspace(1) %main.addr.011, i32 %add.ptr1.sum
26  %3 = load i32, ptr addrspace(1) %add.ptr2, align 4
27  %add.ptr3 = getelementptr inbounds i8, ptr addrspace(1) %main.addr.011, i32 %add.ptr4.sum
28  %4 = load i32, ptr addrspace(1) %add.ptr3, align 4
29  %add.ptr6 = getelementptr inbounds i8, ptr addrspace(1) %main.addr.011, i32 undef
30  br i1 undef, label %for.end, label %for.body
31
32for.end:                                          ; preds = %for.body, %entry
33  ret void
34}
35
36; COMMON-LABEL: {{^}}branch_false:
37; SI: s_cbranch_scc1
38; SI: s_endpgm
39define amdgpu_kernel void @branch_false(ptr addrspace(1) nocapture %main, i32 %main_stride) #0 {
40entry:
41  br i1 false, label %for.end, label %for.body.lr.ph
42
43for.body.lr.ph:                                   ; preds = %entry
44  %add.ptr.sum = shl i32 %main_stride, 1
45  %add.ptr1.sum = add i32 %add.ptr.sum, %main_stride
46  %add.ptr4.sum = shl i32 %main_stride, 2
47  br label %for.body
48
49for.body:                                         ; preds = %for.body, %for.body.lr.ph
50  %main.addr.011 = phi ptr addrspace(1) [ %main, %for.body.lr.ph ], [ %add.ptr6, %for.body ]
51  %0 = load i32, ptr addrspace(1) %main.addr.011, align 4
52  %add.ptr = getelementptr inbounds i8, ptr addrspace(1) %main.addr.011, i32 %main_stride
53  %1 = load i32, ptr addrspace(1) %add.ptr, align 4
54  %add.ptr1 = getelementptr inbounds i8, ptr addrspace(1) %main.addr.011, i32 %add.ptr.sum
55  %2 = load i32, ptr addrspace(1) %add.ptr1, align 4
56  %add.ptr2 = getelementptr inbounds i8, ptr addrspace(1) %main.addr.011, i32 %add.ptr1.sum
57  %3 = load i32, ptr addrspace(1) %add.ptr2, align 4
58  %add.ptr3 = getelementptr inbounds i8, ptr addrspace(1) %main.addr.011, i32 %add.ptr4.sum
59  %4 = load i32, ptr addrspace(1) %add.ptr3, align 4
60  %add.ptr6 = getelementptr inbounds i8, ptr addrspace(1) %main.addr.011, i32 undef
61  br i1 undef, label %for.end, label %for.body
62
63for.end:                                          ; preds = %for.body, %entry
64  ret void
65}
66
67; COMMON-LABEL: {{^}}branch_undef:
68; SI: s_cbranch_scc1
69; SI: s_cbranch_scc1
70; SI: s_endpgm
71define amdgpu_kernel void @branch_undef(ptr addrspace(1) nocapture %main, i32 %main_stride) #0 {
72entry:
73  br i1 undef, label %for.end, label %for.body.lr.ph
74
75for.body.lr.ph:                                   ; preds = %entry
76  %add.ptr.sum = shl i32 %main_stride, 1
77  %add.ptr1.sum = add i32 %add.ptr.sum, %main_stride
78  %add.ptr4.sum = shl i32 %main_stride, 2
79  br label %for.body
80
81for.body:                                         ; preds = %for.body, %for.body.lr.ph
82  %main.addr.011 = phi ptr addrspace(1) [ %main, %for.body.lr.ph ], [ %add.ptr6, %for.body ]
83  %0 = load i32, ptr addrspace(1) %main.addr.011, align 4
84  %add.ptr = getelementptr inbounds i8, ptr addrspace(1) %main.addr.011, i32 %main_stride
85  %1 = load i32, ptr addrspace(1) %add.ptr, align 4
86  %add.ptr1 = getelementptr inbounds i8, ptr addrspace(1) %main.addr.011, i32 %add.ptr.sum
87  %2 = load i32, ptr addrspace(1) %add.ptr1, align 4
88  %add.ptr2 = getelementptr inbounds i8, ptr addrspace(1) %main.addr.011, i32 %add.ptr1.sum
89  %3 = load i32, ptr addrspace(1) %add.ptr2, align 4
90  %add.ptr3 = getelementptr inbounds i8, ptr addrspace(1) %main.addr.011, i32 %add.ptr4.sum
91  %4 = load i32, ptr addrspace(1) %add.ptr3, align 4
92  %add.ptr6 = getelementptr inbounds i8, ptr addrspace(1) %main.addr.011, i32 undef
93  br i1 undef, label %for.end, label %for.body
94
95for.end:                                          ; preds = %for.body, %entry
96  ret void
97}
98
99attributes #0 = { nounwind }
100