1; RUN: llc -global-isel=0 -mtriple=amdgcn--amdhsa -verify-machineinstrs < %s | FileCheck -check-prefix=GCN -check-prefix=HSA-TRAP %s 2; RUN: llc -global-isel=1 -mtriple=amdgcn--amdhsa -verify-machineinstrs < %s | FileCheck -check-prefix=GCN -check-prefix=HSA-TRAP %s 3 4; RUN: llc -global-isel=0 -mtriple=amdgcn--amdhsa -mattr=+trap-handler -verify-machineinstrs < %s | FileCheck -check-prefix=GCN -check-prefix=HSA-TRAP %s 5; RUN: llc -global-isel=1 -mtriple=amdgcn--amdhsa -mattr=+trap-handler -verify-machineinstrs < %s | FileCheck -check-prefix=GCN -check-prefix=HSA-TRAP %s 6; RUN: llc -global-isel=0 -mtriple=amdgcn--amdhsa -mattr=-trap-handler -verify-machineinstrs < %s | FileCheck -check-prefix=GCN -check-prefix=NO-HSA-TRAP %s 7; RUN: llc -global-isel=1 -mtriple=amdgcn--amdhsa -mattr=-trap-handler -verify-machineinstrs < %s | FileCheck -check-prefix=GCN -check-prefix=NO-HSA-TRAP %s 8; RUN: llc -global-isel=0 -mtriple=amdgcn--amdhsa -mattr=-trap-handler -verify-machineinstrs < %s 2>&1 | FileCheck -check-prefix=GCN -check-prefix=GCN-WARNING %s 9; RUN: llc -global-isel=1 -mtriple=amdgcn--amdhsa -mattr=-trap-handler -verify-machineinstrs < %s 2>&1 | FileCheck -check-prefix=GCN -check-prefix=GCN-WARNING %s 10 11; enable trap handler feature 12; RUN: llc -global-isel=0 -mtriple=amdgcn-unknown-mesa3d -mattr=+trap-handler -verify-machineinstrs < %s | FileCheck -check-prefix=GCN -check-prefix=NO-MESA-TRAP -check-prefix=TRAP-BIT -check-prefix=MESA-TRAP %s 13; RUN: llc -global-isel=1 -mtriple=amdgcn-unknown-mesa3d -mattr=+trap-handler -verify-machineinstrs < %s | FileCheck -check-prefix=GCN -check-prefix=NO-MESA-TRAP -check-prefix=TRAP-BIT -check-prefix=MESA-TRAP %s 14; RUN: llc -global-isel=0 -mtriple=amdgcn-unknown-mesa3d -mattr=+trap-handler -verify-machineinstrs < %s 2>&1 | FileCheck -check-prefix=GCN -check-prefix=GCN-WARNING -check-prefix=TRAP-BIT %s 15; RUN: llc -global-isel=1 -mtriple=amdgcn-unknown-mesa3d -mattr=+trap-handler -verify-machineinstrs < %s 2>&1 | FileCheck -check-prefix=GCN -check-prefix=GCN-WARNING -check-prefix=TRAP-BIT %s 16 17; disable trap handler feature 18; RUN: llc -global-isel=0 -mtriple=amdgcn-unknown-mesa3d -mattr=-trap-handler -verify-machineinstrs < %s | FileCheck -check-prefix=GCN -check-prefix=NO-MESA-TRAP -check-prefix=NO-TRAP-BIT -check-prefix=NOMESA-TRAP %s 19; RUN: llc -global-isel=1 -mtriple=amdgcn-unknown-mesa3d -mattr=-trap-handler -verify-machineinstrs < %s | FileCheck -check-prefix=GCN -check-prefix=NO-MESA-TRAP -check-prefix=NO-TRAP-BIT -check-prefix=NOMESA-TRAP %s 20; RUN: llc -global-isel=0 -mtriple=amdgcn-unknown-mesa3d -mattr=-trap-handler -verify-machineinstrs < %s 2>&1 | FileCheck -check-prefix=GCN -check-prefix=GCN-WARNING -check-prefix=NO-TRAP-BIT %s 21; RUN: llc -global-isel=1 -mtriple=amdgcn-unknown-mesa3d -mattr=-trap-handler -verify-machineinstrs < %s 2>&1 | FileCheck -check-prefix=GCN -check-prefix=GCN-WARNING -check-prefix=NO-TRAP-BIT %s 22 23; RUN: llc -global-isel=0 -mtriple=amdgcn -verify-machineinstrs < %s 2>&1 | FileCheck -check-prefix=GCN -check-prefix=GCN-WARNING %s 24; RUN: llc -global-isel=1 -mtriple=amdgcn -verify-machineinstrs < %s 2>&1 | FileCheck -check-prefix=GCN -check-prefix=GCN-WARNING %s 25 26; GCN-WARNING: warning: <unknown>:0:0: in function hsa_debugtrap void (ptr addrspace(1)): debugtrap handler not supported 27 28 29declare void @llvm.trap() #0 30declare void @llvm.debugtrap() #1 31 32; MESA-TRAP: .section .AMDGPU.config 33; MESA-TRAP: .long 47180 34; MESA-TRAP-NEXT: .long 5080 35 36; NOMESA-TRAP: .section .AMDGPU.config 37; NOMESA-TRAP: .long 47180 38; NOMESA-TRAP-NEXT: .long 5016 39 40; GCN-LABEL: {{^}}hsa_trap: 41; HSA-TRAP: s_mov_b64 s[0:1], s[6:7] 42; HSA-TRAP: s_trap 2 43; HSA-TRAP: COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0 44 45; for llvm.trap in hsa path without ABI, direct generate s_endpgm instruction without any warning information 46; NO-HSA-TRAP: s_endpgm 47; NO-HSA-TRAP: COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0 48 49; TRAP-BIT: enable_trap_handler = 1 50; NO-TRAP-BIT: enable_trap_handler = 0 51; NO-MESA-TRAP: s_endpgm 52define amdgpu_kernel void @hsa_trap(ptr addrspace(1) nocapture readonly %arg0) { 53 store volatile i32 1, ptr addrspace(1) %arg0 54 call void @llvm.trap() 55 unreachable 56 store volatile i32 2, ptr addrspace(1) %arg0 57 ret void 58} 59 60; MESA-TRAP: .section .AMDGPU.config 61; MESA-TRAP: .long 47180 62; MESA-TRAP-NEXT: .long 5080 63 64; NOMESA-TRAP: .section .AMDGPU.config 65; NOMESA-TRAP: .long 47180 66; NOMESA-TRAP-NEXT: .long 5016 67 68; GCN-LABEL: {{^}}hsa_debugtrap: 69; HSA-TRAP: s_trap 3 70; HSA-TRAP: flat_store_dword v[0:1], v3 71; HSA-TRAP: COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0 72 73; for llvm.debugtrap in non-hsa path without ABI, generate a warning and a s_endpgm instruction 74; NO-HSA-TRAP: s_endpgm 75 76; TRAP-BIT: enable_trap_handler = 1 77; NO-TRAP-BIT: enable_trap_handler = 0 78; NO-MESA-TRAP: s_endpgm 79define amdgpu_kernel void @hsa_debugtrap(ptr addrspace(1) nocapture readonly %arg0) { 80 store volatile i32 1, ptr addrspace(1) %arg0 81 call void @llvm.debugtrap() 82 store volatile i32 2, ptr addrspace(1) %arg0 83 ret void 84} 85 86; For non-HSA path 87; GCN-LABEL: {{^}}trap: 88; TRAP-BIT: enable_trap_handler = 1 89; NO-TRAP-BIT: enable_trap_handler = 0 90; NO-HSA-TRAP: s_endpgm 91; NO-MESA-TRAP: s_endpgm 92define amdgpu_kernel void @trap(ptr addrspace(1) nocapture readonly %arg0) { 93 store volatile i32 1, ptr addrspace(1) %arg0 94 call void @llvm.trap() 95 unreachable 96 store volatile i32 2, ptr addrspace(1) %arg0 97 ret void 98} 99 100; GCN-LABEL: {{^}}non_entry_trap: 101; TRAP-BIT: enable_trap_handler = 1 102; NO-TRAP-BIT: enable_trap_handler = 0 103 104; HSA-TRAP: BB{{[0-9]_[0-9]+}}: ; %trap 105; HSA-TRAP: s_mov_b64 s[0:1], s[6:7] 106; HSA-TRAP-NEXT: s_trap 2 107define amdgpu_kernel void @non_entry_trap(ptr addrspace(1) nocapture readonly %arg0) local_unnamed_addr { 108entry: 109 %tmp29 = load volatile i32, ptr addrspace(1) %arg0 110 %cmp = icmp eq i32 %tmp29, -1 111 br i1 %cmp, label %ret, label %trap 112 113trap: 114 call void @llvm.trap() 115 unreachable 116 117ret: 118 store volatile i32 3, ptr addrspace(1) %arg0 119 ret void 120} 121 122; GCN-LABEL: {{^}}non_entry_trap_no_unreachable: 123; TRAP-BIT: enable_trap_handler = 1 124; NO-TRAP-BIT: enable_trap_handler = 0 125 126; HSA-TRAP: BB{{[0-9]_[0-9]+}}: ; %trap 127; HSA-TRAP: s_mov_b64 s[0:1], s[6:7] 128; HSA-TRAP-NEXT: s_trap 2 129define amdgpu_kernel void @non_entry_trap_no_unreachable(ptr addrspace(1) nocapture readonly %arg0) local_unnamed_addr { 130entry: 131 %tmp29 = load volatile i32, ptr addrspace(1) %arg0 132 %cmp = icmp eq i32 %tmp29, -1 133 br i1 %cmp, label %ret, label %trap 134 135trap: 136 call void @llvm.trap() 137 store volatile i32 1234, ptr addrspace(3) null 138 br label %ret 139 140ret: 141 store volatile i32 3, ptr addrspace(1) %arg0 142 ret void 143} 144 145attributes #0 = { nounwind noreturn } 146attributes #1 = { nounwind } 147 148!llvm.module.flags = !{!0} 149!0 = !{i32 1, !"amdhsa_code_object_version", i32 400} 150