xref: /llvm-project/llvm/test/CodeGen/AMDGPU/token-factor-inline-limit-test.ll (revision 9e9907f1cfa424366fba58d9520f9305b537cec9)
1; RUN: llc -mtriple=amdgcn -mcpu=gfx900 -verify-machineinstrs < %s | FileCheck -enable-var-scope -check-prefixes=GCN,GCN-TFILD %s
2; RUN: llc -mtriple=amdgcn -mcpu=gfx900 -combiner-tokenfactor-inline-limit=7 -verify-machineinstrs < %s | FileCheck -enable-var-scope -check-prefixes=GCN,GCN-TFIL7 %s
3
4
5; GCN-LABEL: {{^}}token_factor_inline_limit_test:
6
7; GCN-TFLID: v_mov_b32_e32 [[REG7:v[0-9]+]], 7
8; GCN-TFLID: buffer_store_dword [[REG7]], {{.*$}}
9; GCN-TFILD: v_mov_b32_e32 [[REG8:v[0-9]+]], 8
10; GCN-TFILD: buffer_store_dword [[REG8]], {{.*}} offset:4
11; GCN-TFILD: v_mov_b32_e32 [[REG9:v[0-9]+]], 9
12; GCN-TFILD: buffer_store_dword [[REG9]], {{.*}} offset:8
13; GCN-TFILD: v_mov_b32_e32 [[REG10:v[0-9]+]], 10
14; GCN-TFILD: buffer_store_dword [[REG10]], {{.*}} offset:12
15; GCN-TFILD: v_mov_b32_e32 [[REG11:v[0-9]+]], 11
16; GCN-TFILD: buffer_store_dword [[REG11]], {{.*}} offset:16
17; GCN-TFILD: v_mov_b32_e32 [[REG12:v[0-9]+]], 12
18; GCN-TFILD: buffer_store_dword [[REG12]], {{.*}} offset:20
19; GCN-TFILD: v_mov_b32_e32 [[REG13:v[0-9]+]], 13
20; GCN-TFILD: buffer_store_dword [[REG13]], {{.*}} offset:24
21; GCN-TFILD: v_mov_b32_e32 [[REG14:v[0-9]+]], 14
22; GCN-TFILD: buffer_store_dword [[REG14]], {{.*}} offset:28
23; GCN-TFILD: v_mov_b32_e32 [[REG15:v[0-9]+]], 15
24; GCN-TFILD: buffer_store_dword [[REG15]], {{.*}} offset:32
25
26; GCN-TFIL7: v_mov_b32_e32 [[REG15:v[0-9]+]], 15
27; GCN-TFIL7: buffer_store_dword [[REG15]], {{.*}} offset:32
28; GCN-TFIL7: v_mov_b32_e32 [[REG14:v[0-9]+]], 14
29; GCN-TFIL7: buffer_store_dword [[REG14]], {{.*}} offset:28
30; GCN-TFIL7: v_mov_b32_e32 [[REG13:v[0-9]+]], 13
31; GCN-TFIL7: buffer_store_dword [[REG13]], {{.*}} offset:24
32; GCN-TFIL7: v_mov_b32_e32 [[REG12:v[0-9]+]], 12
33; GCN-TFIL7: buffer_store_dword [[REG12]], {{.*}} offset:20
34; GCN-TFIL7: v_mov_b32_e32 [[REG11:v[0-9]+]], 11
35; GCN-TFIL7: buffer_store_dword [[REG11]], {{.*}} offset:16
36; GCN-TFIL7: v_mov_b32_e32 [[REG10:v[0-9]+]], 10
37; GCN-TFIL7: buffer_store_dword [[REG10]], {{.*}} offset:12
38; GCN-TFIL7: v_mov_b32_e32 [[REG9:v[0-9]+]], 9
39; GCN-TFIL7: buffer_store_dword [[REG9]], {{.*}} offset:8
40; GCN-TFIL7: v_mov_b32_e32 [[REG8:v[0-9]+]], 8
41; GCN-TFIL7: buffer_store_dword [[REG8]], {{.*}} offset:4
42; GCN-TFLL7: v_mov_b32_e32 [[REG7:v[0-9]+]], 7
43; GCN-TFLL7: buffer_store_dword [[REG7]], {{.*$}}
44
45; GCN: s_getpc
46define void @token_factor_inline_limit_test() {
47entry:
48  call void @external_void_func_8xv5i32(
49      <5 x i32><i32 0, i32 0, i32 0, i32 0, i32 0>,
50      <5 x i32><i32 1, i32 1, i32 1, i32 1, i32 1>,
51      <5 x i32><i32 2, i32 2, i32 2, i32 2, i32 2>,
52      <5 x i32><i32 3, i32 3, i32 3, i32 3, i32 3>,
53      <5 x i32><i32 4, i32 4, i32 4, i32 4, i32 4>,
54      <5 x i32><i32 5, i32 5, i32 5, i32 5, i32 5>,
55      <5 x i32><i32 6, i32 7, i32 8, i32 9, i32 10>,
56      <5 x i32><i32 11, i32 12, i32 13, i32 14, i32 15>)
57  ret void
58}
59
60declare hidden void @external_void_func_8xv5i32(<5 x i32>, <5 x i32>, <5 x i32>, <5 x i32>,
61                                                <5 x i32>, <5 x i32>, <5 x i32>, <5 x i32>)
62