xref: /llvm-project/llvm/test/CodeGen/AMDGPU/switch-default-block-unreachable.ll (revision a3dfa4e08350b037659f9fa09eddedfe4b471296)
1; RUN: llc -mtriple=amdgcn-amd-amdhsa -mcpu=gfx908 -verify-machineinstrs -stop-after=amdgpu-isel -o - %s | FileCheck -check-prefix=GCN %s
2define void @test(i1 %c0) #1 {
3  ; Clean up the unreachable blocks introduced with LowerSwitch pass.
4  ; This test ensures that, in the pass flow, UnreachableBlockElim pass
5  ; follows the LowerSwitch. Otherwise, this testcase will crash
6  ; immediately after the instruction selection due to the incomplete
7  ; PHI node in an MBB whose incoming values were never codegenerated.
8  ;
9  ; GCN-LABEL: name: test
10  ; GCN: bb.{{[0-9]+}}.entry:
11  ; GCN: bb.{{[0-9]+}}.Flow1:
12  ; GCN: bb.{{[0-9]+}}.entry.true.blk:
13  ; GCN: bb.{{[0-9]+}}.entry.false.blk:
14  ; GCN: bb.{{[0-9]+}}.switch.blk:
15
16  ; GCN-NOT: bb.{{[0-9]+}}.preheader.blk
17  ; GCN-NOT: bb.{{[0-9]+}}.pre.false.blk:
18  ; GCN-NOT: bb.{{[0-9]+}}.unreach.blk:
19  ; GCN-NOT: PHI
20
21  ; GCN: bb.{{[0-9]+}}.Flow:
22  ; GCN: bb.{{[0-9]+}}.UnifiedReturnBlock:
23  entry:
24    %idx = tail call i32 @llvm.amdgcn.workitem.id.x() #0
25    br i1 %c0, label %entry.true.blk, label %entry.false.blk
26
27  entry.true.blk:                                   ; preds = %entry
28    %exit.cmp = icmp ult i32 %idx, 3
29    br i1 %exit.cmp, label %switch.blk, label %exit
30
31  entry.false.blk:                                  ; preds = %entry
32    unreachable
33
34  switch.blk:                                       ; preds = %entry.true.blk
35    switch i32 %idx, label %preheader.blk [
36      i32 0, label %exit
37      i32 1, label %exit
38      i32 2, label %exit
39    ]
40
41  preheader.blk:                                    ; preds = %switch.blk
42    %pre.exit = icmp ult i32 %idx, 5
43    br i1 %pre.exit, label %unreach.blk, label %pre.false.blk
44
45  pre.false.blk:                                    ; preds = %preheader.blk
46    %call.pre.false = tail call i32 @func(i32 %idx) #0
47    br label %unreach.blk
48
49  unreach.blk:                                      ; preds = %preheader.blk, %pre.false.blk
50    %phi.val = phi i32 [ %call.pre.false, %pre.false.blk ], [ undef, %preheader.blk ]
51    store i32 %phi.val, ptr undef
52    unreachable
53
54  exit:                                             ; preds = %switch.blk
55    ret void
56}
57
58declare i32 @llvm.amdgcn.workitem.id.x() #0
59declare i32 @func(i32)#0
60
61attributes #0 = { nounwind readnone }
62attributes #1 = { nounwind }
63