xref: /llvm-project/llvm/test/CodeGen/AMDGPU/si-annotate-cfg-loop-assert.ll (revision 6548b6354d1d990e1c98736f5e7c3de876bedc8e)
1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
2; RUN: llc -mtriple=amdgcn -mcpu=kaveri -verify-machineinstrs < %s | FileCheck %s
3
4define amdgpu_kernel void @test(i32 %arg, i32 %arg1) {
5; CHECK-LABEL: test:
6; CHECK:       ; %bb.0: ; %bb
7; CHECK-NEXT:    s_load_dwordx2 s[0:1], s[4:5], 0x9
8; CHECK-NEXT:    s_waitcnt lgkmcnt(0)
9; CHECK-NEXT:    s_cmp_eq_u32 s0, 0
10; CHECK-NEXT:    s_cselect_b64 s[2:3], -1, 0
11; CHECK-NEXT:    s_cmp_eq_u32 s1, 0
12; CHECK-NEXT:    s_cselect_b64 s[0:1], -1, 0
13; CHECK-NEXT:    s_or_b64 s[0:1], s[2:3], s[0:1]
14; CHECK-NEXT:    s_and_b64 vcc, exec, s[0:1]
15; CHECK-NEXT:    s_cbranch_vccnz .LBB0_3
16; CHECK-NEXT:  ; %bb.1: ; %bb9
17; CHECK-NEXT:    s_and_b64 vcc, exec, 0
18; CHECK-NEXT:  .LBB0_2: ; %bb10
19; CHECK-NEXT:    ; =>This Inner Loop Header: Depth=1
20; CHECK-NEXT:    s_mov_b64 vcc, vcc
21; CHECK-NEXT:    s_cbranch_vccz .LBB0_2
22; CHECK-NEXT:  .LBB0_3: ; %DummyReturnBlock
23; CHECK-NEXT:    s_endpgm
24bb:
25  %tmp = icmp ne i32 %arg, 0
26  %tmp7 = icmp ne i32 %arg1, 0
27  %tmp8 = and i1 %tmp, %tmp7
28  br i1 %tmp8, label %bb9, label %bb11
29
30bb9:                                              ; preds = %bb
31  br label %bb10
32
33bb10:                                             ; preds = %bb10, %bb9
34  br label %bb10
35
36bb11:                                             ; preds = %bb
37  ret void
38}
39