1; RUN: llc -mtriple=amdgcn -mcpu=tahiti -stop-after=instruction-select -verify-machineinstrs < %s | FileCheck -check-prefixes=GCN,GFX6 %s 2; RUN: llc -mtriple=amdgcn -mcpu=fiji -stop-after=instruction-select -verify-machineinstrs < %s | FileCheck -check-prefixes=GCN,GFX8PLUS %s 3; RUN: llc -mtriple=amdgcn -mcpu=gfx1010 -stop-after=instruction-select -verify-machineinstrs < %s | FileCheck -check-prefixes=GCN,GFX8PLUS %s 4; RUN: llc -mtriple=amdgcn -mcpu=gfx1100 -amdgpu-enable-vopd=0 -stop-after=instruction-select -verify-machineinstrs < %s | FileCheck -check-prefixes=GCN,GFX8PLUS %s 5 6; GCN-LABEL: name: s_shl_i32 7; GCN: S_LSHL_B32 8define amdgpu_kernel void @s_shl_i32(ptr addrspace(1) %out, i32 %lhs, i32 %rhs) { 9 %result = shl i32 %lhs, %rhs 10 store i32 %result, ptr addrspace(1) %out 11 ret void 12} 13 14; GCN-LABEL: name: v_shl_i32 15; GFX6: V_LSHL_B32_e32 16; GFX8PLUS: V_LSHLREV_B32_e32 17define amdgpu_kernel void @v_shl_i32(ptr addrspace(1) %out, ptr addrspace(1) %in) { 18 %tid = call i32 @llvm.amdgcn.workitem.id.x() 19 %b_ptr = getelementptr i32, ptr addrspace(1) %in, i32 %tid 20 %a = load i32, ptr addrspace(1) %in 21 %b = load i32, ptr addrspace(1) %b_ptr 22 %result = shl i32 %a, %b 23 store i32 %result, ptr addrspace(1) %out 24 ret void 25} 26 27; GCN-LABEL: name: s_lshr_i32 28; GCN: S_LSHR_B32 29define amdgpu_kernel void @s_lshr_i32(ptr addrspace(1) %out, i32 %lhs, i32 %rhs) { 30 %result = lshr i32 %lhs, %rhs 31 store i32 %result, ptr addrspace(1) %out 32 ret void 33} 34 35; GCN-LABEL: name: v_lshr_i32 36; GFX6: V_LSHR_B32_e32 37; GFX8PLUS: V_LSHRREV_B32_e64 38define amdgpu_kernel void @v_lshr_i32(ptr addrspace(1) %out, ptr addrspace(1) %in) { 39 %tid = call i32 @llvm.amdgcn.workitem.id.x() 40 %b_ptr = getelementptr i32, ptr addrspace(1) %in, i32 %tid 41 %a = load i32, ptr addrspace(1) %in 42 %b = load i32, ptr addrspace(1) %b_ptr 43 %result = lshr i32 %a, %b 44 store i32 %result, ptr addrspace(1) %out 45 ret void 46} 47 48; GCN-LABEL: name: s_ashr_i32 49; GCN: S_ASHR_I32 50define amdgpu_kernel void @s_ashr_i32(ptr addrspace(1) %out, i32 %lhs, i32 %rhs) #0 { 51 %result = ashr i32 %lhs, %rhs 52 store i32 %result, ptr addrspace(1) %out 53 ret void 54} 55 56; GCN-LABEL: name: v_ashr_i32 57; GFX6: V_ASHR_I32_e32 58; GFX8PLUS: V_ASHRREV_I32_e64 59define amdgpu_kernel void @v_ashr_i32(ptr addrspace(1) %out, ptr addrspace(1) %in) { 60 %tid = call i32 @llvm.amdgcn.workitem.id.x() 61 %b_ptr = getelementptr i32, ptr addrspace(1) %in, i32 %tid 62 %a = load i32, ptr addrspace(1) %in 63 %b = load i32, ptr addrspace(1) %b_ptr 64 %result = ashr i32 %a, %b 65 store i32 %result, ptr addrspace(1) %out 66 ret void 67} 68 69; GCN-LABEL: name: s_shl_i64 70; GCN: S_LSHL_B64 71define amdgpu_kernel void @s_shl_i64(ptr addrspace(1) %out, i64 %lhs, i64 %rhs) { 72 %result = shl i64 %lhs, %rhs 73 store i64 %result, ptr addrspace(1) %out 74 ret void 75} 76 77; GCN-LABEL: name: v_shl_i64 78; GFX6: V_LSHL_B64 79; GFX8: V_LSHLREV_B64 80define amdgpu_kernel void @v_shl_i64(ptr addrspace(1) %out, ptr addrspace(1) %in) { 81 %tid = call i32 @llvm.amdgcn.workitem.id.x() 82 %idx = zext i32 %tid to i64 83 %b_ptr = getelementptr i64, ptr addrspace(1) %in, i64 %idx 84 %a = load i64, ptr addrspace(1) %in 85 %b = load i64, ptr addrspace(1) %b_ptr 86 %result = shl i64 %a, %b 87 store i64 %result, ptr addrspace(1) %out 88 ret void 89} 90 91; GCN-LABEL: name: s_lshr_i64 92; GCN: S_LSHR_B64 93define amdgpu_kernel void @s_lshr_i64(ptr addrspace(1) %out, i64 %lhs, i64 %rhs) { 94 %result = lshr i64 %lhs, %rhs 95 store i64 %result, ptr addrspace(1) %out 96 ret void 97} 98 99; GCN-LABEL: name: v_lshr_i64 100; GFX6: V_LSHR_B64 101; GFX8: V_LSHRREV_B64 102define amdgpu_kernel void @v_lshr_i64(ptr addrspace(1) %out, ptr addrspace(1) %in) { 103 %tid = call i32 @llvm.amdgcn.workitem.id.x() 104 %idx = zext i32 %tid to i64 105 %b_ptr = getelementptr i64, ptr addrspace(1) %in, i64 %idx 106 %a = load i64, ptr addrspace(1) %in 107 %b = load i64, ptr addrspace(1) %b_ptr 108 %result = lshr i64 %a, %b 109 store i64 %result, ptr addrspace(1) %out 110 ret void 111} 112 113; GCN-LABEL: name: s_ashr_i64 114; GCN: S_ASHR_I64 115define amdgpu_kernel void @s_ashr_i64(ptr addrspace(1) %out, i64 %lhs, i64 %rhs) { 116 %result = ashr i64 %lhs, %rhs 117 store i64 %result, ptr addrspace(1) %out 118 ret void 119} 120 121; GCN-LABEL: name: v_ashr_i64 122; GFX6: V_ASHR_I64 123; GFX8: V_ASHRREV_I64 124define amdgpu_kernel void @v_ashr_i64(ptr addrspace(1) %out, ptr addrspace(1) %in) { 125 %tid = call i32 @llvm.amdgcn.workitem.id.x() 126 %idx = zext i32 %tid to i64 127 %b_ptr = getelementptr i64, ptr addrspace(1) %in, i64 %idx 128 %a = load i64, ptr addrspace(1) %in 129 %b = load i64, ptr addrspace(1) %b_ptr 130 %result = ashr i64 %a, %b 131 store i64 %result, ptr addrspace(1) %out 132 ret void 133} 134 135declare i32 @llvm.amdgcn.workitem.id.x() 136