xref: /llvm-project/llvm/test/CodeGen/AMDGPU/scratch-pointer-sink.ll (revision 256343a0e919bc09f65a8ee26751b561fa2dbfc1)
1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 3
2; RUN: llc -mtriple=amdgcn -mcpu=gfx1100 -verify-machineinstrs < %s | FileCheck %s -check-prefixes=GCN
3; RUN: llc -global-isel -mtriple=amdgcn -mcpu=gfx1100 -verify-machineinstrs < %s | FileCheck %s -check-prefixes=GISEL
4
5define amdgpu_gfx i32 @sink_scratch_pointer(ptr addrspace(5) %stack, i32 inreg %flag) {
6; GCN-LABEL: sink_scratch_pointer:
7; GCN:       ; %bb.0:
8; GCN-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
9; GCN-NEXT:    s_cmp_lg_u32 s4, 0
10; GCN-NEXT:    s_cbranch_scc0 .LBB0_2
11; GCN-NEXT:  ; %bb.1: ; %bb2
12; GCN-NEXT:    scratch_load_b32 v0, v0, off offset:-4
13; GCN-NEXT:    s_waitcnt vmcnt(0)
14; GCN-NEXT:    s_setpc_b64 s[30:31]
15; GCN-NEXT:  .LBB0_2: ; %bb1
16; GCN-NEXT:    v_mov_b32_e32 v1, 1
17; GCN-NEXT:    scratch_store_b32 v0, v1, off offset:-4
18; GCN-NEXT:    v_mov_b32_e32 v0, 0
19; GCN-NEXT:    s_setpc_b64 s[30:31]
20;
21; GISEL-LABEL: sink_scratch_pointer:
22; GISEL:       ; %bb.0:
23; GISEL-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
24; GISEL-NEXT:    s_cmp_lg_u32 s4, 0
25; GISEL-NEXT:    s_cbranch_scc0 .LBB0_2
26; GISEL-NEXT:  ; %bb.1: ; %bb2
27; GISEL-NEXT:    scratch_load_b32 v0, v0, off offset:-4
28; GISEL-NEXT:    s_waitcnt vmcnt(0)
29; GISEL-NEXT:    s_setpc_b64 s[30:31]
30; GISEL-NEXT:  .LBB0_2: ; %bb1
31; GISEL-NEXT:    v_mov_b32_e32 v1, 1
32; GISEL-NEXT:    scratch_store_b32 v0, v1, off offset:-4
33; GISEL-NEXT:    v_mov_b32_e32 v0, 0
34; GISEL-NEXT:    s_setpc_b64 s[30:31]
35  %ptr = getelementptr inbounds i32, ptr addrspace(5) %stack, i32 -1
36  %cond = icmp eq i32 %flag, 0
37  br i1 %cond, label %bb1, label %bb2
38
39bb1:
40  store i32 1, ptr addrspace(5) %ptr, align 4
41  ret i32 0
42
43bb2:
44  %value = load i32, ptr addrspace(5) %ptr, align 4
45  ret i32 %value
46}
47