1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 3 2; RUN: llc -mtriple=amdgcn -mcpu=gfx1100 -o - < %s | FileCheck --check-prefixes=CHECK %s 3 4define amdgpu_gfx void @example(<4 x i32> inreg %rsrc, ptr addrspace(5) %src, i32 %dst) { 5; CHECK-LABEL: example: 6; CHECK: ; %bb.0: 7; CHECK-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) 8; CHECK-NEXT: v_add_nc_u32_e32 v3, 4, v0 9; CHECK-NEXT: s_clause 0x1 10; CHECK-NEXT: scratch_load_b32 v2, v0, off 11; CHECK-NEXT: scratch_load_b32 v3, v3, off 12; CHECK-NEXT: s_waitcnt vmcnt(0) 13; CHECK-NEXT: buffer_store_b64 v[2:3], v1, s[4:7], 0 offen 14; CHECK-NEXT: s_setpc_b64 s[30:31] 15 16 %x0 = load i32, ptr addrspace(5) %src 17 call void @llvm.amdgcn.raw.buffer.store.i32(i32 %x0, <4 x i32> %rsrc, i32 %dst, i32 0, i32 0) 18 %src1 = getelementptr i8, ptr addrspace(5) %src, i32 4 19 %x1 = load i32, ptr addrspace(5) %src1 20 %dst1 = add i32 %dst, 4 21 call void @llvm.amdgcn.raw.buffer.store.i32(i32 %x1, <4 x i32> %rsrc, i32 %dst1, i32 0, i32 0) 22 ret void 23} 24 25declare void @llvm.amdgcn.raw.buffer.store.i32(i32, <4 x i32>, i32, i32, i32) 26