1; RUN: not llc -mtriple=amdgcn-amd-amdhsa -stress-regalloc=1 -vgpr-regalloc=greedy -filetype=null %s 2>&1 | FileCheck -check-prefixes=CHECK,GREEDY -implicit-check-not=error %s 2; RUN: not llc -mtriple=amdgcn-amd-amdhsa -stress-regalloc=1 -vgpr-regalloc=basic -filetype=null %s 2>&1 | FileCheck -implicit-check-not=error -check-prefixes=CHECK,BASIC %s 3; RUN: not llc -mtriple=amdgcn-amd-amdhsa -stress-regalloc=1 -vgpr-regalloc=fast -filetype=null %s 2>&1 | FileCheck -implicit-check-not=error -check-prefixes=CHECK,FAST %s 4; RUN: opt -passes=debugify -o %t.bc %s 5; RUN: not llc -mtriple=amdgcn-amd-amdhsa -stress-regalloc=1 -vgpr-regalloc=greedy -filetype=null %t.bc 2>&1 | FileCheck -implicit-check-not=error -check-prefixes=DBGINFO-CHECK,DBGINFO-GREEDY %s 6; RUN: not llc -mtriple=amdgcn-amd-amdhsa -stress-regalloc=1 -vgpr-regalloc=basic -filetype=null %t.bc 2>&1 | FileCheck -implicit-check-not=error -check-prefixes=DBGINFO-CHECK,DBGINFO-BASIC %s 7 8; FIXME: Asserts when using -O2 + -vgpr-regalloc=fast 9; RUN: not llc -mtriple=amdgcn-amd-amdhsa -mcpu=gfx908 -stress-regalloc=1 -O0 -filetype=null %t.bc 2>&1 | FileCheck -implicit-check-not=error -check-prefixes=DBGINFO-CHECK,DBGINFO-FAST %s 10 11; TODO: Should we fix emitting multiple errors sometimes in basic and fast? 12 13 14; CHECK: error: <unknown>:0:0: ran out of registers during register allocation in function 'ran_out_of_registers_general' 15 16; DBGINFO-GREEDY: error: {{.*}}:3:1: ran out of registers during register allocation in function 'ran_out_of_registers_general' 17 18; DBGINFO-BASIC: error: {{.*}}:1:1: ran out of registers during register allocation in function 'ran_out_of_registers_general' 19 20; DBGINFO-FAST: error: {{.*}}:3:1: ran out of registers during register allocation in function 'ran_out_of_registers_general' 21define i32 @ran_out_of_registers_general(ptr addrspace(1) %ptr) #0 { 22 %ld0 = load volatile i32, ptr addrspace(1) %ptr 23 %ld1 = load volatile i32, ptr addrspace(1) %ptr 24 %add = add i32 %ld0, %ld1 25 ret i32 %add 26} 27 28; CHECK: error: inline assembly requires more registers than available at line 23 29; DBGINFO-CHECK: error: inline assembly requires more registers than available at line 23 30define void @ran_out_of_registers_asm_def() #0 { 31 %asm = call { i32, i32 } asm sideeffect "; def $0 $1", "=v,=v"(), !srcloc !0 32 ret void 33} 34 35; CHECK: error: inline assembly requires more registers than available at line 23 36; DBGINFO-CHECK: error: inline assembly requires more registers than available at line 23 37define void @ran_out_of_registers_asm_use() #0 { 38 call void asm sideeffect "; def $0 $1", "v,v"(i32 0, i32 1), !srcloc !0 39 ret void 40} 41 42; Test error in anonymous function. 43 44; GREEDY: error: inline assembly requires more registers than available at line 23 45; BASIC: error: inline assembly requires more registers than available at line 23 46 47; FAST: error: <unknown>:0:0: ran out of registers during register allocation in function '@0' 48 49; DBGINFO-GREEDY: error: inline assembly requires more registers than available at line 23 50; DBGINFO-BASIC: error: inline assembly requires more registers than available at line 23 51 52; DBGINFO-FAST: error: {{.*}}:12:1: ran out of registers during register allocation in function '@0' 53define i32 @0(ptr addrspace(1) %ptr) #0 { 54 %asm = call { i32, i32 } asm sideeffect "; def $0 $1 use $2", "=v,=v,v"(ptr addrspace(1) %ptr), !srcloc !0 55 %elt0 = extractvalue { i32, i32 } %asm, 0 56 %elt1 = extractvalue { i32, i32 } %asm, 1 57 %add = add i32 %elt0, %elt1 58 ret i32 %add 59} 60 61attributes #0 = { "target-cpu"="gfx908" } 62 63!0 = !{i32 23} 64