1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py 2; RUN: llc -mtriple=amdgcn -mcpu=gfx900 -verify-machineinstrs < %s | FileCheck -check-prefix=GCN %s 3 4define amdgpu_kernel void @if_masked_1(i32 %arg, ptr addrspace(1) %p) { 5; GCN-LABEL: if_masked_1: 6; GCN: ; %bb.0: 7; GCN-NEXT: s_load_dword s2, s[4:5], 0x24 8; GCN-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x2c 9; GCN-NEXT: v_mov_b32_e32 v0, 0 10; GCN-NEXT: s_waitcnt lgkmcnt(0) 11; GCN-NEXT: s_bitcmp0_b32 s2, 0 12; GCN-NEXT: s_cselect_b32 s2, 22, 33 13; GCN-NEXT: v_mov_b32_e32 v1, s2 14; GCN-NEXT: global_store_dword v0, v1, s[0:1] 15; GCN-NEXT: s_endpgm 16 %and = and i32 %arg, 1 17 %cmp = icmp eq i32 %and, 0 18 %sel = select i1 %cmp, i32 22, i32 33 19 store i32 %sel, ptr addrspace(1) %p 20 ret void 21} 22 23define amdgpu_kernel void @if_masked_1024(i32 %arg, ptr addrspace(1) %p) { 24; GCN-LABEL: if_masked_1024: 25; GCN: ; %bb.0: 26; GCN-NEXT: s_load_dword s2, s[4:5], 0x24 27; GCN-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x2c 28; GCN-NEXT: v_mov_b32_e32 v0, 0 29; GCN-NEXT: s_waitcnt lgkmcnt(0) 30; GCN-NEXT: s_bitcmp0_b32 s2, 10 31; GCN-NEXT: s_cselect_b32 s2, 22, 33 32; GCN-NEXT: v_mov_b32_e32 v1, s2 33; GCN-NEXT: global_store_dword v0, v1, s[0:1] 34; GCN-NEXT: s_endpgm 35 %and = and i32 %arg, 1024 36 %cmp = icmp eq i32 %and, 0 37 %sel = select i1 %cmp, i32 22, i32 33 38 store i32 %sel, ptr addrspace(1) %p 39 ret void 40} 41 42define amdgpu_kernel void @if_masked_0x80000000(i32 %arg, ptr addrspace(1) %p) { 43; GCN-LABEL: if_masked_0x80000000: 44; GCN: ; %bb.0: 45; GCN-NEXT: s_load_dword s2, s[4:5], 0x24 46; GCN-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x2c 47; GCN-NEXT: v_mov_b32_e32 v0, 0 48; GCN-NEXT: s_waitcnt lgkmcnt(0) 49; GCN-NEXT: s_bitcmp0_b32 s2, 31 50; GCN-NEXT: s_cselect_b32 s2, 22, 33 51; GCN-NEXT: v_mov_b32_e32 v1, s2 52; GCN-NEXT: global_store_dword v0, v1, s[0:1] 53; GCN-NEXT: s_endpgm 54 %and = and i32 %arg, 2147483648 55 %cmp = icmp eq i32 %and, 0 56 %sel = select i1 %cmp, i32 22, i32 33 57 store i32 %sel, ptr addrspace(1) %p 58 ret void 59} 60 61; FIXME: this should result in "s_bitcmp0_b64 $arg, 63" or "s_bitcmp0_b32 $arg.sub1, 31" 62define amdgpu_kernel void @if_masked_0x8000000000000000(i64 %arg, ptr addrspace(1) %p) { 63; GCN-LABEL: if_masked_0x8000000000000000: 64; GCN: ; %bb.0: 65; GCN-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x24 66; GCN-NEXT: s_waitcnt lgkmcnt(0) 67; GCN-NEXT: s_mov_b32 s0, 0 68; GCN-NEXT: v_mov_b32_e32 v0, 0 69; GCN-NEXT: s_and_b32 s1, s1, 0x80000000 70; GCN-NEXT: s_cmp_eq_u64 s[0:1], 0 71; GCN-NEXT: s_cselect_b32 s0, 22, 33 72; GCN-NEXT: v_mov_b32_e32 v1, s0 73; GCN-NEXT: global_store_dword v0, v1, s[2:3] 74; GCN-NEXT: s_endpgm 75 %and = and i64 %arg, 9223372036854775808 76 %cmp = icmp eq i64 %and, 0 77 %sel = select i1 %cmp, i32 22, i32 33 78 store i32 %sel, ptr addrspace(1) %p 79 ret void 80} 81