1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 5 2 3; RUN: llc -mtriple=amdgcn-amd-amdhsa -mcpu=gfx1030 %s -o - | FileCheck %s 4 5; Testing codegen for memcpy with scalar reads. 6 7 8define void @memcpy_p1_p4_sz16_align_4_4(ptr addrspace(1) align 4 %dst, ptr addrspace(4) align 4 readonly inreg %src) { 9; CHECK-LABEL: memcpy_p1_p4_sz16_align_4_4: 10; CHECK: ; %bb.0: ; %entry 11; CHECK-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) 12; CHECK-NEXT: s_load_dwordx4 s[4:7], s[16:17], 0x0 13; CHECK-NEXT: s_waitcnt lgkmcnt(0) 14; CHECK-NEXT: v_mov_b32_e32 v2, s4 15; CHECK-NEXT: v_mov_b32_e32 v3, s5 16; CHECK-NEXT: v_mov_b32_e32 v4, s6 17; CHECK-NEXT: v_mov_b32_e32 v5, s7 18; CHECK-NEXT: global_store_dwordx4 v[0:1], v[2:5], off 19; CHECK-NEXT: s_setpc_b64 s[30:31] 20entry: 21 tail call void @llvm.memcpy.p1.p4.i64(ptr addrspace(1) noundef nonnull align 4 %dst, ptr addrspace(4) noundef nonnull align 4 %src, i64 16, i1 false) 22 ret void 23} 24 25define void @memcpy_p1_p4_sz31_align_4_4(ptr addrspace(1) align 4 %dst, ptr addrspace(4) align 4 readonly inreg %src) { 26; CHECK-LABEL: memcpy_p1_p4_sz31_align_4_4: 27; CHECK: ; %bb.0: ; %entry 28; CHECK-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) 29; CHECK-NEXT: s_load_dwordx4 s[4:7], s[16:17], 0x0 30; CHECK-NEXT: v_mov_b32_e32 v6, 0 31; CHECK-NEXT: s_waitcnt lgkmcnt(0) 32; CHECK-NEXT: v_mov_b32_e32 v2, s4 33; CHECK-NEXT: v_mov_b32_e32 v3, s5 34; CHECK-NEXT: v_mov_b32_e32 v4, s6 35; CHECK-NEXT: v_mov_b32_e32 v5, s7 36; CHECK-NEXT: global_store_dwordx4 v[0:1], v[2:5], off 37; CHECK-NEXT: global_load_dwordx4 v[2:5], v6, s[16:17] offset:15 38; CHECK-NEXT: s_waitcnt vmcnt(0) 39; CHECK-NEXT: global_store_dwordx4 v[0:1], v[2:5], off offset:15 40; CHECK-NEXT: s_setpc_b64 s[30:31] 41entry: 42 tail call void @llvm.memcpy.p1.p4.i64(ptr addrspace(1) noundef nonnull align 4 %dst, ptr addrspace(4) noundef nonnull align 4 %src, i64 31, i1 false) 43 ret void 44} 45 46define void @memcpy_p1_p4_sz32_align_4_4(ptr addrspace(1) align 4 %dst, ptr addrspace(4) align 4 readonly inreg %src) { 47; CHECK-LABEL: memcpy_p1_p4_sz32_align_4_4: 48; CHECK: ; %bb.0: ; %entry 49; CHECK-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) 50; CHECK-NEXT: s_load_dwordx8 s[4:11], s[16:17], 0x0 51; CHECK-NEXT: s_waitcnt lgkmcnt(0) 52; CHECK-NEXT: v_mov_b32_e32 v2, s4 53; CHECK-NEXT: v_mov_b32_e32 v3, s5 54; CHECK-NEXT: v_mov_b32_e32 v4, s6 55; CHECK-NEXT: v_mov_b32_e32 v5, s7 56; CHECK-NEXT: v_mov_b32_e32 v6, s8 57; CHECK-NEXT: v_mov_b32_e32 v7, s9 58; CHECK-NEXT: v_mov_b32_e32 v8, s10 59; CHECK-NEXT: v_mov_b32_e32 v9, s11 60; CHECK-NEXT: global_store_dwordx4 v[0:1], v[2:5], off 61; CHECK-NEXT: global_store_dwordx4 v[0:1], v[6:9], off offset:16 62; CHECK-NEXT: s_setpc_b64 s[30:31] 63entry: 64 tail call void @llvm.memcpy.p1.p4.i64(ptr addrspace(1) noundef nonnull align 4 %dst, ptr addrspace(4) noundef nonnull align 4 %src, i64 32, i1 false) 65 ret void 66} 67 68declare void @llvm.memcpy.p1.p4.i64(ptr addrspace(1) noalias nocapture writeonly, ptr addrspace(4) noalias nocapture readonly, i64, i1 immarg) #2 69 70attributes #0 = { nocallback nofree nounwind willreturn memory(argmem: readwrite) } 71 72