xref: /llvm-project/llvm/test/CodeGen/AMDGPU/lower-module-lds-zero-size-arr.ll (revision 2d7339ad24b41eb06c417f7067b9fbeb4fdb2e6b)
1; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --check-globals all --version 5
2; RUN: opt -S -mtriple=amdgcn-- -passes=amdgpu-lower-module-lds < %s | FileCheck %s
3
4; This is an extension and should be rejected by the front-end in most cases.
5; If it goes through, lower it as dynlds.
6
7@Var0 = linkonce_odr hidden local_unnamed_addr addrspace(3) global [0 x float] poison
8
9;.
10; CHECK: @llvm.amdgcn.kernelA.dynlds = external addrspace(3) global [0 x i8], align 4, !absolute_symbol [[META0:![0-9]+]]
11; CHECK: @llvm.amdgcn.dynlds.offset.table = internal addrspace(4) constant [1 x i32] [i32 ptrtoint (ptr addrspace(3) @llvm.amdgcn.kernelA.dynlds to i32)]
12;.
13define void @fn(float %val, i32 %idx) #0 {
14; CHECK-LABEL: define void @fn(
15; CHECK-SAME: float [[VAL:%.*]], i32 [[IDX:%.*]]) {
16; CHECK-NEXT:    [[TMP1:%.*]] = call i32 @llvm.amdgcn.lds.kernel.id()
17; CHECK-NEXT:    [[VAR0:%.*]] = getelementptr inbounds [1 x i32], ptr addrspace(4) @llvm.amdgcn.dynlds.offset.table, i32 0, i32 [[TMP1]]
18; CHECK-NEXT:    [[TMP2:%.*]] = load i32, ptr addrspace(4) [[VAR0]], align 4
19; CHECK-NEXT:    [[VAR01:%.*]] = inttoptr i32 [[TMP2]] to ptr addrspace(3)
20; CHECK-NEXT:    [[PTR:%.*]] = getelementptr i32, ptr addrspace(3) [[VAR01]], i32 [[IDX]]
21; CHECK-NEXT:    store float [[VAL]], ptr addrspace(3) [[PTR]], align 4
22; CHECK-NEXT:    ret void
23;
24  %ptr = getelementptr i32, ptr addrspace(3) @Var0, i32 %idx
25  store float %val, ptr addrspace(3) %ptr
26  ret void
27}
28
29define amdgpu_kernel void @kernelA(float %val, i32 %idx) #0 {
30; CHECK-LABEL: define amdgpu_kernel void @kernelA(
31; CHECK-SAME: float [[VAL:%.*]], i32 [[IDX:%.*]]) !llvm.amdgcn.lds.kernel.id [[META1:![0-9]+]] {
32; CHECK-NEXT:    call void @llvm.donothing() [ "ExplicitUse"(ptr addrspace(3) @llvm.amdgcn.kernelA.dynlds) ]
33; CHECK-NEXT:    tail call void @fn(float [[VAL]], i32 [[IDX]])
34; CHECK-NEXT:    ret void
35;
36  tail call void @fn(float %val, i32 %idx)
37  ret void
38}
39
40attributes #0 = { "amdgpu-no-lds-kernel-id" }
41
42;.
43; CHECK: attributes #[[ATTR0:[0-9]+]] = { nocallback nofree nosync nounwind willreturn memory(none) }
44; CHECK: attributes #[[ATTR1:[0-9]+]] = { nocallback nofree nosync nounwind speculatable willreturn memory(none) }
45;.
46; CHECK: [[META0]] = !{i32 0, i32 1}
47; CHECK: [[META1]] = !{i32 0}
48;.
49