xref: /llvm-project/llvm/test/CodeGen/AMDGPU/local-memory.ll (revision 9e9907f1cfa424366fba58d9520f9305b537cec9)
1; RUN: llc -mtriple=amdgcn -mcpu=verde -verify-machineinstrs < %s | FileCheck --check-prefixes=GCN,FUNC %s
2; RUN: llc -mtriple=amdgcn -mcpu=bonaire -verify-machineinstrs < %s | FileCheck --check-prefixes=GCN,FUNC %s
3; RUN: llc -mtriple=r600 -mcpu=redwood < %s | FileCheck -check-prefix=FUNC %s
4
5@local_memory.local_mem = internal unnamed_addr addrspace(3) global [128 x i32] undef, align 4
6
7@lds = addrspace(3) global [512 x i32] undef, align 4
8
9; On SI we need to make sure that the base offset is a register and
10; not an immediate.
11
12; FUNC-LABEL: {{^}}load_i32_local_const_ptr:
13; GCN: v_mov_b32_e32 v[[PTR:[0-9]+]], 0{{$}}
14; GCN: ds_read_b32 v{{[0-9]+}}, v[[PTR]] offset:4
15
16; R600: LDS_READ_RET
17define amdgpu_kernel void @load_i32_local_const_ptr(ptr addrspace(1) %out, ptr addrspace(3) %in) #0 {
18entry:
19  %tmp0 = getelementptr [512 x i32], ptr addrspace(3) @lds, i32 0, i32 1
20  %tmp1 = load i32, ptr addrspace(3) %tmp0
21  %tmp2 = getelementptr i32, ptr addrspace(1) %out, i32 1
22  store i32 %tmp1, ptr addrspace(1) %tmp2
23  ret void
24}
25
26; Test loading a i32 and v2i32 value from the same base pointer.
27; FUNC-LABEL: {{^}}load_i32_v2i32_local:
28; R600: LDS_READ_RET
29; R600: LDS_READ_RET
30; R600: LDS_READ_RET
31; GCN-DAG: ds_read_b32
32; GCN-DAG: ds_read2_b32
33define amdgpu_kernel void @load_i32_v2i32_local(ptr addrspace(1) %out, ptr addrspace(3) %in) #0 {
34  %scalar = load i32, ptr addrspace(3) %in
35  %vec_ptr = getelementptr <2 x i32>, ptr addrspace(3) %in, i32 2
36  %vec0 = load <2 x i32>, ptr addrspace(3) %vec_ptr, align 4
37  %vec1 = insertelement <2 x i32> <i32 0, i32 0>, i32 %scalar, i32 0
38  %vec = add <2 x i32> %vec0, %vec1
39  store <2 x i32> %vec, ptr addrspace(1) %out
40  ret void
41}
42
43attributes #0 = { nounwind }
44