1116c894dSMatt Arsenault; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py 2116c894dSMatt Arsenault; RUN: llc -mtriple=amdgcn-amd-amdhsa -mcpu=gfx900 -verify-machineinstrs < %s | FileCheck -enable-var-scope -check-prefix=GCN %s 3116c894dSMatt Arsenault 4116c894dSMatt Arsenaultdefine <2 x i32> @range_metata_sext_range_0_i24_i64_bitcast(ptr addrspace(1) %ptr) { 5116c894dSMatt Arsenault; GCN-LABEL: range_metata_sext_range_0_i24_i64_bitcast: 6116c894dSMatt Arsenault; GCN: ; %bb.0: 7116c894dSMatt Arsenault; GCN-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) 8116c894dSMatt Arsenault; GCN-NEXT: global_load_dwordx2 v[0:1], v[0:1], off glc 9116c894dSMatt Arsenault; GCN-NEXT: s_waitcnt vmcnt(0) 10116c894dSMatt Arsenault; GCN-NEXT: s_setpc_b64 s[30:31] 11*9deee6bfSNikita Popov %val = load volatile i64, ptr addrspace(1) %ptr, align 4, !range !0, !noundef !{} 12116c894dSMatt Arsenault %shl = shl i64 %val, 22 13116c894dSMatt Arsenault %ashr = ashr i64 %shl, 22 14116c894dSMatt Arsenault %cast = bitcast i64 %ashr to <2 x i32> 15116c894dSMatt Arsenault ret <2 x i32> %cast 16116c894dSMatt Arsenault} 17116c894dSMatt Arsenault 18116c894dSMatt Arsenaultdefine <2 x i32> @no_range_sext_range_0_i24_i64_bitcast(ptr addrspace(1) %ptr) { 19116c894dSMatt Arsenault; GCN-LABEL: no_range_sext_range_0_i24_i64_bitcast: 20116c894dSMatt Arsenault; GCN: ; %bb.0: 21116c894dSMatt Arsenault; GCN-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) 22116c894dSMatt Arsenault; GCN-NEXT: global_load_dwordx2 v[0:1], v[0:1], off glc 23116c894dSMatt Arsenault; GCN-NEXT: s_waitcnt vmcnt(0) 24116c894dSMatt Arsenault; GCN-NEXT: v_lshlrev_b64 v[0:1], 22, v[0:1] 25116c894dSMatt Arsenault; GCN-NEXT: v_ashrrev_i64 v[0:1], 22, v[0:1] 26116c894dSMatt Arsenault; GCN-NEXT: s_setpc_b64 s[30:31] 27116c894dSMatt Arsenault %val = load volatile i64, ptr addrspace(1) %ptr, align 4 28116c894dSMatt Arsenault %shl = shl i64 %val, 22 29116c894dSMatt Arsenault %ashr = ashr i64 %shl, 22 30116c894dSMatt Arsenault %cast = bitcast i64 %ashr to <2 x i32> 31116c894dSMatt Arsenault ret <2 x i32> %cast 32116c894dSMatt Arsenault} 33116c894dSMatt Arsenault 34116c894dSMatt Arsenault!0 = !{i64 0, i64 16777216} 35