1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py 2; RUN: llc -mtriple=amdgcn-amd-amdhsa -mcpu=gfx900 -verify-machineinstrs < %s | FileCheck -enable-var-scope -check-prefix=GCN %s 3 4define <2 x i32> @range_metata_sext_range_0_i24_i64_bitcast(ptr addrspace(1) %ptr) { 5; GCN-LABEL: range_metata_sext_range_0_i24_i64_bitcast: 6; GCN: ; %bb.0: 7; GCN-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) 8; GCN-NEXT: global_load_dwordx2 v[0:1], v[0:1], off glc 9; GCN-NEXT: s_waitcnt vmcnt(0) 10; GCN-NEXT: s_setpc_b64 s[30:31] 11 %val = load volatile i64, ptr addrspace(1) %ptr, align 4, !range !0, !noundef !{} 12 %shl = shl i64 %val, 22 13 %ashr = ashr i64 %shl, 22 14 %cast = bitcast i64 %ashr to <2 x i32> 15 ret <2 x i32> %cast 16} 17 18define <2 x i32> @no_range_sext_range_0_i24_i64_bitcast(ptr addrspace(1) %ptr) { 19; GCN-LABEL: no_range_sext_range_0_i24_i64_bitcast: 20; GCN: ; %bb.0: 21; GCN-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) 22; GCN-NEXT: global_load_dwordx2 v[0:1], v[0:1], off glc 23; GCN-NEXT: s_waitcnt vmcnt(0) 24; GCN-NEXT: v_lshlrev_b64 v[0:1], 22, v[0:1] 25; GCN-NEXT: v_ashrrev_i64 v[0:1], 22, v[0:1] 26; GCN-NEXT: s_setpc_b64 s[30:31] 27 %val = load volatile i64, ptr addrspace(1) %ptr, align 4 28 %shl = shl i64 %val, 22 29 %ashr = ashr i64 %shl, 22 30 %cast = bitcast i64 %ashr to <2 x i32> 31 ret <2 x i32> %cast 32} 33 34!0 = !{i64 0, i64 16777216} 35