xref: /llvm-project/llvm/test/CodeGen/AMDGPU/llvm.sin.ll (revision 9e9907f1cfa424366fba58d9520f9305b537cec9)
1; RUN: llc -mtriple=r600 -mcpu=redwood < %s | FileCheck -check-prefix=EG -check-prefix=FUNC %s
2; RUN: llc -mtriple=amdgcn -mcpu=kaveri -verify-machineinstrs < %s | FileCheck -check-prefixes=GCN,SICIVI,FUNC %s
3; RUN: llc -mtriple=amdgcn -mcpu=tahiti -verify-machineinstrs < %s | FileCheck -check-prefixes=GCN,SICIVI,FUNC %s
4; RUN: llc -mtriple=amdgcn -mcpu=fiji -verify-machineinstrs < %s | FileCheck -check-prefixes=GCN,SICIVI,FUNC %s
5; RUN: llc -mtriple=amdgcn -mcpu=gfx900 -verify-machineinstrs < %s | FileCheck -check-prefixes=GCN,GFX9,FUNC %s
6
7; FUNC-LABEL: sin_f32
8; EG: MULADD_IEEE *
9; EG: FRACT *
10; EG: ADD *
11; EG: SIN * T{{[0-9]+\.[XYZW], PV\.[XYZW]}}
12; EG-NOT: SIN
13
14; GCN: v_mul_f32
15; SICIVI: v_fract_f32
16; GFX9-NOT: v_fract_f32
17; GCN: v_sin_f32
18; GCN-NOT: v_sin_f32
19define amdgpu_kernel void @sin_f32(ptr addrspace(1) %out, float %x) #1 {
20   %sin = call float @llvm.sin.f32(float %x)
21   store float %sin, ptr addrspace(1) %out
22   ret void
23}
24
25; FUNC-LABEL: {{^}}safe_sin_3x_f32:
26; GCN: v_mul_f32
27; GCN: v_mul_f32
28; SICIVI: v_fract_f32
29; GFX9-NOT: v_fract_f32
30; GCN: v_sin_f32
31; GCN-NOT: v_sin_f32
32define amdgpu_kernel void @safe_sin_3x_f32(ptr addrspace(1) %out, float %x) #1 {
33  %y = fmul float 3.0, %x
34  %sin = call float @llvm.sin.f32(float %y)
35  store float %sin, ptr addrspace(1) %out
36  ret void
37}
38
39; FUNC-LABEL: {{^}}unsafe_sin_3x_f32:
40; GCN-NOT: v_add_f32
41; GCN: 0x3ef47644
42; GCN: v_mul_f32
43; SICIVI: v_fract_f32
44; GFX9-NOT: v_fract_f32
45; GCN: v_sin_f32
46; GCN-NOT: v_sin_f32
47define amdgpu_kernel void @unsafe_sin_3x_f32(ptr addrspace(1) %out, float %x) #2 {
48  %y = fmul float 3.0, %x
49  %sin = call float @llvm.sin.f32(float %y)
50  store float %sin, ptr addrspace(1) %out
51  ret void
52}
53
54; FUNC-LABEL: {{^}}fmf_sin_3x_f32:
55; GCN-NOT: v_add_f32
56; GCN: 0x3ef47644
57; GCN: v_mul_f32
58; SICIVI: v_fract_f32
59; GFX9-NOT: v_fract_f32
60; GCN: v_sin_f32
61; GCN-NOT: v_sin_f32
62define amdgpu_kernel void @fmf_sin_3x_f32(ptr addrspace(1) %out, float %x) #1 {
63  %y = fmul reassoc float 3.0, %x
64  %sin = call reassoc float @llvm.sin.f32(float %y)
65  store float %sin, ptr addrspace(1) %out
66  ret void
67}
68
69; FUNC-LABEL: {{^}}safe_sin_2x_f32:
70; GCN: v_add_f32
71; GCN: v_mul_f32
72; SICIVI: v_fract_f32
73; GFX9-NOT: v_fract_f32
74; GCN: v_sin_f32
75; GCN-NOT: v_sin_f32
76define amdgpu_kernel void @safe_sin_2x_f32(ptr addrspace(1) %out, float %x) #1 {
77  %y = fmul float 2.0, %x
78  %sin = call float @llvm.sin.f32(float %y)
79  store float %sin, ptr addrspace(1) %out
80  ret void
81}
82
83; FUNC-LABEL: {{^}}unsafe_sin_2x_f32:
84; GCN-NOT: v_add_f32
85; GCN: 0x3ea2f983
86; GCN: v_mul_f32
87; SICIVI: v_fract_f32
88; GFX9-NOT: v_fract_f32
89; GCN: v_sin_f32
90; GCN-NOT: v_sin_f32
91define amdgpu_kernel void @unsafe_sin_2x_f32(ptr addrspace(1) %out, float %x) #2 {
92  %y = fmul float 2.0, %x
93  %sin = call float @llvm.sin.f32(float %y)
94  store float %sin, ptr addrspace(1) %out
95  ret void
96}
97
98; FUNC-LABEL: {{^}}fmf_sin_2x_f32:
99; GCN-NOT: v_add_f32
100; GCN: 0x3ea2f983
101; GCN: v_mul_f32
102; SICIVI: v_fract_f32
103; GFX9-NOT: v_fract_f32
104; GCN: v_sin_f32
105; GCN-NOT: v_sin_f32
106define amdgpu_kernel void @fmf_sin_2x_f32(ptr addrspace(1) %out, float %x) #1 {
107  %y = fmul reassoc float 2.0, %x
108  %sin = call reassoc float @llvm.sin.f32(float %y)
109  store float %sin, ptr addrspace(1) %out
110  ret void
111}
112
113; FUNC-LABEL: {{^}}safe_sin_cancel_f32:
114; GCN: v_mul_f32
115; GCN: v_mul_f32
116; SICIVI: v_fract_f32
117; GFX9-NOT: v_fract_f32
118; GCN: v_sin_f32
119; GCN-NOT: v_sin_f32
120define amdgpu_kernel void @safe_sin_cancel_f32(ptr addrspace(1) %out, float %x) #1 {
121  %y = fmul float 0x401921FB60000000, %x
122  %sin = call float @llvm.sin.f32(float %y)
123  store float %sin, ptr addrspace(1) %out
124  ret void
125}
126
127; FUNC-LABEL: {{^}}unsafe_sin_cancel_f32:
128; GCN-NOT: v_add_f32
129; GCN-NOT: v_mul_f32
130; SICIVI: v_fract_f32
131; GFX9-NOT: v_fract_f32
132; GCN: v_sin_f32
133; GCN-NOT: v_sin_f32
134define amdgpu_kernel void @unsafe_sin_cancel_f32(ptr addrspace(1) %out, float %x) #2 {
135  %y = fmul float 0x401921FB60000000, %x
136  %sin = call float @llvm.sin.f32(float %y)
137  store float %sin, ptr addrspace(1) %out
138  ret void
139}
140
141; FUNC-LABEL: {{^}}fmf_sin_cancel_f32:
142; GCN-NOT: v_add_f32
143; GCN-NOT: v_mul_f32
144; SICIVI: v_fract_f32
145; GFX9-NOT: v_fract_f32
146; GCN: v_sin_f32
147; GCN-NOT: v_sin_f32
148define amdgpu_kernel void @fmf_sin_cancel_f32(ptr addrspace(1) %out, float %x) #1 {
149  %y = fmul reassoc float 0x401921FB60000000, %x
150  %sin = call reassoc float @llvm.sin.f32(float %y)
151  store float %sin, ptr addrspace(1) %out
152  ret void
153}
154
155; FUNC-LABEL: {{^}}sin_v4f32:
156; EG: SIN * T{{[0-9]+\.[XYZW], PV\.[XYZW]}}
157; EG: SIN * T{{[0-9]+\.[XYZW], PV\.[XYZW]}}
158; EG: SIN * T{{[0-9]+\.[XYZW], PV\.[XYZW]}}
159; EG: SIN * T{{[0-9]+\.[XYZW], PV\.[XYZW]}}
160; EG-NOT: SIN
161
162; GCN: v_sin_f32
163; GCN: v_sin_f32
164; GCN: v_sin_f32
165; GCN: v_sin_f32
166; GCN-NOT: v_sin_f32
167define amdgpu_kernel void @sin_v4f32(ptr addrspace(1) %out, <4 x float> %vx) #1 {
168   %sin = call <4 x float> @llvm.sin.v4f32( <4 x float> %vx)
169   store <4 x float> %sin, ptr addrspace(1) %out
170   ret void
171}
172
173declare float @llvm.sin.f32(float) #0
174declare <4 x float> @llvm.sin.v4f32(<4 x float>) #0
175
176attributes #0 = { nounwind readnone }
177attributes #1 = { nounwind "unsafe-fp-math"="false" }
178attributes #2 = { nounwind "unsafe-fp-math"="true" }
179