xref: /llvm-project/llvm/test/CodeGen/AMDGPU/llvm.log.ll (revision fd6f8b3ce33cc2cbe378f8f1b391f3f40fa7bd54) 
1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 2
2; RUN: llc -global-isel=0 -mtriple=amdgcn -mcpu=tahiti < %s | FileCheck -check-prefixes=GFX689,SI,GFX689-SDAG,SI-SDAG %s
3; RUN: llc -global-isel=1 -global-isel-abort=2 -mtriple=amdgcn -mcpu=tahiti < %s | FileCheck -check-prefixes=GFX689,SI,GFX689-GISEL,SI-GISEL %s
4; RUN: llc -global-isel=0 -mtriple=amdgcn -mcpu=tonga < %s | FileCheck  -check-prefixes=GFX689,VI,GFX689-SDAG,VI-SDAG %s
5; RUN: llc -global-isel=1 -global-isel-abort=2 -mtriple=amdgcn -mcpu=tonga < %s | FileCheck  -check-prefixes=GFX689,VI,GFX689-GISEL,VI-GISEL %s
6; RUN: llc -global-isel=0 -mtriple=amdgcn -mcpu=gfx900 < %s | FileCheck -check-prefixes=GFX689,GFX900,GFX689-SDAG,GFX900-SDAG %s
7; RUN: llc -global-isel=1 -global-isel-abort=2 -mtriple=amdgcn -mcpu=gfx900 < %s | FileCheck -check-prefixes=GFX689,GFX900,GFX689-GISEL,GFX900-GISEL %s
8; RUN: llc -global-isel=0 -mtriple=amdgcn -mcpu=gfx1100 < %s | FileCheck -check-prefixes=GFX1100,GFX1100-SDAG %s
9; RUN: llc -global-isel=1 -global-isel-abort=2 -mtriple=amdgcn -mcpu=gfx1100 < %s | FileCheck -check-prefixes=GFX1100,GFX1100-GISEL %s
10
11; RUN: llc -mtriple=r600 -mcpu=redwood < %s | FileCheck -check-prefix=R600 %s
12; RUN: llc -mtriple=r600 -mcpu=cayman < %s | FileCheck -check-prefix=CM %s
13
14define amdgpu_kernel void @s_log_f32(ptr addrspace(1) %out, float %in) {
15; SI-SDAG-LABEL: s_log_f32:
16; SI-SDAG:       ; %bb.0:
17; SI-SDAG-NEXT:    s_load_dword s0, s[4:5], 0xb
18; SI-SDAG-NEXT:    s_load_dwordx2 s[4:5], s[4:5], 0x9
19; SI-SDAG-NEXT:    v_mov_b32_e32 v0, 0x800000
20; SI-SDAG-NEXT:    s_mov_b32 s1, 0x3377d1cf
21; SI-SDAG-NEXT:    s_mov_b32 s7, 0xf000
22; SI-SDAG-NEXT:    s_waitcnt lgkmcnt(0)
23; SI-SDAG-NEXT:    v_cmp_lt_f32_e32 vcc, s0, v0
24; SI-SDAG-NEXT:    v_cndmask_b32_e64 v0, 0, 1, vcc
25; SI-SDAG-NEXT:    v_lshlrev_b32_e32 v0, 5, v0
26; SI-SDAG-NEXT:    v_ldexp_f32_e32 v0, s0, v0
27; SI-SDAG-NEXT:    v_log_f32_e32 v0, v0
28; SI-SDAG-NEXT:    s_mov_b32 s0, 0x3f317217
29; SI-SDAG-NEXT:    s_mov_b32 s6, -1
30; SI-SDAG-NEXT:    v_mul_f32_e32 v1, 0x3f317217, v0
31; SI-SDAG-NEXT:    v_fma_f32 v2, v0, s0, -v1
32; SI-SDAG-NEXT:    v_fma_f32 v2, v0, s1, v2
33; SI-SDAG-NEXT:    s_mov_b32 s0, 0x7f800000
34; SI-SDAG-NEXT:    v_add_f32_e32 v1, v1, v2
35; SI-SDAG-NEXT:    v_cmp_lt_f32_e64 s[0:1], |v0|, s0
36; SI-SDAG-NEXT:    v_cndmask_b32_e64 v0, v0, v1, s[0:1]
37; SI-SDAG-NEXT:    v_mov_b32_e32 v1, 0x41b17218
38; SI-SDAG-NEXT:    v_cndmask_b32_e32 v1, 0, v1, vcc
39; SI-SDAG-NEXT:    v_sub_f32_e32 v0, v0, v1
40; SI-SDAG-NEXT:    buffer_store_dword v0, off, s[4:7], 0
41; SI-SDAG-NEXT:    s_endpgm
42;
43; SI-GISEL-LABEL: s_log_f32:
44; SI-GISEL:       ; %bb.0:
45; SI-GISEL-NEXT:    s_load_dword s0, s[4:5], 0xb
46; SI-GISEL-NEXT:    s_load_dwordx2 s[4:5], s[4:5], 0x9
47; SI-GISEL-NEXT:    v_mov_b32_e32 v0, 0x800000
48; SI-GISEL-NEXT:    v_mov_b32_e32 v1, 0x3f317217
49; SI-GISEL-NEXT:    v_mov_b32_e32 v2, 0x3377d1cf
50; SI-GISEL-NEXT:    s_waitcnt lgkmcnt(0)
51; SI-GISEL-NEXT:    v_cmp_lt_f32_e32 vcc, s0, v0
52; SI-GISEL-NEXT:    v_cndmask_b32_e64 v0, 0, 1, vcc
53; SI-GISEL-NEXT:    v_lshlrev_b32_e32 v0, 5, v0
54; SI-GISEL-NEXT:    v_ldexp_f32_e32 v0, s0, v0
55; SI-GISEL-NEXT:    v_log_f32_e32 v0, v0
56; SI-GISEL-NEXT:    v_mov_b32_e32 v3, 0x7f800000
57; SI-GISEL-NEXT:    s_mov_b32 s6, -1
58; SI-GISEL-NEXT:    s_mov_b32 s7, 0xf000
59; SI-GISEL-NEXT:    v_mul_f32_e32 v4, 0x3f317217, v0
60; SI-GISEL-NEXT:    v_fma_f32 v1, v0, v1, -v4
61; SI-GISEL-NEXT:    v_fma_f32 v1, v0, v2, v1
62; SI-GISEL-NEXT:    v_add_f32_e32 v1, v4, v1
63; SI-GISEL-NEXT:    v_cmp_lt_f32_e64 s[0:1], |v0|, v3
64; SI-GISEL-NEXT:    v_cndmask_b32_e64 v0, v0, v1, s[0:1]
65; SI-GISEL-NEXT:    v_mov_b32_e32 v1, 0x41b17218
66; SI-GISEL-NEXT:    v_cndmask_b32_e32 v1, 0, v1, vcc
67; SI-GISEL-NEXT:    v_sub_f32_e32 v0, v0, v1
68; SI-GISEL-NEXT:    buffer_store_dword v0, off, s[4:7], 0
69; SI-GISEL-NEXT:    s_endpgm
70;
71; VI-SDAG-LABEL: s_log_f32:
72; VI-SDAG:       ; %bb.0:
73; VI-SDAG-NEXT:    s_load_dword s0, s[4:5], 0x2c
74; VI-SDAG-NEXT:    s_load_dwordx2 s[2:3], s[4:5], 0x24
75; VI-SDAG-NEXT:    v_mov_b32_e32 v0, 0x800000
76; VI-SDAG-NEXT:    s_waitcnt lgkmcnt(0)
77; VI-SDAG-NEXT:    v_cmp_lt_f32_e32 vcc, s0, v0
78; VI-SDAG-NEXT:    v_cndmask_b32_e64 v0, 0, 1, vcc
79; VI-SDAG-NEXT:    v_lshlrev_b32_e32 v0, 5, v0
80; VI-SDAG-NEXT:    v_ldexp_f32 v0, s0, v0
81; VI-SDAG-NEXT:    v_log_f32_e32 v0, v0
82; VI-SDAG-NEXT:    s_mov_b32 s0, 0x7f800000
83; VI-SDAG-NEXT:    v_and_b32_e32 v1, 0xfffff000, v0
84; VI-SDAG-NEXT:    v_sub_f32_e32 v2, v0, v1
85; VI-SDAG-NEXT:    v_mul_f32_e32 v3, 0x3805fdf4, v1
86; VI-SDAG-NEXT:    v_mul_f32_e32 v4, 0x3f317000, v2
87; VI-SDAG-NEXT:    v_mul_f32_e32 v2, 0x3805fdf4, v2
88; VI-SDAG-NEXT:    v_add_f32_e32 v2, v3, v2
89; VI-SDAG-NEXT:    v_mul_f32_e32 v1, 0x3f317000, v1
90; VI-SDAG-NEXT:    v_add_f32_e32 v2, v4, v2
91; VI-SDAG-NEXT:    v_add_f32_e32 v1, v1, v2
92; VI-SDAG-NEXT:    v_cmp_lt_f32_e64 s[0:1], |v0|, s0
93; VI-SDAG-NEXT:    v_cndmask_b32_e64 v0, v0, v1, s[0:1]
94; VI-SDAG-NEXT:    v_mov_b32_e32 v1, 0x41b17218
95; VI-SDAG-NEXT:    v_cndmask_b32_e32 v1, 0, v1, vcc
96; VI-SDAG-NEXT:    v_sub_f32_e32 v2, v0, v1
97; VI-SDAG-NEXT:    v_mov_b32_e32 v0, s2
98; VI-SDAG-NEXT:    v_mov_b32_e32 v1, s3
99; VI-SDAG-NEXT:    flat_store_dword v[0:1], v2
100; VI-SDAG-NEXT:    s_endpgm
101;
102; VI-GISEL-LABEL: s_log_f32:
103; VI-GISEL:       ; %bb.0:
104; VI-GISEL-NEXT:    s_load_dword s0, s[4:5], 0x2c
105; VI-GISEL-NEXT:    s_load_dwordx2 s[2:3], s[4:5], 0x24
106; VI-GISEL-NEXT:    v_mov_b32_e32 v0, 0x800000
107; VI-GISEL-NEXT:    v_mov_b32_e32 v1, 0x7f800000
108; VI-GISEL-NEXT:    s_waitcnt lgkmcnt(0)
109; VI-GISEL-NEXT:    v_cmp_lt_f32_e32 vcc, s0, v0
110; VI-GISEL-NEXT:    v_cndmask_b32_e64 v0, 0, 1, vcc
111; VI-GISEL-NEXT:    v_lshlrev_b32_e32 v0, 5, v0
112; VI-GISEL-NEXT:    v_ldexp_f32 v0, s0, v0
113; VI-GISEL-NEXT:    v_log_f32_e32 v0, v0
114; VI-GISEL-NEXT:    v_and_b32_e32 v2, 0xfffff000, v0
115; VI-GISEL-NEXT:    v_sub_f32_e32 v3, v0, v2
116; VI-GISEL-NEXT:    v_mul_f32_e32 v4, 0x3805fdf4, v2
117; VI-GISEL-NEXT:    v_mul_f32_e32 v5, 0x3805fdf4, v3
118; VI-GISEL-NEXT:    v_mul_f32_e32 v3, 0x3f317000, v3
119; VI-GISEL-NEXT:    v_add_f32_e32 v4, v4, v5
120; VI-GISEL-NEXT:    v_mul_f32_e32 v2, 0x3f317000, v2
121; VI-GISEL-NEXT:    v_add_f32_e32 v3, v3, v4
122; VI-GISEL-NEXT:    v_add_f32_e32 v2, v2, v3
123; VI-GISEL-NEXT:    v_cmp_lt_f32_e64 s[0:1], |v0|, v1
124; VI-GISEL-NEXT:    v_mov_b32_e32 v1, 0x41b17218
125; VI-GISEL-NEXT:    v_cndmask_b32_e64 v0, v0, v2, s[0:1]
126; VI-GISEL-NEXT:    v_cndmask_b32_e32 v1, 0, v1, vcc
127; VI-GISEL-NEXT:    v_sub_f32_e32 v2, v0, v1
128; VI-GISEL-NEXT:    v_mov_b32_e32 v0, s2
129; VI-GISEL-NEXT:    v_mov_b32_e32 v1, s3
130; VI-GISEL-NEXT:    flat_store_dword v[0:1], v2
131; VI-GISEL-NEXT:    s_endpgm
132;
133; GFX900-SDAG-LABEL: s_log_f32:
134; GFX900-SDAG:       ; %bb.0:
135; GFX900-SDAG-NEXT:    s_load_dword s0, s[4:5], 0x2c
136; GFX900-SDAG-NEXT:    s_load_dwordx2 s[2:3], s[4:5], 0x24
137; GFX900-SDAG-NEXT:    v_mov_b32_e32 v1, 0x800000
138; GFX900-SDAG-NEXT:    s_mov_b32 s1, 0x3377d1cf
139; GFX900-SDAG-NEXT:    s_mov_b32 s4, 0x7f800000
140; GFX900-SDAG-NEXT:    s_waitcnt lgkmcnt(0)
141; GFX900-SDAG-NEXT:    v_cmp_lt_f32_e32 vcc, s0, v1
142; GFX900-SDAG-NEXT:    v_cndmask_b32_e64 v1, 0, 1, vcc
143; GFX900-SDAG-NEXT:    v_lshlrev_b32_e32 v1, 5, v1
144; GFX900-SDAG-NEXT:    v_ldexp_f32 v1, s0, v1
145; GFX900-SDAG-NEXT:    v_log_f32_e32 v1, v1
146; GFX900-SDAG-NEXT:    s_mov_b32 s0, 0x3f317217
147; GFX900-SDAG-NEXT:    v_mov_b32_e32 v0, 0
148; GFX900-SDAG-NEXT:    v_mul_f32_e32 v2, 0x3f317217, v1
149; GFX900-SDAG-NEXT:    v_fma_f32 v3, v1, s0, -v2
150; GFX900-SDAG-NEXT:    v_fma_f32 v3, v1, s1, v3
151; GFX900-SDAG-NEXT:    v_add_f32_e32 v2, v2, v3
152; GFX900-SDAG-NEXT:    v_cmp_lt_f32_e64 s[0:1], |v1|, s4
153; GFX900-SDAG-NEXT:    v_cndmask_b32_e64 v1, v1, v2, s[0:1]
154; GFX900-SDAG-NEXT:    v_mov_b32_e32 v2, 0x41b17218
155; GFX900-SDAG-NEXT:    v_cndmask_b32_e32 v2, 0, v2, vcc
156; GFX900-SDAG-NEXT:    v_sub_f32_e32 v1, v1, v2
157; GFX900-SDAG-NEXT:    global_store_dword v0, v1, s[2:3]
158; GFX900-SDAG-NEXT:    s_endpgm
159;
160; GFX900-GISEL-LABEL: s_log_f32:
161; GFX900-GISEL:       ; %bb.0:
162; GFX900-GISEL-NEXT:    s_load_dword s0, s[4:5], 0x2c
163; GFX900-GISEL-NEXT:    s_load_dwordx2 s[2:3], s[4:5], 0x24
164; GFX900-GISEL-NEXT:    v_mov_b32_e32 v0, 0x800000
165; GFX900-GISEL-NEXT:    v_mov_b32_e32 v2, 0x3f317217
166; GFX900-GISEL-NEXT:    v_mov_b32_e32 v3, 0x3377d1cf
167; GFX900-GISEL-NEXT:    s_waitcnt lgkmcnt(0)
168; GFX900-GISEL-NEXT:    v_cmp_lt_f32_e32 vcc, s0, v0
169; GFX900-GISEL-NEXT:    v_cndmask_b32_e64 v0, 0, 1, vcc
170; GFX900-GISEL-NEXT:    v_lshlrev_b32_e32 v0, 5, v0
171; GFX900-GISEL-NEXT:    v_ldexp_f32 v0, s0, v0
172; GFX900-GISEL-NEXT:    v_log_f32_e32 v0, v0
173; GFX900-GISEL-NEXT:    v_mov_b32_e32 v4, 0x7f800000
174; GFX900-GISEL-NEXT:    v_mov_b32_e32 v1, 0
175; GFX900-GISEL-NEXT:    v_mul_f32_e32 v5, 0x3f317217, v0
176; GFX900-GISEL-NEXT:    v_fma_f32 v2, v0, v2, -v5
177; GFX900-GISEL-NEXT:    v_fma_f32 v2, v0, v3, v2
178; GFX900-GISEL-NEXT:    v_add_f32_e32 v2, v5, v2
179; GFX900-GISEL-NEXT:    v_cmp_lt_f32_e64 s[0:1], |v0|, v4
180; GFX900-GISEL-NEXT:    v_cndmask_b32_e64 v0, v0, v2, s[0:1]
181; GFX900-GISEL-NEXT:    v_mov_b32_e32 v2, 0x41b17218
182; GFX900-GISEL-NEXT:    v_cndmask_b32_e32 v2, 0, v2, vcc
183; GFX900-GISEL-NEXT:    v_sub_f32_e32 v0, v0, v2
184; GFX900-GISEL-NEXT:    global_store_dword v1, v0, s[2:3]
185; GFX900-GISEL-NEXT:    s_endpgm
186;
187; GFX1100-SDAG-LABEL: s_log_f32:
188; GFX1100-SDAG:       ; %bb.0:
189; GFX1100-SDAG-NEXT:    s_load_b32 s0, s[4:5], 0x2c
190; GFX1100-SDAG-NEXT:    s_waitcnt lgkmcnt(0)
191; GFX1100-SDAG-NEXT:    v_cmp_gt_f32_e64 s2, 0x800000, s0
192; GFX1100-SDAG-NEXT:    s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
193; GFX1100-SDAG-NEXT:    v_cndmask_b32_e64 v0, 0, 1, s2
194; GFX1100-SDAG-NEXT:    v_lshlrev_b32_e32 v0, 5, v0
195; GFX1100-SDAG-NEXT:    s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
196; GFX1100-SDAG-NEXT:    v_ldexp_f32 v0, s0, v0
197; GFX1100-SDAG-NEXT:    s_load_b64 s[0:1], s[4:5], 0x24
198; GFX1100-SDAG-NEXT:    v_log_f32_e32 v0, v0
199; GFX1100-SDAG-NEXT:    s_waitcnt_depctr 0xfff
200; GFX1100-SDAG-NEXT:    v_mul_f32_e32 v1, 0x3f317217, v0
201; GFX1100-SDAG-NEXT:    v_cmp_gt_f32_e64 vcc_lo, 0x7f800000, |v0|
202; GFX1100-SDAG-NEXT:    s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
203; GFX1100-SDAG-NEXT:    v_fma_f32 v2, 0x3f317217, v0, -v1
204; GFX1100-SDAG-NEXT:    v_fmamk_f32 v2, v0, 0x3377d1cf, v2
205; GFX1100-SDAG-NEXT:    s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
206; GFX1100-SDAG-NEXT:    v_dual_add_f32 v1, v1, v2 :: v_dual_mov_b32 v2, 0
207; GFX1100-SDAG-NEXT:    v_cndmask_b32_e32 v0, v0, v1, vcc_lo
208; GFX1100-SDAG-NEXT:    v_cndmask_b32_e64 v1, 0, 0x41b17218, s2
209; GFX1100-SDAG-NEXT:    s_delay_alu instid0(VALU_DEP_1)
210; GFX1100-SDAG-NEXT:    v_sub_f32_e32 v0, v0, v1
211; GFX1100-SDAG-NEXT:    s_waitcnt lgkmcnt(0)
212; GFX1100-SDAG-NEXT:    global_store_b32 v2, v0, s[0:1]
213; GFX1100-SDAG-NEXT:    s_endpgm
214;
215; GFX1100-GISEL-LABEL: s_log_f32:
216; GFX1100-GISEL:       ; %bb.0:
217; GFX1100-GISEL-NEXT:    s_load_b32 s0, s[4:5], 0x2c
218; GFX1100-GISEL-NEXT:    s_waitcnt lgkmcnt(0)
219; GFX1100-GISEL-NEXT:    v_cmp_gt_f32_e64 s2, 0x800000, s0
220; GFX1100-GISEL-NEXT:    s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
221; GFX1100-GISEL-NEXT:    v_cndmask_b32_e64 v0, 0, 1, s2
222; GFX1100-GISEL-NEXT:    v_lshlrev_b32_e32 v0, 5, v0
223; GFX1100-GISEL-NEXT:    s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
224; GFX1100-GISEL-NEXT:    v_ldexp_f32 v0, s0, v0
225; GFX1100-GISEL-NEXT:    s_load_b64 s[0:1], s[4:5], 0x24
226; GFX1100-GISEL-NEXT:    v_log_f32_e32 v0, v0
227; GFX1100-GISEL-NEXT:    s_waitcnt_depctr 0xfff
228; GFX1100-GISEL-NEXT:    v_mul_f32_e32 v1, 0x3f317217, v0
229; GFX1100-GISEL-NEXT:    v_cmp_gt_f32_e64 vcc_lo, 0x7f800000, |v0|
230; GFX1100-GISEL-NEXT:    s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
231; GFX1100-GISEL-NEXT:    v_fma_f32 v2, 0x3f317217, v0, -v1
232; GFX1100-GISEL-NEXT:    v_fmac_f32_e32 v2, 0x3377d1cf, v0
233; GFX1100-GISEL-NEXT:    s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
234; GFX1100-GISEL-NEXT:    v_dual_add_f32 v1, v1, v2 :: v_dual_mov_b32 v2, 0
235; GFX1100-GISEL-NEXT:    v_cndmask_b32_e32 v0, v0, v1, vcc_lo
236; GFX1100-GISEL-NEXT:    v_cndmask_b32_e64 v1, 0, 0x41b17218, s2
237; GFX1100-GISEL-NEXT:    s_delay_alu instid0(VALU_DEP_1)
238; GFX1100-GISEL-NEXT:    v_sub_f32_e32 v0, v0, v1
239; GFX1100-GISEL-NEXT:    s_waitcnt lgkmcnt(0)
240; GFX1100-GISEL-NEXT:    global_store_b32 v2, v0, s[0:1]
241; GFX1100-GISEL-NEXT:    s_endpgm
242;
243; R600-LABEL: s_log_f32:
244; R600:       ; %bb.0:
245; R600-NEXT:    ALU 23, @4, KC0[CB0:0-32], KC1[]
246; R600-NEXT:    MEM_RAT_CACHELESS STORE_RAW T0.X, T1.X, 1
247; R600-NEXT:    CF_END
248; R600-NEXT:    PAD
249; R600-NEXT:    ALU clause starting at 4:
250; R600-NEXT:     SETGT * T0.W, literal.x, KC0[2].Z,
251; R600-NEXT:    8388608(1.175494e-38), 0(0.000000e+00)
252; R600-NEXT:     CNDE * T1.W, PV.W, 1.0, literal.x,
253; R600-NEXT:    1333788672(4.294967e+09), 0(0.000000e+00)
254; R600-NEXT:     MUL_IEEE * T1.W, KC0[2].Z, PV.W,
255; R600-NEXT:     LOG_IEEE * T0.X, PV.W,
256; R600-NEXT:     AND_INT * T1.W, PS, literal.x,
257; R600-NEXT:    -4096(nan), 0(0.000000e+00)
258; R600-NEXT:     ADD * T2.W, T0.X, -PV.W,
259; R600-NEXT:     MUL_IEEE * T3.W, PV.W, literal.x,
260; R600-NEXT:    939916788(3.194618e-05), 0(0.000000e+00)
261; R600-NEXT:     MULADD_IEEE * T3.W, T1.W, literal.x, PV.W,
262; R600-NEXT:    939916788(3.194618e-05), 0(0.000000e+00)
263; R600-NEXT:     MULADD_IEEE * T2.W, T2.W, literal.x, PV.W,
264; R600-NEXT:    1060204544(6.931152e-01), 0(0.000000e+00)
265; R600-NEXT:     MULADD_IEEE T1.W, T1.W, literal.x, PV.W,
266; R600-NEXT:     SETGT * T2.W, literal.y, |T0.X|,
267; R600-NEXT:    1060204544(6.931152e-01), 2139095040(INF)
268; R600-NEXT:     CNDE T1.W, PS, T0.X, PV.W,
269; R600-NEXT:     CNDE * T0.W, T0.W, 0.0, literal.x,
270; R600-NEXT:    1102148120(2.218071e+01), 0(0.000000e+00)
271; R600-NEXT:     ADD T0.X, PV.W, -PS,
272; R600-NEXT:     LSHR * T1.X, KC0[2].Y, literal.x,
273; R600-NEXT:    2(2.802597e-45), 0(0.000000e+00)
274;
275; CM-LABEL: s_log_f32:
276; CM:       ; %bb.0:
277; CM-NEXT:    ALU 26, @4, KC0[CB0:0-32], KC1[]
278; CM-NEXT:    MEM_RAT_CACHELESS STORE_DWORD T0.X, T1.X
279; CM-NEXT:    CF_END
280; CM-NEXT:    PAD
281; CM-NEXT:    ALU clause starting at 4:
282; CM-NEXT:     SETGT * T0.W, literal.x, KC0[2].Z,
283; CM-NEXT:    8388608(1.175494e-38), 0(0.000000e+00)
284; CM-NEXT:     CNDE * T1.W, PV.W, 1.0, literal.x,
285; CM-NEXT:    1333788672(4.294967e+09), 0(0.000000e+00)
286; CM-NEXT:     MUL_IEEE * T1.W, KC0[2].Z, PV.W,
287; CM-NEXT:     LOG_IEEE T0.X, T1.W,
288; CM-NEXT:     LOG_IEEE T0.Y (MASKED), T1.W,
289; CM-NEXT:     LOG_IEEE T0.Z (MASKED), T1.W,
290; CM-NEXT:     LOG_IEEE * T0.W (MASKED), T1.W,
291; CM-NEXT:     AND_INT * T1.W, PV.X, literal.x,
292; CM-NEXT:    -4096(nan), 0(0.000000e+00)
293; CM-NEXT:     ADD * T2.W, T0.X, -PV.W,
294; CM-NEXT:     MUL_IEEE * T3.W, PV.W, literal.x,
295; CM-NEXT:    939916788(3.194618e-05), 0(0.000000e+00)
296; CM-NEXT:     MULADD_IEEE * T3.W, T1.W, literal.x, PV.W,
297; CM-NEXT:    939916788(3.194618e-05), 0(0.000000e+00)
298; CM-NEXT:     MULADD_IEEE * T2.W, T2.W, literal.x, PV.W,
299; CM-NEXT:    1060204544(6.931152e-01), 0(0.000000e+00)
300; CM-NEXT:     MULADD_IEEE T0.Z, T1.W, literal.x, PV.W,
301; CM-NEXT:     SETGT * T1.W, literal.y, |T0.X|,
302; CM-NEXT:    1060204544(6.931152e-01), 2139095040(INF)
303; CM-NEXT:     CNDE T0.Z, PV.W, T0.X, PV.Z,
304; CM-NEXT:     CNDE * T0.W, T0.W, 0.0, literal.x,
305; CM-NEXT:    1102148120(2.218071e+01), 0(0.000000e+00)
306; CM-NEXT:     ADD * T0.X, PV.Z, -PV.W,
307; CM-NEXT:     LSHR * T1.X, KC0[2].Y, literal.x,
308; CM-NEXT:    2(2.802597e-45), 0(0.000000e+00)
309  %result = call float @llvm.log.f32(float %in)
310  store float %result, ptr addrspace(1) %out
311  ret void
312}
313
314; FIXME: We should be able to merge these packets together on Cayman so we
315; have a maximum of 4 instructions.
316define amdgpu_kernel void @s_log_v2f32(ptr addrspace(1) %out, <2 x float> %in) {
317; SI-SDAG-LABEL: s_log_v2f32:
318; SI-SDAG:       ; %bb.0:
319; SI-SDAG-NEXT:    s_load_dwordx4 s[0:3], s[4:5], 0x9
320; SI-SDAG-NEXT:    v_mov_b32_e32 v0, 0x800000
321; SI-SDAG-NEXT:    s_mov_b32 s8, 0x3377d1cf
322; SI-SDAG-NEXT:    s_mov_b32 s9, 0x7f800000
323; SI-SDAG-NEXT:    s_mov_b32 s7, 0xf000
324; SI-SDAG-NEXT:    s_waitcnt lgkmcnt(0)
325; SI-SDAG-NEXT:    v_cmp_lt_f32_e32 vcc, s3, v0
326; SI-SDAG-NEXT:    v_cndmask_b32_e64 v1, 0, 1, vcc
327; SI-SDAG-NEXT:    v_lshlrev_b32_e32 v1, 5, v1
328; SI-SDAG-NEXT:    v_ldexp_f32_e32 v1, s3, v1
329; SI-SDAG-NEXT:    v_log_f32_e32 v1, v1
330; SI-SDAG-NEXT:    s_mov_b32 s3, 0x3f317217
331; SI-SDAG-NEXT:    s_mov_b32 s4, s0
332; SI-SDAG-NEXT:    s_mov_b32 s5, s1
333; SI-SDAG-NEXT:    v_mul_f32_e32 v2, 0x3f317217, v1
334; SI-SDAG-NEXT:    v_fma_f32 v3, v1, s3, -v2
335; SI-SDAG-NEXT:    v_fma_f32 v3, v1, s8, v3
336; SI-SDAG-NEXT:    v_add_f32_e32 v2, v2, v3
337; SI-SDAG-NEXT:    v_cmp_lt_f32_e64 s[0:1], |v1|, s9
338; SI-SDAG-NEXT:    v_cndmask_b32_e64 v1, v1, v2, s[0:1]
339; SI-SDAG-NEXT:    v_cmp_lt_f32_e64 s[0:1], s2, v0
340; SI-SDAG-NEXT:    v_cndmask_b32_e64 v0, 0, 1, s[0:1]
341; SI-SDAG-NEXT:    v_lshlrev_b32_e32 v0, 5, v0
342; SI-SDAG-NEXT:    v_ldexp_f32_e32 v0, s2, v0
343; SI-SDAG-NEXT:    v_log_f32_e32 v0, v0
344; SI-SDAG-NEXT:    v_mov_b32_e32 v2, 0x41b17218
345; SI-SDAG-NEXT:    v_cndmask_b32_e32 v3, 0, v2, vcc
346; SI-SDAG-NEXT:    v_sub_f32_e32 v1, v1, v3
347; SI-SDAG-NEXT:    v_mul_f32_e32 v3, 0x3f317217, v0
348; SI-SDAG-NEXT:    v_fma_f32 v4, v0, s3, -v3
349; SI-SDAG-NEXT:    v_fma_f32 v4, v0, s8, v4
350; SI-SDAG-NEXT:    v_add_f32_e32 v3, v3, v4
351; SI-SDAG-NEXT:    v_cmp_lt_f32_e64 vcc, |v0|, s9
352; SI-SDAG-NEXT:    v_cndmask_b32_e32 v0, v0, v3, vcc
353; SI-SDAG-NEXT:    v_cndmask_b32_e64 v2, 0, v2, s[0:1]
354; SI-SDAG-NEXT:    s_mov_b32 s6, -1
355; SI-SDAG-NEXT:    v_sub_f32_e32 v0, v0, v2
356; SI-SDAG-NEXT:    buffer_store_dwordx2 v[0:1], off, s[4:7], 0
357; SI-SDAG-NEXT:    s_endpgm
358;
359; SI-GISEL-LABEL: s_log_v2f32:
360; SI-GISEL:       ; %bb.0:
361; SI-GISEL-NEXT:    s_load_dwordx4 s[4:7], s[4:5], 0x9
362; SI-GISEL-NEXT:    v_mov_b32_e32 v0, 0x800000
363; SI-GISEL-NEXT:    v_mov_b32_e32 v2, 0x3f317217
364; SI-GISEL-NEXT:    v_mov_b32_e32 v3, 0x3377d1cf
365; SI-GISEL-NEXT:    v_mov_b32_e32 v4, 0x7f800000
366; SI-GISEL-NEXT:    s_waitcnt lgkmcnt(0)
367; SI-GISEL-NEXT:    v_cmp_lt_f32_e32 vcc, s6, v0
368; SI-GISEL-NEXT:    v_cndmask_b32_e64 v1, 0, 1, vcc
369; SI-GISEL-NEXT:    v_lshlrev_b32_e32 v1, 5, v1
370; SI-GISEL-NEXT:    v_ldexp_f32_e32 v1, s6, v1
371; SI-GISEL-NEXT:    v_log_f32_e32 v1, v1
372; SI-GISEL-NEXT:    s_mov_b32 s6, -1
373; SI-GISEL-NEXT:    v_mul_f32_e32 v5, 0x3f317217, v1
374; SI-GISEL-NEXT:    v_fma_f32 v6, v1, v2, -v5
375; SI-GISEL-NEXT:    v_fma_f32 v6, v1, v3, v6
376; SI-GISEL-NEXT:    v_add_f32_e32 v5, v5, v6
377; SI-GISEL-NEXT:    v_cmp_lt_f32_e64 s[0:1], |v1|, v4
378; SI-GISEL-NEXT:    v_cndmask_b32_e64 v1, v1, v5, s[0:1]
379; SI-GISEL-NEXT:    v_cmp_lt_f32_e64 s[0:1], s7, v0
380; SI-GISEL-NEXT:    v_cndmask_b32_e64 v0, 0, 1, s[0:1]
381; SI-GISEL-NEXT:    v_lshlrev_b32_e32 v0, 5, v0
382; SI-GISEL-NEXT:    v_ldexp_f32_e32 v0, s7, v0
383; SI-GISEL-NEXT:    v_log_f32_e32 v5, v0
384; SI-GISEL-NEXT:    v_mov_b32_e32 v6, 0x41b17218
385; SI-GISEL-NEXT:    v_cndmask_b32_e32 v0, 0, v6, vcc
386; SI-GISEL-NEXT:    v_sub_f32_e32 v0, v1, v0
387; SI-GISEL-NEXT:    v_mul_f32_e32 v1, 0x3f317217, v5
388; SI-GISEL-NEXT:    v_fma_f32 v2, v5, v2, -v1
389; SI-GISEL-NEXT:    v_fma_f32 v2, v5, v3, v2
390; SI-GISEL-NEXT:    v_add_f32_e32 v1, v1, v2
391; SI-GISEL-NEXT:    v_cmp_lt_f32_e64 vcc, |v5|, v4
392; SI-GISEL-NEXT:    v_cndmask_b32_e32 v1, v5, v1, vcc
393; SI-GISEL-NEXT:    v_cndmask_b32_e64 v2, 0, v6, s[0:1]
394; SI-GISEL-NEXT:    v_sub_f32_e32 v1, v1, v2
395; SI-GISEL-NEXT:    s_mov_b32 s7, 0xf000
396; SI-GISEL-NEXT:    buffer_store_dwordx2 v[0:1], off, s[4:7], 0
397; SI-GISEL-NEXT:    s_endpgm
398;
399; VI-SDAG-LABEL: s_log_v2f32:
400; VI-SDAG:       ; %bb.0:
401; VI-SDAG-NEXT:    s_load_dwordx4 s[4:7], s[4:5], 0x24
402; VI-SDAG-NEXT:    v_mov_b32_e32 v0, 0x800000
403; VI-SDAG-NEXT:    s_mov_b32 s2, 0x7f800000
404; VI-SDAG-NEXT:    s_waitcnt lgkmcnt(0)
405; VI-SDAG-NEXT:    v_cmp_lt_f32_e32 vcc, s7, v0
406; VI-SDAG-NEXT:    v_cndmask_b32_e64 v1, 0, 1, vcc
407; VI-SDAG-NEXT:    v_lshlrev_b32_e32 v1, 5, v1
408; VI-SDAG-NEXT:    v_ldexp_f32 v1, s7, v1
409; VI-SDAG-NEXT:    v_log_f32_e32 v1, v1
410; VI-SDAG-NEXT:    v_and_b32_e32 v2, 0xfffff000, v1
411; VI-SDAG-NEXT:    v_sub_f32_e32 v3, v1, v2
412; VI-SDAG-NEXT:    v_mul_f32_e32 v4, 0x3805fdf4, v2
413; VI-SDAG-NEXT:    v_mul_f32_e32 v5, 0x3f317000, v3
414; VI-SDAG-NEXT:    v_mul_f32_e32 v3, 0x3805fdf4, v3
415; VI-SDAG-NEXT:    v_add_f32_e32 v3, v4, v3
416; VI-SDAG-NEXT:    v_mul_f32_e32 v2, 0x3f317000, v2
417; VI-SDAG-NEXT:    v_add_f32_e32 v3, v5, v3
418; VI-SDAG-NEXT:    v_add_f32_e32 v2, v2, v3
419; VI-SDAG-NEXT:    v_cmp_lt_f32_e64 s[0:1], |v1|, s2
420; VI-SDAG-NEXT:    v_cndmask_b32_e64 v1, v1, v2, s[0:1]
421; VI-SDAG-NEXT:    v_cmp_lt_f32_e64 s[0:1], s6, v0
422; VI-SDAG-NEXT:    v_cndmask_b32_e64 v0, 0, 1, s[0:1]
423; VI-SDAG-NEXT:    v_lshlrev_b32_e32 v0, 5, v0
424; VI-SDAG-NEXT:    v_ldexp_f32 v0, s6, v0
425; VI-SDAG-NEXT:    v_log_f32_e32 v0, v0
426; VI-SDAG-NEXT:    v_mov_b32_e32 v2, 0x41b17218
427; VI-SDAG-NEXT:    v_cndmask_b32_e32 v3, 0, v2, vcc
428; VI-SDAG-NEXT:    v_sub_f32_e32 v1, v1, v3
429; VI-SDAG-NEXT:    v_and_b32_e32 v3, 0xfffff000, v0
430; VI-SDAG-NEXT:    v_sub_f32_e32 v4, v0, v3
431; VI-SDAG-NEXT:    v_mul_f32_e32 v5, 0x3f317000, v4
432; VI-SDAG-NEXT:    v_mul_f32_e32 v4, 0x3805fdf4, v4
433; VI-SDAG-NEXT:    v_mul_f32_e32 v6, 0x3805fdf4, v3
434; VI-SDAG-NEXT:    v_add_f32_e32 v4, v6, v4
435; VI-SDAG-NEXT:    v_add_f32_e32 v4, v5, v4
436; VI-SDAG-NEXT:    v_mul_f32_e32 v3, 0x3f317000, v3
437; VI-SDAG-NEXT:    v_add_f32_e32 v3, v3, v4
438; VI-SDAG-NEXT:    v_cmp_lt_f32_e64 vcc, |v0|, s2
439; VI-SDAG-NEXT:    v_cndmask_b32_e32 v0, v0, v3, vcc
440; VI-SDAG-NEXT:    v_cndmask_b32_e64 v2, 0, v2, s[0:1]
441; VI-SDAG-NEXT:    v_sub_f32_e32 v0, v0, v2
442; VI-SDAG-NEXT:    v_mov_b32_e32 v2, s4
443; VI-SDAG-NEXT:    v_mov_b32_e32 v3, s5
444; VI-SDAG-NEXT:    flat_store_dwordx2 v[2:3], v[0:1]
445; VI-SDAG-NEXT:    s_endpgm
446;
447; VI-GISEL-LABEL: s_log_v2f32:
448; VI-GISEL:       ; %bb.0:
449; VI-GISEL-NEXT:    s_load_dwordx4 s[4:7], s[4:5], 0x24
450; VI-GISEL-NEXT:    v_mov_b32_e32 v0, 0x800000
451; VI-GISEL-NEXT:    v_mov_b32_e32 v2, 0x7f800000
452; VI-GISEL-NEXT:    s_waitcnt lgkmcnt(0)
453; VI-GISEL-NEXT:    v_cmp_lt_f32_e32 vcc, s6, v0
454; VI-GISEL-NEXT:    v_cndmask_b32_e64 v1, 0, 1, vcc
455; VI-GISEL-NEXT:    v_lshlrev_b32_e32 v1, 5, v1
456; VI-GISEL-NEXT:    v_ldexp_f32 v1, s6, v1
457; VI-GISEL-NEXT:    v_log_f32_e32 v1, v1
458; VI-GISEL-NEXT:    v_and_b32_e32 v3, 0xfffff000, v1
459; VI-GISEL-NEXT:    v_sub_f32_e32 v4, v1, v3
460; VI-GISEL-NEXT:    v_mul_f32_e32 v5, 0x3805fdf4, v3
461; VI-GISEL-NEXT:    v_mul_f32_e32 v6, 0x3805fdf4, v4
462; VI-GISEL-NEXT:    v_mul_f32_e32 v4, 0x3f317000, v4
463; VI-GISEL-NEXT:    v_add_f32_e32 v5, v5, v6
464; VI-GISEL-NEXT:    v_mul_f32_e32 v3, 0x3f317000, v3
465; VI-GISEL-NEXT:    v_add_f32_e32 v4, v4, v5
466; VI-GISEL-NEXT:    v_add_f32_e32 v3, v3, v4
467; VI-GISEL-NEXT:    v_cmp_lt_f32_e64 s[0:1], |v1|, v2
468; VI-GISEL-NEXT:    v_cndmask_b32_e64 v1, v1, v3, s[0:1]
469; VI-GISEL-NEXT:    v_cmp_lt_f32_e64 s[0:1], s7, v0
470; VI-GISEL-NEXT:    v_cndmask_b32_e64 v0, 0, 1, s[0:1]
471; VI-GISEL-NEXT:    v_lshlrev_b32_e32 v0, 5, v0
472; VI-GISEL-NEXT:    v_ldexp_f32 v0, s7, v0
473; VI-GISEL-NEXT:    v_log_f32_e32 v3, v0
474; VI-GISEL-NEXT:    v_mov_b32_e32 v4, 0x41b17218
475; VI-GISEL-NEXT:    v_cndmask_b32_e32 v0, 0, v4, vcc
476; VI-GISEL-NEXT:    v_sub_f32_e32 v0, v1, v0
477; VI-GISEL-NEXT:    v_and_b32_e32 v1, 0xfffff000, v3
478; VI-GISEL-NEXT:    v_sub_f32_e32 v5, v3, v1
479; VI-GISEL-NEXT:    v_mul_f32_e32 v6, 0x3805fdf4, v5
480; VI-GISEL-NEXT:    v_mul_f32_e32 v7, 0x3805fdf4, v1
481; VI-GISEL-NEXT:    v_add_f32_e32 v6, v7, v6
482; VI-GISEL-NEXT:    v_mul_f32_e32 v5, 0x3f317000, v5
483; VI-GISEL-NEXT:    v_add_f32_e32 v5, v5, v6
484; VI-GISEL-NEXT:    v_mul_f32_e32 v1, 0x3f317000, v1
485; VI-GISEL-NEXT:    v_add_f32_e32 v1, v1, v5
486; VI-GISEL-NEXT:    v_cmp_lt_f32_e64 vcc, |v3|, v2
487; VI-GISEL-NEXT:    v_cndmask_b32_e32 v1, v3, v1, vcc
488; VI-GISEL-NEXT:    v_cndmask_b32_e64 v2, 0, v4, s[0:1]
489; VI-GISEL-NEXT:    v_sub_f32_e32 v1, v1, v2
490; VI-GISEL-NEXT:    v_mov_b32_e32 v2, s4
491; VI-GISEL-NEXT:    v_mov_b32_e32 v3, s5
492; VI-GISEL-NEXT:    flat_store_dwordx2 v[2:3], v[0:1]
493; VI-GISEL-NEXT:    s_endpgm
494;
495; GFX900-SDAG-LABEL: s_log_v2f32:
496; GFX900-SDAG:       ; %bb.0:
497; GFX900-SDAG-NEXT:    s_load_dwordx4 s[8:11], s[4:5], 0x24
498; GFX900-SDAG-NEXT:    v_mov_b32_e32 v0, 0x800000
499; GFX900-SDAG-NEXT:    s_mov_b32 s2, 0x3f317217
500; GFX900-SDAG-NEXT:    s_mov_b32 s3, 0x3377d1cf
501; GFX900-SDAG-NEXT:    s_mov_b32 s4, 0x7f800000
502; GFX900-SDAG-NEXT:    s_waitcnt lgkmcnt(0)
503; GFX900-SDAG-NEXT:    v_cmp_lt_f32_e32 vcc, s11, v0
504; GFX900-SDAG-NEXT:    v_cndmask_b32_e64 v1, 0, 1, vcc
505; GFX900-SDAG-NEXT:    v_lshlrev_b32_e32 v1, 5, v1
506; GFX900-SDAG-NEXT:    v_ldexp_f32 v1, s11, v1
507; GFX900-SDAG-NEXT:    v_log_f32_e32 v1, v1
508; GFX900-SDAG-NEXT:    v_mov_b32_e32 v2, 0
509; GFX900-SDAG-NEXT:    v_mul_f32_e32 v3, 0x3f317217, v1
510; GFX900-SDAG-NEXT:    v_fma_f32 v4, v1, s2, -v3
511; GFX900-SDAG-NEXT:    v_fma_f32 v4, v1, s3, v4
512; GFX900-SDAG-NEXT:    v_add_f32_e32 v3, v3, v4
513; GFX900-SDAG-NEXT:    v_cmp_lt_f32_e64 s[0:1], |v1|, s4
514; GFX900-SDAG-NEXT:    v_cndmask_b32_e64 v1, v1, v3, s[0:1]
515; GFX900-SDAG-NEXT:    v_cmp_lt_f32_e64 s[0:1], s10, v0
516; GFX900-SDAG-NEXT:    v_cndmask_b32_e64 v0, 0, 1, s[0:1]
517; GFX900-SDAG-NEXT:    v_lshlrev_b32_e32 v0, 5, v0
518; GFX900-SDAG-NEXT:    v_ldexp_f32 v0, s10, v0
519; GFX900-SDAG-NEXT:    v_log_f32_e32 v0, v0
520; GFX900-SDAG-NEXT:    v_mov_b32_e32 v3, 0x41b17218
521; GFX900-SDAG-NEXT:    v_cndmask_b32_e32 v4, 0, v3, vcc
522; GFX900-SDAG-NEXT:    v_sub_f32_e32 v1, v1, v4
523; GFX900-SDAG-NEXT:    v_mul_f32_e32 v4, 0x3f317217, v0
524; GFX900-SDAG-NEXT:    v_fma_f32 v5, v0, s2, -v4
525; GFX900-SDAG-NEXT:    v_fma_f32 v5, v0, s3, v5
526; GFX900-SDAG-NEXT:    v_add_f32_e32 v4, v4, v5
527; GFX900-SDAG-NEXT:    v_cmp_lt_f32_e64 vcc, |v0|, s4
528; GFX900-SDAG-NEXT:    v_cndmask_b32_e32 v0, v0, v4, vcc
529; GFX900-SDAG-NEXT:    v_cndmask_b32_e64 v3, 0, v3, s[0:1]
530; GFX900-SDAG-NEXT:    v_sub_f32_e32 v0, v0, v3
531; GFX900-SDAG-NEXT:    global_store_dwordx2 v2, v[0:1], s[8:9]
532; GFX900-SDAG-NEXT:    s_endpgm
533;
534; GFX900-GISEL-LABEL: s_log_v2f32:
535; GFX900-GISEL:       ; %bb.0:
536; GFX900-GISEL-NEXT:    s_load_dwordx4 s[8:11], s[4:5], 0x24
537; GFX900-GISEL-NEXT:    v_mov_b32_e32 v0, 0x800000
538; GFX900-GISEL-NEXT:    v_mov_b32_e32 v3, 0x3f317217
539; GFX900-GISEL-NEXT:    v_mov_b32_e32 v4, 0x3377d1cf
540; GFX900-GISEL-NEXT:    v_mov_b32_e32 v5, 0x7f800000
541; GFX900-GISEL-NEXT:    s_waitcnt lgkmcnt(0)
542; GFX900-GISEL-NEXT:    v_cmp_lt_f32_e32 vcc, s10, v0
543; GFX900-GISEL-NEXT:    v_cndmask_b32_e64 v1, 0, 1, vcc
544; GFX900-GISEL-NEXT:    v_lshlrev_b32_e32 v1, 5, v1
545; GFX900-GISEL-NEXT:    v_ldexp_f32 v1, s10, v1
546; GFX900-GISEL-NEXT:    v_log_f32_e32 v1, v1
547; GFX900-GISEL-NEXT:    v_mov_b32_e32 v2, 0
548; GFX900-GISEL-NEXT:    v_mul_f32_e32 v6, 0x3f317217, v1
549; GFX900-GISEL-NEXT:    v_fma_f32 v7, v1, v3, -v6
550; GFX900-GISEL-NEXT:    v_fma_f32 v7, v1, v4, v7
551; GFX900-GISEL-NEXT:    v_add_f32_e32 v6, v6, v7
552; GFX900-GISEL-NEXT:    v_cmp_lt_f32_e64 s[0:1], |v1|, v5
553; GFX900-GISEL-NEXT:    v_cndmask_b32_e64 v1, v1, v6, s[0:1]
554; GFX900-GISEL-NEXT:    v_cmp_lt_f32_e64 s[0:1], s11, v0
555; GFX900-GISEL-NEXT:    v_cndmask_b32_e64 v0, 0, 1, s[0:1]
556; GFX900-GISEL-NEXT:    v_lshlrev_b32_e32 v0, 5, v0
557; GFX900-GISEL-NEXT:    v_ldexp_f32 v0, s11, v0
558; GFX900-GISEL-NEXT:    v_log_f32_e32 v6, v0
559; GFX900-GISEL-NEXT:    v_mov_b32_e32 v7, 0x41b17218
560; GFX900-GISEL-NEXT:    v_cndmask_b32_e32 v0, 0, v7, vcc
561; GFX900-GISEL-NEXT:    v_sub_f32_e32 v0, v1, v0
562; GFX900-GISEL-NEXT:    v_mul_f32_e32 v1, 0x3f317217, v6
563; GFX900-GISEL-NEXT:    v_fma_f32 v3, v6, v3, -v1
564; GFX900-GISEL-NEXT:    v_fma_f32 v3, v6, v4, v3
565; GFX900-GISEL-NEXT:    v_add_f32_e32 v1, v1, v3
566; GFX900-GISEL-NEXT:    v_cmp_lt_f32_e64 vcc, |v6|, v5
567; GFX900-GISEL-NEXT:    v_cndmask_b32_e32 v1, v6, v1, vcc
568; GFX900-GISEL-NEXT:    v_cndmask_b32_e64 v3, 0, v7, s[0:1]
569; GFX900-GISEL-NEXT:    v_sub_f32_e32 v1, v1, v3
570; GFX900-GISEL-NEXT:    global_store_dwordx2 v2, v[0:1], s[8:9]
571; GFX900-GISEL-NEXT:    s_endpgm
572;
573; GFX1100-SDAG-LABEL: s_log_v2f32:
574; GFX1100-SDAG:       ; %bb.0:
575; GFX1100-SDAG-NEXT:    s_load_b128 s[0:3], s[4:5], 0x24
576; GFX1100-SDAG-NEXT:    s_waitcnt lgkmcnt(0)
577; GFX1100-SDAG-NEXT:    v_cmp_gt_f32_e64 s5, 0x800000, s2
578; GFX1100-SDAG-NEXT:    v_cmp_gt_f32_e64 s4, 0x800000, s3
579; GFX1100-SDAG-NEXT:    s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
580; GFX1100-SDAG-NEXT:    v_cndmask_b32_e64 v1, 0, 1, s5
581; GFX1100-SDAG-NEXT:    v_cndmask_b32_e64 v0, 0, 1, s4
582; GFX1100-SDAG-NEXT:    s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
583; GFX1100-SDAG-NEXT:    v_lshlrev_b32_e32 v1, 5, v1
584; GFX1100-SDAG-NEXT:    v_ldexp_f32 v1, s2, v1
585; GFX1100-SDAG-NEXT:    s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)
586; GFX1100-SDAG-NEXT:    v_log_f32_e32 v1, v1
587; GFX1100-SDAG-NEXT:    s_waitcnt_depctr 0xfff
588; GFX1100-SDAG-NEXT:    v_dual_mul_f32 v3, 0x3f317217, v1 :: v_dual_lshlrev_b32 v0, 5, v0
589; GFX1100-SDAG-NEXT:    v_ldexp_f32 v0, s3, v0
590; GFX1100-SDAG-NEXT:    s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
591; GFX1100-SDAG-NEXT:    v_fma_f32 v5, 0x3f317217, v1, -v3
592; GFX1100-SDAG-NEXT:    v_log_f32_e32 v0, v0
593; GFX1100-SDAG-NEXT:    s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_4) | instid1(VALU_DEP_3)
594; GFX1100-SDAG-NEXT:    v_fmac_f32_e32 v5, 0x3377d1cf, v1
595; GFX1100-SDAG-NEXT:    s_waitcnt_depctr 0xfff
596; GFX1100-SDAG-NEXT:    v_dual_add_f32 v3, v3, v5 :: v_dual_mul_f32 v2, 0x3f317217, v0
597; GFX1100-SDAG-NEXT:    v_cmp_gt_f32_e64 vcc_lo, 0x7f800000, |v0|
598; GFX1100-SDAG-NEXT:    v_cndmask_b32_e64 v5, 0, 0x41b17218, s5
599; GFX1100-SDAG-NEXT:    v_fma_f32 v4, 0x3f317217, v0, -v2
600; GFX1100-SDAG-NEXT:    s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
601; GFX1100-SDAG-NEXT:    v_fmac_f32_e32 v4, 0x3377d1cf, v0
602; GFX1100-SDAG-NEXT:    v_add_f32_e32 v2, v2, v4
603; GFX1100-SDAG-NEXT:    v_cndmask_b32_e64 v4, 0, 0x41b17218, s4
604; GFX1100-SDAG-NEXT:    s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_1)
605; GFX1100-SDAG-NEXT:    v_cndmask_b32_e32 v0, v0, v2, vcc_lo
606; GFX1100-SDAG-NEXT:    v_cmp_gt_f32_e64 vcc_lo, 0x7f800000, |v1|
607; GFX1100-SDAG-NEXT:    v_dual_cndmask_b32 v2, v1, v3 :: v_dual_mov_b32 v3, 0
608; GFX1100-SDAG-NEXT:    v_dual_sub_f32 v1, v0, v4 :: v_dual_sub_f32 v0, v2, v5
609; GFX1100-SDAG-NEXT:    global_store_b64 v3, v[0:1], s[0:1]
610; GFX1100-SDAG-NEXT:    s_endpgm
611;
612; GFX1100-GISEL-LABEL: s_log_v2f32:
613; GFX1100-GISEL:       ; %bb.0:
614; GFX1100-GISEL-NEXT:    s_load_b128 s[0:3], s[4:5], 0x24
615; GFX1100-GISEL-NEXT:    s_waitcnt lgkmcnt(0)
616; GFX1100-GISEL-NEXT:    v_cmp_gt_f32_e64 s5, 0x800000, s3
617; GFX1100-GISEL-NEXT:    v_cmp_gt_f32_e64 s4, 0x800000, s2
618; GFX1100-GISEL-NEXT:    s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
619; GFX1100-GISEL-NEXT:    v_cndmask_b32_e64 v1, 0, 1, s5
620; GFX1100-GISEL-NEXT:    v_cndmask_b32_e64 v0, 0, 1, s4
621; GFX1100-GISEL-NEXT:    s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
622; GFX1100-GISEL-NEXT:    v_lshlrev_b32_e32 v1, 5, v1
623; GFX1100-GISEL-NEXT:    v_ldexp_f32 v1, s3, v1
624; GFX1100-GISEL-NEXT:    s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)
625; GFX1100-GISEL-NEXT:    v_log_f32_e32 v1, v1
626; GFX1100-GISEL-NEXT:    s_waitcnt_depctr 0xfff
627; GFX1100-GISEL-NEXT:    v_dual_mul_f32 v3, 0x3f317217, v1 :: v_dual_lshlrev_b32 v0, 5, v0
628; GFX1100-GISEL-NEXT:    v_ldexp_f32 v0, s2, v0
629; GFX1100-GISEL-NEXT:    s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
630; GFX1100-GISEL-NEXT:    v_fma_f32 v5, 0x3f317217, v1, -v3
631; GFX1100-GISEL-NEXT:    v_log_f32_e32 v0, v0
632; GFX1100-GISEL-NEXT:    s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_4) | instid1(VALU_DEP_3)
633; GFX1100-GISEL-NEXT:    v_fmac_f32_e32 v5, 0x3377d1cf, v1
634; GFX1100-GISEL-NEXT:    s_waitcnt_depctr 0xfff
635; GFX1100-GISEL-NEXT:    v_dual_add_f32 v3, v3, v5 :: v_dual_mul_f32 v2, 0x3f317217, v0
636; GFX1100-GISEL-NEXT:    v_cmp_gt_f32_e64 vcc_lo, 0x7f800000, |v0|
637; GFX1100-GISEL-NEXT:    v_cndmask_b32_e64 v5, 0, 0x41b17218, s5
638; GFX1100-GISEL-NEXT:    v_fma_f32 v4, 0x3f317217, v0, -v2
639; GFX1100-GISEL-NEXT:    s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
640; GFX1100-GISEL-NEXT:    v_fmac_f32_e32 v4, 0x3377d1cf, v0
641; GFX1100-GISEL-NEXT:    v_add_f32_e32 v2, v2, v4
642; GFX1100-GISEL-NEXT:    v_cndmask_b32_e64 v4, 0, 0x41b17218, s4
643; GFX1100-GISEL-NEXT:    s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_1)
644; GFX1100-GISEL-NEXT:    v_cndmask_b32_e32 v0, v0, v2, vcc_lo
645; GFX1100-GISEL-NEXT:    v_cmp_gt_f32_e64 vcc_lo, 0x7f800000, |v1|
646; GFX1100-GISEL-NEXT:    v_dual_cndmask_b32 v1, v1, v3 :: v_dual_mov_b32 v2, 0
647; GFX1100-GISEL-NEXT:    v_dual_sub_f32 v0, v0, v4 :: v_dual_sub_f32 v1, v1, v5
648; GFX1100-GISEL-NEXT:    global_store_b64 v2, v[0:1], s[0:1]
649; GFX1100-GISEL-NEXT:    s_endpgm
650;
651; R600-LABEL: s_log_v2f32:
652; R600:       ; %bb.0:
653; R600-NEXT:    ALU 41, @4, KC0[CB0:0-32], KC1[]
654; R600-NEXT:    MEM_RAT_CACHELESS STORE_RAW T2.XY, T0.X, 1
655; R600-NEXT:    CF_END
656; R600-NEXT:    PAD
657; R600-NEXT:    ALU clause starting at 4:
658; R600-NEXT:     SETGT T0.W, literal.x, KC0[3].X,
659; R600-NEXT:     SETGT * T1.W, literal.x, KC0[2].W,
660; R600-NEXT:    8388608(1.175494e-38), 0(0.000000e+00)
661; R600-NEXT:     CNDE * T2.W, PV.W, 1.0, literal.x,
662; R600-NEXT:    1333788672(4.294967e+09), 0(0.000000e+00)
663; R600-NEXT:     MUL_IEEE T2.W, KC0[3].X, PV.W,
664; R600-NEXT:     CNDE * T3.W, T1.W, 1.0, literal.x,
665; R600-NEXT:    1333788672(4.294967e+09), 0(0.000000e+00)
666; R600-NEXT:     MUL_IEEE T3.W, KC0[2].W, PS,
667; R600-NEXT:     LOG_IEEE * T0.X, PV.W,
668; R600-NEXT:     AND_INT T2.W, PS, literal.x,
669; R600-NEXT:     LOG_IEEE * T0.Y, PV.W,
670; R600-NEXT:    -4096(nan), 0(0.000000e+00)
671; R600-NEXT:     ADD T3.W, T0.X, -PV.W,
672; R600-NEXT:     AND_INT * T4.W, PS, literal.x,
673; R600-NEXT:    -4096(nan), 0(0.000000e+00)
674; R600-NEXT:     ADD T5.W, T0.Y, -PS,
675; R600-NEXT:     MUL_IEEE * T6.W, PV.W, literal.x,
676; R600-NEXT:    939916788(3.194618e-05), 0(0.000000e+00)
677; R600-NEXT:     MULADD_IEEE T6.W, T2.W, literal.x, PS,
678; R600-NEXT:     MUL_IEEE * T7.W, PV.W, literal.x,
679; R600-NEXT:    939916788(3.194618e-05), 0(0.000000e+00)
680; R600-NEXT:     MULADD_IEEE T7.W, T4.W, literal.x, PS,
681; R600-NEXT:     MULADD_IEEE * T3.W, T3.W, literal.y, PV.W, BS:VEC_021/SCL_122
682; R600-NEXT:    939916788(3.194618e-05), 1060204544(6.931152e-01)
683; R600-NEXT:     MULADD_IEEE T0.Z, T2.W, literal.x, PS,
684; R600-NEXT:     SETGT T2.W, literal.y, |T0.X|,
685; R600-NEXT:     MULADD_IEEE * T3.W, T5.W, literal.x, PV.W, BS:VEC_021/SCL_122
686; R600-NEXT:    1060204544(6.931152e-01), 2139095040(INF)
687; R600-NEXT:     MULADD_IEEE T1.Y, T4.W, literal.x, PS,
688; R600-NEXT:     SETGT T1.Z, literal.y, |T0.Y|,
689; R600-NEXT:     CNDE T2.W, PV.W, T0.X, PV.Z,
690; R600-NEXT:     CNDE * T0.W, T0.W, 0.0, literal.z,
691; R600-NEXT:    1060204544(6.931152e-01), 2139095040(INF)
692; R600-NEXT:    1102148120(2.218071e+01), 0(0.000000e+00)
693; R600-NEXT:     ADD T2.Y, PV.W, -PS,
694; R600-NEXT:     CNDE T0.W, PV.Z, T0.Y, PV.Y,
695; R600-NEXT:     CNDE * T1.W, T1.W, 0.0, literal.x,
696; R600-NEXT:    1102148120(2.218071e+01), 0(0.000000e+00)
697; R600-NEXT:     ADD T2.X, PV.W, -PS,
698; R600-NEXT:     LSHR * T0.X, KC0[2].Y, literal.x,
699; R600-NEXT:    2(2.802597e-45), 0(0.000000e+00)
700;
701; CM-LABEL: s_log_v2f32:
702; CM:       ; %bb.0:
703; CM-NEXT:    ALU 47, @4, KC0[CB0:0-32], KC1[]
704; CM-NEXT:    MEM_RAT_CACHELESS STORE_DWORD T1, T0.X
705; CM-NEXT:    CF_END
706; CM-NEXT:    PAD
707; CM-NEXT:    ALU clause starting at 4:
708; CM-NEXT:     SETGT * T0.W, literal.x, KC0[3].X,
709; CM-NEXT:    8388608(1.175494e-38), 0(0.000000e+00)
710; CM-NEXT:     CNDE T0.Z, PV.W, 1.0, literal.x,
711; CM-NEXT:     SETGT * T1.W, literal.y, KC0[2].W,
712; CM-NEXT:    1333788672(4.294967e+09), 8388608(1.175494e-38)
713; CM-NEXT:     CNDE T1.Z, PV.W, 1.0, literal.x,
714; CM-NEXT:     MUL_IEEE * T2.W, KC0[3].X, PV.Z,
715; CM-NEXT:    1333788672(4.294967e+09), 0(0.000000e+00)
716; CM-NEXT:     LOG_IEEE T0.X, T2.W,
717; CM-NEXT:     LOG_IEEE T0.Y (MASKED), T2.W,
718; CM-NEXT:     LOG_IEEE T0.Z (MASKED), T2.W,
719; CM-NEXT:     LOG_IEEE * T0.W (MASKED), T2.W,
720; CM-NEXT:     AND_INT T0.Z, PV.X, literal.x,
721; CM-NEXT:     MUL_IEEE * T2.W, KC0[2].W, T1.Z,
722; CM-NEXT:    -4096(nan), 0(0.000000e+00)
723; CM-NEXT:     LOG_IEEE T0.X (MASKED), T2.W,
724; CM-NEXT:     LOG_IEEE T0.Y, T2.W,
725; CM-NEXT:     LOG_IEEE T0.Z (MASKED), T2.W,
726; CM-NEXT:     LOG_IEEE * T0.W (MASKED), T2.W,
727; CM-NEXT:     ADD T1.Z, T0.X, -T0.Z,
728; CM-NEXT:     AND_INT * T2.W, PV.Y, literal.x,
729; CM-NEXT:    -4096(nan), 0(0.000000e+00)
730; CM-NEXT:     ADD T2.Z, T0.Y, -PV.W,
731; CM-NEXT:     MUL_IEEE * T3.W, PV.Z, literal.x,
732; CM-NEXT:    939916788(3.194618e-05), 0(0.000000e+00)
733; CM-NEXT:     MULADD_IEEE T3.Z, T0.Z, literal.x, PV.W,
734; CM-NEXT:     MUL_IEEE * T3.W, PV.Z, literal.x,
735; CM-NEXT:    939916788(3.194618e-05), 0(0.000000e+00)
736; CM-NEXT:     MULADD_IEEE T4.Z, T2.W, literal.x, PV.W,
737; CM-NEXT:     MULADD_IEEE * T3.W, T1.Z, literal.y, PV.Z,
738; CM-NEXT:    939916788(3.194618e-05), 1060204544(6.931152e-01)
739; CM-NEXT:     MULADD_IEEE T1.Y, T0.Z, literal.x, PV.W,
740; CM-NEXT:     SETGT T0.Z, literal.y, |T0.X|,
741; CM-NEXT:     MULADD_IEEE * T3.W, T2.Z, literal.x, PV.Z, BS:VEC_120/SCL_212
742; CM-NEXT:    1060204544(6.931152e-01), 2139095040(INF)
743; CM-NEXT:     MULADD_IEEE T1.X, T2.W, literal.x, PV.W,
744; CM-NEXT:     SETGT T2.Y, literal.y, |T0.Y|,
745; CM-NEXT:     CNDE T0.Z, PV.Z, T0.X, PV.Y,
746; CM-NEXT:     CNDE * T0.W, T0.W, 0.0, literal.z, BS:VEC_120/SCL_212
747; CM-NEXT:    1060204544(6.931152e-01), 2139095040(INF)
748; CM-NEXT:    1102148120(2.218071e+01), 0(0.000000e+00)
749; CM-NEXT:     ADD T1.Y, PV.Z, -PV.W,
750; CM-NEXT:     CNDE T0.Z, PV.Y, T0.Y, PV.X,
751; CM-NEXT:     CNDE * T0.W, T1.W, 0.0, literal.x,
752; CM-NEXT:    1102148120(2.218071e+01), 0(0.000000e+00)
753; CM-NEXT:     ADD * T1.X, PV.Z, -PV.W,
754; CM-NEXT:     LSHR * T0.X, KC0[2].Y, literal.x,
755; CM-NEXT:    2(2.802597e-45), 0(0.000000e+00)
756  %result = call <2 x float> @llvm.log.v2f32(<2 x float> %in)
757  store <2 x float> %result, ptr addrspace(1) %out
758  ret void
759}
760
761define amdgpu_kernel void @s_log_v3f32(ptr addrspace(1) %out, <3 x float> %in) {
762; SI-SDAG-LABEL: s_log_v3f32:
763; SI-SDAG:       ; %bb.0:
764; SI-SDAG-NEXT:    s_load_dwordx4 s[8:11], s[4:5], 0xd
765; SI-SDAG-NEXT:    s_load_dwordx2 s[4:5], s[4:5], 0x9
766; SI-SDAG-NEXT:    v_mov_b32_e32 v0, 0x800000
767; SI-SDAG-NEXT:    s_waitcnt lgkmcnt(0)
768; SI-SDAG-NEXT:    s_mov_b32 s11, 0x3377d1cf
769; SI-SDAG-NEXT:    s_mov_b32 s12, 0x7f800000
770; SI-SDAG-NEXT:    v_cmp_lt_f32_e32 vcc, s9, v0
771; SI-SDAG-NEXT:    v_cndmask_b32_e64 v1, 0, 1, vcc
772; SI-SDAG-NEXT:    v_lshlrev_b32_e32 v1, 5, v1
773; SI-SDAG-NEXT:    v_ldexp_f32_e32 v1, s9, v1
774; SI-SDAG-NEXT:    v_log_f32_e32 v1, v1
775; SI-SDAG-NEXT:    s_mov_b32 s9, 0x3f317217
776; SI-SDAG-NEXT:    s_mov_b32 s7, 0xf000
777; SI-SDAG-NEXT:    s_mov_b32 s6, -1
778; SI-SDAG-NEXT:    v_mul_f32_e32 v2, 0x3f317217, v1
779; SI-SDAG-NEXT:    v_fma_f32 v3, v1, s9, -v2
780; SI-SDAG-NEXT:    v_fma_f32 v3, v1, s11, v3
781; SI-SDAG-NEXT:    v_add_f32_e32 v2, v2, v3
782; SI-SDAG-NEXT:    v_cmp_lt_f32_e64 s[0:1], |v1|, s12
783; SI-SDAG-NEXT:    v_cndmask_b32_e64 v1, v1, v2, s[0:1]
784; SI-SDAG-NEXT:    v_cmp_lt_f32_e64 s[0:1], s8, v0
785; SI-SDAG-NEXT:    v_cndmask_b32_e64 v2, 0, 1, s[0:1]
786; SI-SDAG-NEXT:    v_lshlrev_b32_e32 v2, 5, v2
787; SI-SDAG-NEXT:    v_ldexp_f32_e32 v2, s8, v2
788; SI-SDAG-NEXT:    v_log_f32_e32 v2, v2
789; SI-SDAG-NEXT:    v_mov_b32_e32 v3, 0x41b17218
790; SI-SDAG-NEXT:    v_cndmask_b32_e32 v4, 0, v3, vcc
791; SI-SDAG-NEXT:    v_cmp_lt_f32_e32 vcc, s10, v0
792; SI-SDAG-NEXT:    v_sub_f32_e32 v1, v1, v4
793; SI-SDAG-NEXT:    v_mul_f32_e32 v4, 0x3f317217, v2
794; SI-SDAG-NEXT:    v_cndmask_b32_e64 v0, 0, 1, vcc
795; SI-SDAG-NEXT:    v_fma_f32 v5, v2, s9, -v4
796; SI-SDAG-NEXT:    v_lshlrev_b32_e32 v0, 5, v0
797; SI-SDAG-NEXT:    v_fma_f32 v5, v2, s11, v5
798; SI-SDAG-NEXT:    v_ldexp_f32_e32 v0, s10, v0
799; SI-SDAG-NEXT:    v_add_f32_e32 v4, v4, v5
800; SI-SDAG-NEXT:    v_log_f32_e32 v5, v0
801; SI-SDAG-NEXT:    v_cmp_lt_f32_e64 s[2:3], |v2|, s12
802; SI-SDAG-NEXT:    v_cndmask_b32_e64 v0, v2, v4, s[2:3]
803; SI-SDAG-NEXT:    v_cndmask_b32_e64 v2, 0, v3, s[0:1]
804; SI-SDAG-NEXT:    v_sub_f32_e32 v0, v0, v2
805; SI-SDAG-NEXT:    v_mul_f32_e32 v2, 0x3f317217, v5
806; SI-SDAG-NEXT:    v_fma_f32 v4, v5, s9, -v2
807; SI-SDAG-NEXT:    v_fma_f32 v4, v5, s11, v4
808; SI-SDAG-NEXT:    v_add_f32_e32 v2, v2, v4
809; SI-SDAG-NEXT:    v_cmp_lt_f32_e64 s[0:1], |v5|, s12
810; SI-SDAG-NEXT:    v_cndmask_b32_e64 v2, v5, v2, s[0:1]
811; SI-SDAG-NEXT:    v_cndmask_b32_e32 v3, 0, v3, vcc
812; SI-SDAG-NEXT:    v_sub_f32_e32 v2, v2, v3
813; SI-SDAG-NEXT:    buffer_store_dword v2, off, s[4:7], 0 offset:8
814; SI-SDAG-NEXT:    buffer_store_dwordx2 v[0:1], off, s[4:7], 0
815; SI-SDAG-NEXT:    s_endpgm
816;
817; SI-GISEL-LABEL: s_log_v3f32:
818; SI-GISEL:       ; %bb.0:
819; SI-GISEL-NEXT:    s_load_dwordx4 s[8:11], s[4:5], 0xd
820; SI-GISEL-NEXT:    s_load_dwordx2 s[4:5], s[4:5], 0x9
821; SI-GISEL-NEXT:    v_mov_b32_e32 v1, 0x800000
822; SI-GISEL-NEXT:    v_mov_b32_e32 v2, 0x3f317217
823; SI-GISEL-NEXT:    v_mov_b32_e32 v3, 0x3377d1cf
824; SI-GISEL-NEXT:    s_waitcnt lgkmcnt(0)
825; SI-GISEL-NEXT:    v_cmp_lt_f32_e32 vcc, s8, v1
826; SI-GISEL-NEXT:    v_cndmask_b32_e64 v0, 0, 1, vcc
827; SI-GISEL-NEXT:    v_lshlrev_b32_e32 v0, 5, v0
828; SI-GISEL-NEXT:    v_ldexp_f32_e32 v0, s8, v0
829; SI-GISEL-NEXT:    v_log_f32_e32 v0, v0
830; SI-GISEL-NEXT:    v_mov_b32_e32 v4, 0x7f800000
831; SI-GISEL-NEXT:    s_mov_b32 s6, -1
832; SI-GISEL-NEXT:    s_mov_b32 s7, 0xf000
833; SI-GISEL-NEXT:    v_mul_f32_e32 v5, 0x3f317217, v0
834; SI-GISEL-NEXT:    v_fma_f32 v6, v0, v2, -v5
835; SI-GISEL-NEXT:    v_fma_f32 v6, v0, v3, v6
836; SI-GISEL-NEXT:    v_add_f32_e32 v5, v5, v6
837; SI-GISEL-NEXT:    v_cmp_lt_f32_e64 s[0:1], |v0|, v4
838; SI-GISEL-NEXT:    v_cndmask_b32_e64 v0, v0, v5, s[0:1]
839; SI-GISEL-NEXT:    v_cmp_lt_f32_e64 s[0:1], s9, v1
840; SI-GISEL-NEXT:    v_cndmask_b32_e64 v5, 0, 1, s[0:1]
841; SI-GISEL-NEXT:    v_lshlrev_b32_e32 v5, 5, v5
842; SI-GISEL-NEXT:    v_ldexp_f32_e32 v5, s9, v5
843; SI-GISEL-NEXT:    v_log_f32_e32 v5, v5
844; SI-GISEL-NEXT:    v_mov_b32_e32 v6, 0x41b17218
845; SI-GISEL-NEXT:    v_cndmask_b32_e32 v7, 0, v6, vcc
846; SI-GISEL-NEXT:    v_cmp_lt_f32_e32 vcc, s10, v1
847; SI-GISEL-NEXT:    v_sub_f32_e32 v0, v0, v7
848; SI-GISEL-NEXT:    v_mul_f32_e32 v7, 0x3f317217, v5
849; SI-GISEL-NEXT:    v_cndmask_b32_e64 v1, 0, 1, vcc
850; SI-GISEL-NEXT:    v_fma_f32 v8, v5, v2, -v7
851; SI-GISEL-NEXT:    v_lshlrev_b32_e32 v1, 5, v1
852; SI-GISEL-NEXT:    v_fma_f32 v8, v5, v3, v8
853; SI-GISEL-NEXT:    v_ldexp_f32_e32 v1, s10, v1
854; SI-GISEL-NEXT:    v_add_f32_e32 v7, v7, v8
855; SI-GISEL-NEXT:    v_log_f32_e32 v8, v1
856; SI-GISEL-NEXT:    v_cmp_lt_f32_e64 s[2:3], |v5|, v4
857; SI-GISEL-NEXT:    v_cndmask_b32_e64 v1, v5, v7, s[2:3]
858; SI-GISEL-NEXT:    v_cndmask_b32_e64 v5, 0, v6, s[0:1]
859; SI-GISEL-NEXT:    v_sub_f32_e32 v1, v1, v5
860; SI-GISEL-NEXT:    v_mul_f32_e32 v5, 0x3f317217, v8
861; SI-GISEL-NEXT:    v_fma_f32 v2, v8, v2, -v5
862; SI-GISEL-NEXT:    v_fma_f32 v2, v8, v3, v2
863; SI-GISEL-NEXT:    v_add_f32_e32 v2, v5, v2
864; SI-GISEL-NEXT:    v_cmp_lt_f32_e64 s[0:1], |v8|, v4
865; SI-GISEL-NEXT:    v_cndmask_b32_e64 v2, v8, v2, s[0:1]
866; SI-GISEL-NEXT:    v_cndmask_b32_e32 v3, 0, v6, vcc
867; SI-GISEL-NEXT:    v_sub_f32_e32 v2, v2, v3
868; SI-GISEL-NEXT:    buffer_store_dwordx2 v[0:1], off, s[4:7], 0
869; SI-GISEL-NEXT:    buffer_store_dword v2, off, s[4:7], 0 offset:8
870; SI-GISEL-NEXT:    s_endpgm
871;
872; VI-SDAG-LABEL: s_log_v3f32:
873; VI-SDAG:       ; %bb.0:
874; VI-SDAG-NEXT:    s_load_dwordx4 s[8:11], s[4:5], 0x34
875; VI-SDAG-NEXT:    v_mov_b32_e32 v0, 0x800000
876; VI-SDAG-NEXT:    s_mov_b32 s6, 0x7f800000
877; VI-SDAG-NEXT:    s_load_dwordx2 s[4:5], s[4:5], 0x24
878; VI-SDAG-NEXT:    s_waitcnt lgkmcnt(0)
879; VI-SDAG-NEXT:    v_cmp_lt_f32_e32 vcc, s10, v0
880; VI-SDAG-NEXT:    v_cndmask_b32_e64 v1, 0, 1, vcc
881; VI-SDAG-NEXT:    v_lshlrev_b32_e32 v1, 5, v1
882; VI-SDAG-NEXT:    v_ldexp_f32 v1, s10, v1
883; VI-SDAG-NEXT:    v_log_f32_e32 v1, v1
884; VI-SDAG-NEXT:    v_and_b32_e32 v2, 0xfffff000, v1
885; VI-SDAG-NEXT:    v_sub_f32_e32 v3, v1, v2
886; VI-SDAG-NEXT:    v_mul_f32_e32 v4, 0x3805fdf4, v2
887; VI-SDAG-NEXT:    v_mul_f32_e32 v5, 0x3f317000, v3
888; VI-SDAG-NEXT:    v_mul_f32_e32 v3, 0x3805fdf4, v3
889; VI-SDAG-NEXT:    v_add_f32_e32 v3, v4, v3
890; VI-SDAG-NEXT:    v_mul_f32_e32 v2, 0x3f317000, v2
891; VI-SDAG-NEXT:    v_add_f32_e32 v3, v5, v3
892; VI-SDAG-NEXT:    v_add_f32_e32 v2, v2, v3
893; VI-SDAG-NEXT:    v_cmp_lt_f32_e64 s[0:1], |v1|, s6
894; VI-SDAG-NEXT:    v_cndmask_b32_e64 v1, v1, v2, s[0:1]
895; VI-SDAG-NEXT:    v_cmp_lt_f32_e64 s[0:1], s9, v0
896; VI-SDAG-NEXT:    v_cndmask_b32_e64 v2, 0, 1, s[0:1]
897; VI-SDAG-NEXT:    v_lshlrev_b32_e32 v2, 5, v2
898; VI-SDAG-NEXT:    v_ldexp_f32 v2, s9, v2
899; VI-SDAG-NEXT:    v_log_f32_e32 v3, v2
900; VI-SDAG-NEXT:    v_mov_b32_e32 v4, 0x41b17218
901; VI-SDAG-NEXT:    v_cndmask_b32_e32 v2, 0, v4, vcc
902; VI-SDAG-NEXT:    v_cmp_lt_f32_e32 vcc, s8, v0
903; VI-SDAG-NEXT:    v_sub_f32_e32 v2, v1, v2
904; VI-SDAG-NEXT:    v_and_b32_e32 v1, 0xfffff000, v3
905; VI-SDAG-NEXT:    v_cndmask_b32_e64 v0, 0, 1, vcc
906; VI-SDAG-NEXT:    v_sub_f32_e32 v5, v3, v1
907; VI-SDAG-NEXT:    v_lshlrev_b32_e32 v0, 5, v0
908; VI-SDAG-NEXT:    v_mul_f32_e32 v6, 0x3f317000, v5
909; VI-SDAG-NEXT:    v_mul_f32_e32 v5, 0x3805fdf4, v5
910; VI-SDAG-NEXT:    v_mul_f32_e32 v7, 0x3805fdf4, v1
911; VI-SDAG-NEXT:    v_ldexp_f32 v0, s8, v0
912; VI-SDAG-NEXT:    v_add_f32_e32 v5, v7, v5
913; VI-SDAG-NEXT:    v_log_f32_e32 v0, v0
914; VI-SDAG-NEXT:    v_add_f32_e32 v5, v6, v5
915; VI-SDAG-NEXT:    v_mul_f32_e32 v1, 0x3f317000, v1
916; VI-SDAG-NEXT:    v_add_f32_e32 v1, v1, v5
917; VI-SDAG-NEXT:    v_cmp_lt_f32_e64 s[2:3], |v3|, s6
918; VI-SDAG-NEXT:    v_cndmask_b32_e64 v1, v3, v1, s[2:3]
919; VI-SDAG-NEXT:    v_cndmask_b32_e64 v3, 0, v4, s[0:1]
920; VI-SDAG-NEXT:    v_sub_f32_e32 v1, v1, v3
921; VI-SDAG-NEXT:    v_and_b32_e32 v3, 0xfffff000, v0
922; VI-SDAG-NEXT:    v_sub_f32_e32 v5, v0, v3
923; VI-SDAG-NEXT:    v_mul_f32_e32 v6, 0x3f317000, v5
924; VI-SDAG-NEXT:    v_mul_f32_e32 v5, 0x3805fdf4, v5
925; VI-SDAG-NEXT:    v_mul_f32_e32 v7, 0x3805fdf4, v3
926; VI-SDAG-NEXT:    v_add_f32_e32 v5, v7, v5
927; VI-SDAG-NEXT:    v_add_f32_e32 v5, v6, v5
928; VI-SDAG-NEXT:    v_mul_f32_e32 v3, 0x3f317000, v3
929; VI-SDAG-NEXT:    v_add_f32_e32 v3, v3, v5
930; VI-SDAG-NEXT:    v_cmp_lt_f32_e64 s[0:1], |v0|, s6
931; VI-SDAG-NEXT:    v_cndmask_b32_e64 v0, v0, v3, s[0:1]
932; VI-SDAG-NEXT:    v_cndmask_b32_e32 v3, 0, v4, vcc
933; VI-SDAG-NEXT:    v_sub_f32_e32 v0, v0, v3
934; VI-SDAG-NEXT:    v_mov_b32_e32 v3, s4
935; VI-SDAG-NEXT:    v_mov_b32_e32 v4, s5
936; VI-SDAG-NEXT:    flat_store_dwordx3 v[3:4], v[0:2]
937; VI-SDAG-NEXT:    s_endpgm
938;
939; VI-GISEL-LABEL: s_log_v3f32:
940; VI-GISEL:       ; %bb.0:
941; VI-GISEL-NEXT:    s_load_dwordx4 s[8:11], s[4:5], 0x34
942; VI-GISEL-NEXT:    v_mov_b32_e32 v1, 0x800000
943; VI-GISEL-NEXT:    v_mov_b32_e32 v2, 0x7f800000
944; VI-GISEL-NEXT:    s_load_dwordx2 s[4:5], s[4:5], 0x24
945; VI-GISEL-NEXT:    s_waitcnt lgkmcnt(0)
946; VI-GISEL-NEXT:    v_cmp_lt_f32_e32 vcc, s8, v1
947; VI-GISEL-NEXT:    v_cndmask_b32_e64 v0, 0, 1, vcc
948; VI-GISEL-NEXT:    v_lshlrev_b32_e32 v0, 5, v0
949; VI-GISEL-NEXT:    v_ldexp_f32 v0, s8, v0
950; VI-GISEL-NEXT:    v_log_f32_e32 v0, v0
951; VI-GISEL-NEXT:    v_and_b32_e32 v3, 0xfffff000, v0
952; VI-GISEL-NEXT:    v_sub_f32_e32 v4, v0, v3
953; VI-GISEL-NEXT:    v_mul_f32_e32 v5, 0x3805fdf4, v3
954; VI-GISEL-NEXT:    v_mul_f32_e32 v6, 0x3805fdf4, v4
955; VI-GISEL-NEXT:    v_mul_f32_e32 v4, 0x3f317000, v4
956; VI-GISEL-NEXT:    v_add_f32_e32 v5, v5, v6
957; VI-GISEL-NEXT:    v_mul_f32_e32 v3, 0x3f317000, v3
958; VI-GISEL-NEXT:    v_add_f32_e32 v4, v4, v5
959; VI-GISEL-NEXT:    v_add_f32_e32 v3, v3, v4
960; VI-GISEL-NEXT:    v_cmp_lt_f32_e64 s[0:1], |v0|, v2
961; VI-GISEL-NEXT:    v_cndmask_b32_e64 v0, v0, v3, s[0:1]
962; VI-GISEL-NEXT:    v_cmp_lt_f32_e64 s[0:1], s9, v1
963; VI-GISEL-NEXT:    v_cndmask_b32_e64 v3, 0, 1, s[0:1]
964; VI-GISEL-NEXT:    v_lshlrev_b32_e32 v3, 5, v3
965; VI-GISEL-NEXT:    v_ldexp_f32 v3, s9, v3
966; VI-GISEL-NEXT:    v_log_f32_e32 v3, v3
967; VI-GISEL-NEXT:    v_mov_b32_e32 v4, 0x41b17218
968; VI-GISEL-NEXT:    v_cndmask_b32_e32 v5, 0, v4, vcc
969; VI-GISEL-NEXT:    v_sub_f32_e32 v0, v0, v5
970; VI-GISEL-NEXT:    v_and_b32_e32 v5, 0xfffff000, v3
971; VI-GISEL-NEXT:    v_sub_f32_e32 v6, v3, v5
972; VI-GISEL-NEXT:    v_cmp_lt_f32_e32 vcc, s10, v1
973; VI-GISEL-NEXT:    v_mul_f32_e32 v7, 0x3805fdf4, v6
974; VI-GISEL-NEXT:    v_mul_f32_e32 v8, 0x3805fdf4, v5
975; VI-GISEL-NEXT:    v_cndmask_b32_e64 v1, 0, 1, vcc
976; VI-GISEL-NEXT:    v_add_f32_e32 v7, v8, v7
977; VI-GISEL-NEXT:    v_mul_f32_e32 v6, 0x3f317000, v6
978; VI-GISEL-NEXT:    v_lshlrev_b32_e32 v1, 5, v1
979; VI-GISEL-NEXT:    v_add_f32_e32 v6, v6, v7
980; VI-GISEL-NEXT:    v_mul_f32_e32 v5, 0x3f317000, v5
981; VI-GISEL-NEXT:    v_ldexp_f32 v1, s10, v1
982; VI-GISEL-NEXT:    v_add_f32_e32 v5, v5, v6
983; VI-GISEL-NEXT:    v_log_f32_e32 v6, v1
984; VI-GISEL-NEXT:    v_cmp_lt_f32_e64 s[2:3], |v3|, v2
985; VI-GISEL-NEXT:    v_cndmask_b32_e64 v1, v3, v5, s[2:3]
986; VI-GISEL-NEXT:    v_cndmask_b32_e64 v3, 0, v4, s[0:1]
987; VI-GISEL-NEXT:    v_sub_f32_e32 v1, v1, v3
988; VI-GISEL-NEXT:    v_and_b32_e32 v3, 0xfffff000, v6
989; VI-GISEL-NEXT:    v_sub_f32_e32 v5, v6, v3
990; VI-GISEL-NEXT:    v_mul_f32_e32 v7, 0x3805fdf4, v5
991; VI-GISEL-NEXT:    v_mul_f32_e32 v8, 0x3805fdf4, v3
992; VI-GISEL-NEXT:    v_add_f32_e32 v7, v8, v7
993; VI-GISEL-NEXT:    v_mul_f32_e32 v5, 0x3f317000, v5
994; VI-GISEL-NEXT:    v_add_f32_e32 v5, v5, v7
995; VI-GISEL-NEXT:    v_mul_f32_e32 v3, 0x3f317000, v3
996; VI-GISEL-NEXT:    v_add_f32_e32 v3, v3, v5
997; VI-GISEL-NEXT:    v_cmp_lt_f32_e64 s[0:1], |v6|, v2
998; VI-GISEL-NEXT:    v_cndmask_b32_e64 v2, v6, v3, s[0:1]
999; VI-GISEL-NEXT:    v_cndmask_b32_e32 v3, 0, v4, vcc
1000; VI-GISEL-NEXT:    v_sub_f32_e32 v2, v2, v3
1001; VI-GISEL-NEXT:    v_mov_b32_e32 v3, s4
1002; VI-GISEL-NEXT:    v_mov_b32_e32 v4, s5
1003; VI-GISEL-NEXT:    flat_store_dwordx3 v[3:4], v[0:2]
1004; VI-GISEL-NEXT:    s_endpgm
1005;
1006; GFX900-SDAG-LABEL: s_log_v3f32:
1007; GFX900-SDAG:       ; %bb.0:
1008; GFX900-SDAG-NEXT:    s_load_dwordx4 s[8:11], s[4:5], 0x34
1009; GFX900-SDAG-NEXT:    s_load_dwordx2 s[6:7], s[4:5], 0x24
1010; GFX900-SDAG-NEXT:    v_mov_b32_e32 v0, 0x800000
1011; GFX900-SDAG-NEXT:    s_mov_b32 s4, 0x3f317217
1012; GFX900-SDAG-NEXT:    s_mov_b32 s5, 0x3377d1cf
1013; GFX900-SDAG-NEXT:    s_waitcnt lgkmcnt(0)
1014; GFX900-SDAG-NEXT:    v_cmp_lt_f32_e32 vcc, s10, v0
1015; GFX900-SDAG-NEXT:    v_cndmask_b32_e64 v1, 0, 1, vcc
1016; GFX900-SDAG-NEXT:    v_lshlrev_b32_e32 v1, 5, v1
1017; GFX900-SDAG-NEXT:    v_ldexp_f32 v1, s10, v1
1018; GFX900-SDAG-NEXT:    v_log_f32_e32 v1, v1
1019; GFX900-SDAG-NEXT:    s_mov_b32 s10, 0x7f800000
1020; GFX900-SDAG-NEXT:    v_mov_b32_e32 v5, 0x41b17218
1021; GFX900-SDAG-NEXT:    v_mov_b32_e32 v3, 0
1022; GFX900-SDAG-NEXT:    v_mul_f32_e32 v2, 0x3f317217, v1
1023; GFX900-SDAG-NEXT:    v_fma_f32 v4, v1, s4, -v2
1024; GFX900-SDAG-NEXT:    v_fma_f32 v4, v1, s5, v4
1025; GFX900-SDAG-NEXT:    v_add_f32_e32 v2, v2, v4
1026; GFX900-SDAG-NEXT:    v_cmp_lt_f32_e64 s[0:1], |v1|, s10
1027; GFX900-SDAG-NEXT:    v_cndmask_b32_e64 v1, v1, v2, s[0:1]
1028; GFX900-SDAG-NEXT:    v_cmp_lt_f32_e64 s[0:1], s9, v0
1029; GFX900-SDAG-NEXT:    v_cndmask_b32_e64 v2, 0, 1, s[0:1]
1030; GFX900-SDAG-NEXT:    v_lshlrev_b32_e32 v2, 5, v2
1031; GFX900-SDAG-NEXT:    v_ldexp_f32 v2, s9, v2
1032; GFX900-SDAG-NEXT:    v_log_f32_e32 v4, v2
1033; GFX900-SDAG-NEXT:    v_cndmask_b32_e32 v2, 0, v5, vcc
1034; GFX900-SDAG-NEXT:    v_cmp_lt_f32_e32 vcc, s8, v0
1035; GFX900-SDAG-NEXT:    v_cndmask_b32_e64 v0, 0, 1, vcc
1036; GFX900-SDAG-NEXT:    v_lshlrev_b32_e32 v0, 5, v0
1037; GFX900-SDAG-NEXT:    v_sub_f32_e32 v2, v1, v2
1038; GFX900-SDAG-NEXT:    v_mul_f32_e32 v1, 0x3f317217, v4
1039; GFX900-SDAG-NEXT:    v_ldexp_f32 v0, s8, v0
1040; GFX900-SDAG-NEXT:    v_fma_f32 v6, v4, s4, -v1
1041; GFX900-SDAG-NEXT:    v_log_f32_e32 v0, v0
1042; GFX900-SDAG-NEXT:    v_fma_f32 v6, v4, s5, v6
1043; GFX900-SDAG-NEXT:    v_add_f32_e32 v1, v1, v6
1044; GFX900-SDAG-NEXT:    v_cmp_lt_f32_e64 s[2:3], |v4|, s10
1045; GFX900-SDAG-NEXT:    v_cndmask_b32_e64 v1, v4, v1, s[2:3]
1046; GFX900-SDAG-NEXT:    v_cndmask_b32_e64 v4, 0, v5, s[0:1]
1047; GFX900-SDAG-NEXT:    v_sub_f32_e32 v1, v1, v4
1048; GFX900-SDAG-NEXT:    v_mul_f32_e32 v4, 0x3f317217, v0
1049; GFX900-SDAG-NEXT:    v_fma_f32 v6, v0, s4, -v4
1050; GFX900-SDAG-NEXT:    v_fma_f32 v6, v0, s5, v6
1051; GFX900-SDAG-NEXT:    v_add_f32_e32 v4, v4, v6
1052; GFX900-SDAG-NEXT:    v_cmp_lt_f32_e64 s[0:1], |v0|, s10
1053; GFX900-SDAG-NEXT:    v_cndmask_b32_e64 v0, v0, v4, s[0:1]
1054; GFX900-SDAG-NEXT:    v_cndmask_b32_e32 v4, 0, v5, vcc
1055; GFX900-SDAG-NEXT:    v_sub_f32_e32 v0, v0, v4
1056; GFX900-SDAG-NEXT:    global_store_dwordx3 v3, v[0:2], s[6:7]
1057; GFX900-SDAG-NEXT:    s_endpgm
1058;
1059; GFX900-GISEL-LABEL: s_log_v3f32:
1060; GFX900-GISEL:       ; %bb.0:
1061; GFX900-GISEL-NEXT:    s_load_dwordx4 s[8:11], s[4:5], 0x34
1062; GFX900-GISEL-NEXT:    s_load_dwordx2 s[6:7], s[4:5], 0x24
1063; GFX900-GISEL-NEXT:    v_mov_b32_e32 v1, 0x800000
1064; GFX900-GISEL-NEXT:    v_mov_b32_e32 v2, 0x3f317217
1065; GFX900-GISEL-NEXT:    v_mov_b32_e32 v4, 0x3377d1cf
1066; GFX900-GISEL-NEXT:    s_waitcnt lgkmcnt(0)
1067; GFX900-GISEL-NEXT:    v_cmp_lt_f32_e32 vcc, s8, v1
1068; GFX900-GISEL-NEXT:    v_cndmask_b32_e64 v0, 0, 1, vcc
1069; GFX900-GISEL-NEXT:    v_lshlrev_b32_e32 v0, 5, v0
1070; GFX900-GISEL-NEXT:    v_ldexp_f32 v0, s8, v0
1071; GFX900-GISEL-NEXT:    v_log_f32_e32 v0, v0
1072; GFX900-GISEL-NEXT:    v_mov_b32_e32 v5, 0x7f800000
1073; GFX900-GISEL-NEXT:    v_mov_b32_e32 v3, 0
1074; GFX900-GISEL-NEXT:    v_mul_f32_e32 v6, 0x3f317217, v0
1075; GFX900-GISEL-NEXT:    v_fma_f32 v7, v0, v2, -v6
1076; GFX900-GISEL-NEXT:    v_fma_f32 v7, v0, v4, v7
1077; GFX900-GISEL-NEXT:    v_add_f32_e32 v6, v6, v7
1078; GFX900-GISEL-NEXT:    v_cmp_lt_f32_e64 s[0:1], |v0|, v5
1079; GFX900-GISEL-NEXT:    v_cndmask_b32_e64 v0, v0, v6, s[0:1]
1080; GFX900-GISEL-NEXT:    v_cmp_lt_f32_e64 s[0:1], s9, v1
1081; GFX900-GISEL-NEXT:    v_cndmask_b32_e64 v6, 0, 1, s[0:1]
1082; GFX900-GISEL-NEXT:    v_lshlrev_b32_e32 v6, 5, v6
1083; GFX900-GISEL-NEXT:    v_ldexp_f32 v6, s9, v6
1084; GFX900-GISEL-NEXT:    v_log_f32_e32 v6, v6
1085; GFX900-GISEL-NEXT:    v_mov_b32_e32 v7, 0x41b17218
1086; GFX900-GISEL-NEXT:    v_cndmask_b32_e32 v8, 0, v7, vcc
1087; GFX900-GISEL-NEXT:    v_cmp_lt_f32_e32 vcc, s10, v1
1088; GFX900-GISEL-NEXT:    v_sub_f32_e32 v0, v0, v8
1089; GFX900-GISEL-NEXT:    v_mul_f32_e32 v8, 0x3f317217, v6
1090; GFX900-GISEL-NEXT:    v_cndmask_b32_e64 v1, 0, 1, vcc
1091; GFX900-GISEL-NEXT:    v_fma_f32 v9, v6, v2, -v8
1092; GFX900-GISEL-NEXT:    v_lshlrev_b32_e32 v1, 5, v1
1093; GFX900-GISEL-NEXT:    v_fma_f32 v9, v6, v4, v9
1094; GFX900-GISEL-NEXT:    v_ldexp_f32 v1, s10, v1
1095; GFX900-GISEL-NEXT:    v_add_f32_e32 v8, v8, v9
1096; GFX900-GISEL-NEXT:    v_log_f32_e32 v9, v1
1097; GFX900-GISEL-NEXT:    v_cmp_lt_f32_e64 s[2:3], |v6|, v5
1098; GFX900-GISEL-NEXT:    v_cndmask_b32_e64 v1, v6, v8, s[2:3]
1099; GFX900-GISEL-NEXT:    v_cndmask_b32_e64 v6, 0, v7, s[0:1]
1100; GFX900-GISEL-NEXT:    v_sub_f32_e32 v1, v1, v6
1101; GFX900-GISEL-NEXT:    v_mul_f32_e32 v6, 0x3f317217, v9
1102; GFX900-GISEL-NEXT:    v_fma_f32 v2, v9, v2, -v6
1103; GFX900-GISEL-NEXT:    v_fma_f32 v2, v9, v4, v2
1104; GFX900-GISEL-NEXT:    v_add_f32_e32 v2, v6, v2
1105; GFX900-GISEL-NEXT:    v_cmp_lt_f32_e64 s[0:1], |v9|, v5
1106; GFX900-GISEL-NEXT:    v_cndmask_b32_e64 v2, v9, v2, s[0:1]
1107; GFX900-GISEL-NEXT:    v_cndmask_b32_e32 v4, 0, v7, vcc
1108; GFX900-GISEL-NEXT:    v_sub_f32_e32 v2, v2, v4
1109; GFX900-GISEL-NEXT:    global_store_dwordx3 v3, v[0:2], s[6:7]
1110; GFX900-GISEL-NEXT:    s_endpgm
1111;
1112; GFX1100-SDAG-LABEL: s_log_v3f32:
1113; GFX1100-SDAG:       ; %bb.0:
1114; GFX1100-SDAG-NEXT:    s_load_b128 s[0:3], s[4:5], 0x34
1115; GFX1100-SDAG-NEXT:    s_waitcnt lgkmcnt(0)
1116; GFX1100-SDAG-NEXT:    v_cmp_gt_f32_e64 s7, 0x800000, s0
1117; GFX1100-SDAG-NEXT:    v_cmp_gt_f32_e64 s3, 0x800000, s2
1118; GFX1100-SDAG-NEXT:    v_cmp_gt_f32_e64 s6, 0x800000, s1
1119; GFX1100-SDAG-NEXT:    s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
1120; GFX1100-SDAG-NEXT:    v_cndmask_b32_e64 v2, 0, 1, s7
1121; GFX1100-SDAG-NEXT:    v_cndmask_b32_e64 v0, 0, 1, s3
1122; GFX1100-SDAG-NEXT:    s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_3) | instid1(VALU_DEP_1)
1123; GFX1100-SDAG-NEXT:    v_cndmask_b32_e64 v1, 0, 1, s6
1124; GFX1100-SDAG-NEXT:    v_cndmask_b32_e64 v9, 0, 0x41b17218, s3
1125; GFX1100-SDAG-NEXT:    v_cndmask_b32_e64 v10, 0, 0x41b17218, s6
1126; GFX1100-SDAG-NEXT:    v_lshlrev_b32_e32 v2, 5, v2
1127; GFX1100-SDAG-NEXT:    v_ldexp_f32 v2, s0, v2
1128; GFX1100-SDAG-NEXT:    s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)
1129; GFX1100-SDAG-NEXT:    v_log_f32_e32 v2, v2
1130; GFX1100-SDAG-NEXT:    s_waitcnt_depctr 0xfff
1131; GFX1100-SDAG-NEXT:    v_dual_mul_f32 v5, 0x3f317217, v2 :: v_dual_lshlrev_b32 v0, 5, v0
1132; GFX1100-SDAG-NEXT:    v_ldexp_f32 v0, s2, v0
1133; GFX1100-SDAG-NEXT:    s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
1134; GFX1100-SDAG-NEXT:    v_fma_f32 v8, 0x3f317217, v2, -v5
1135; GFX1100-SDAG-NEXT:    v_log_f32_e32 v0, v0
1136; GFX1100-SDAG-NEXT:    s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
1137; GFX1100-SDAG-NEXT:    v_fmac_f32_e32 v8, 0x3377d1cf, v2
1138; GFX1100-SDAG-NEXT:    v_add_f32_e32 v5, v5, v8
1139; GFX1100-SDAG-NEXT:    s_waitcnt_depctr 0xfff
1140; GFX1100-SDAG-NEXT:    v_mul_f32_e32 v3, 0x3f317217, v0
1141; GFX1100-SDAG-NEXT:    v_cmp_gt_f32_e64 vcc_lo, 0x7f800000, |v0|
1142; GFX1100-SDAG-NEXT:    s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
1143; GFX1100-SDAG-NEXT:    v_fma_f32 v6, 0x3f317217, v0, -v3
1144; GFX1100-SDAG-NEXT:    v_dual_fmac_f32 v6, 0x3377d1cf, v0 :: v_dual_lshlrev_b32 v1, 5, v1
1145; GFX1100-SDAG-NEXT:    s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
1146; GFX1100-SDAG-NEXT:    v_ldexp_f32 v1, s1, v1
1147; GFX1100-SDAG-NEXT:    s_load_b64 s[0:1], s[4:5], 0x24
1148; GFX1100-SDAG-NEXT:    v_add_f32_e32 v3, v3, v6
1149; GFX1100-SDAG-NEXT:    s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_3) | instid1(VALU_DEP_1)
1150; GFX1100-SDAG-NEXT:    v_log_f32_e32 v1, v1
1151; GFX1100-SDAG-NEXT:    v_cndmask_b32_e64 v6, 0, 0x41b17218, s7
1152; GFX1100-SDAG-NEXT:    s_waitcnt_depctr 0xfff
1153; GFX1100-SDAG-NEXT:    v_mul_f32_e32 v4, 0x3f317217, v1
1154; GFX1100-SDAG-NEXT:    v_fma_f32 v7, 0x3f317217, v1, -v4
1155; GFX1100-SDAG-NEXT:    s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
1156; GFX1100-SDAG-NEXT:    v_fmac_f32_e32 v7, 0x3377d1cf, v1
1157; GFX1100-SDAG-NEXT:    v_add_f32_e32 v4, v4, v7
1158; GFX1100-SDAG-NEXT:    v_cndmask_b32_e32 v0, v0, v3, vcc_lo
1159; GFX1100-SDAG-NEXT:    v_cmp_gt_f32_e64 vcc_lo, 0x7f800000, |v1|
1160; GFX1100-SDAG-NEXT:    s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_2)
1161; GFX1100-SDAG-NEXT:    v_cndmask_b32_e32 v1, v1, v4, vcc_lo
1162; GFX1100-SDAG-NEXT:    v_cmp_gt_f32_e64 vcc_lo, 0x7f800000, |v2|
1163; GFX1100-SDAG-NEXT:    v_dual_mov_b32 v4, 0 :: v_dual_sub_f32 v1, v1, v10
1164; GFX1100-SDAG-NEXT:    v_cndmask_b32_e32 v3, v2, v5, vcc_lo
1165; GFX1100-SDAG-NEXT:    v_sub_f32_e32 v2, v0, v9
1166; GFX1100-SDAG-NEXT:    s_delay_alu instid0(VALU_DEP_2)
1167; GFX1100-SDAG-NEXT:    v_sub_f32_e32 v0, v3, v6
1168; GFX1100-SDAG-NEXT:    s_waitcnt lgkmcnt(0)
1169; GFX1100-SDAG-NEXT:    global_store_b96 v4, v[0:2], s[0:1]
1170; GFX1100-SDAG-NEXT:    s_endpgm
1171;
1172; GFX1100-GISEL-LABEL: s_log_v3f32:
1173; GFX1100-GISEL:       ; %bb.0:
1174; GFX1100-GISEL-NEXT:    s_load_b128 s[0:3], s[4:5], 0x34
1175; GFX1100-GISEL-NEXT:    s_waitcnt lgkmcnt(0)
1176; GFX1100-GISEL-NEXT:    v_cmp_gt_f32_e64 s7, 0x800000, s2
1177; GFX1100-GISEL-NEXT:    v_cmp_gt_f32_e64 s3, 0x800000, s0
1178; GFX1100-GISEL-NEXT:    v_cmp_gt_f32_e64 s6, 0x800000, s1
1179; GFX1100-GISEL-NEXT:    s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
1180; GFX1100-GISEL-NEXT:    v_cndmask_b32_e64 v2, 0, 1, s7
1181; GFX1100-GISEL-NEXT:    v_cndmask_b32_e64 v0, 0, 1, s3
1182; GFX1100-GISEL-NEXT:    s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_3) | instid1(VALU_DEP_1)
1183; GFX1100-GISEL-NEXT:    v_cndmask_b32_e64 v1, 0, 1, s6
1184; GFX1100-GISEL-NEXT:    v_cndmask_b32_e64 v9, 0, 0x41b17218, s3
1185; GFX1100-GISEL-NEXT:    v_cndmask_b32_e64 v10, 0, 0x41b17218, s6
1186; GFX1100-GISEL-NEXT:    v_lshlrev_b32_e32 v2, 5, v2
1187; GFX1100-GISEL-NEXT:    v_ldexp_f32 v2, s2, v2
1188; GFX1100-GISEL-NEXT:    s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)
1189; GFX1100-GISEL-NEXT:    v_log_f32_e32 v2, v2
1190; GFX1100-GISEL-NEXT:    s_waitcnt_depctr 0xfff
1191; GFX1100-GISEL-NEXT:    v_dual_mul_f32 v5, 0x3f317217, v2 :: v_dual_lshlrev_b32 v0, 5, v0
1192; GFX1100-GISEL-NEXT:    v_ldexp_f32 v0, s0, v0
1193; GFX1100-GISEL-NEXT:    s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
1194; GFX1100-GISEL-NEXT:    v_fma_f32 v8, 0x3f317217, v2, -v5
1195; GFX1100-GISEL-NEXT:    v_log_f32_e32 v0, v0
1196; GFX1100-GISEL-NEXT:    s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
1197; GFX1100-GISEL-NEXT:    v_fmac_f32_e32 v8, 0x3377d1cf, v2
1198; GFX1100-GISEL-NEXT:    v_add_f32_e32 v5, v5, v8
1199; GFX1100-GISEL-NEXT:    s_waitcnt_depctr 0xfff
1200; GFX1100-GISEL-NEXT:    v_mul_f32_e32 v3, 0x3f317217, v0
1201; GFX1100-GISEL-NEXT:    v_cmp_gt_f32_e64 vcc_lo, 0x7f800000, |v0|
1202; GFX1100-GISEL-NEXT:    s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
1203; GFX1100-GISEL-NEXT:    v_fma_f32 v6, 0x3f317217, v0, -v3
1204; GFX1100-GISEL-NEXT:    v_dual_fmac_f32 v6, 0x3377d1cf, v0 :: v_dual_lshlrev_b32 v1, 5, v1
1205; GFX1100-GISEL-NEXT:    s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
1206; GFX1100-GISEL-NEXT:    v_ldexp_f32 v1, s1, v1
1207; GFX1100-GISEL-NEXT:    s_load_b64 s[0:1], s[4:5], 0x24
1208; GFX1100-GISEL-NEXT:    v_add_f32_e32 v3, v3, v6
1209; GFX1100-GISEL-NEXT:    s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_3) | instid1(VALU_DEP_1)
1210; GFX1100-GISEL-NEXT:    v_log_f32_e32 v1, v1
1211; GFX1100-GISEL-NEXT:    v_cndmask_b32_e64 v6, 0, 0x41b17218, s7
1212; GFX1100-GISEL-NEXT:    s_waitcnt_depctr 0xfff
1213; GFX1100-GISEL-NEXT:    v_mul_f32_e32 v4, 0x3f317217, v1
1214; GFX1100-GISEL-NEXT:    v_fma_f32 v7, 0x3f317217, v1, -v4
1215; GFX1100-GISEL-NEXT:    s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
1216; GFX1100-GISEL-NEXT:    v_fmac_f32_e32 v7, 0x3377d1cf, v1
1217; GFX1100-GISEL-NEXT:    v_add_f32_e32 v4, v4, v7
1218; GFX1100-GISEL-NEXT:    v_cndmask_b32_e32 v0, v0, v3, vcc_lo
1219; GFX1100-GISEL-NEXT:    v_cmp_gt_f32_e64 vcc_lo, 0x7f800000, |v1|
1220; GFX1100-GISEL-NEXT:    v_mov_b32_e32 v3, 0
1221; GFX1100-GISEL-NEXT:    s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_1) | instid1(VALU_DEP_2)
1222; GFX1100-GISEL-NEXT:    v_cndmask_b32_e32 v1, v1, v4, vcc_lo
1223; GFX1100-GISEL-NEXT:    v_cmp_gt_f32_e64 vcc_lo, 0x7f800000, |v2|
1224; GFX1100-GISEL-NEXT:    v_dual_sub_f32 v0, v0, v9 :: v_dual_sub_f32 v1, v1, v10
1225; GFX1100-GISEL-NEXT:    v_cndmask_b32_e32 v2, v2, v5, vcc_lo
1226; GFX1100-GISEL-NEXT:    s_delay_alu instid0(VALU_DEP_1)
1227; GFX1100-GISEL-NEXT:    v_sub_f32_e32 v2, v2, v6
1228; GFX1100-GISEL-NEXT:    s_waitcnt lgkmcnt(0)
1229; GFX1100-GISEL-NEXT:    global_store_b96 v3, v[0:2], s[0:1]
1230; GFX1100-GISEL-NEXT:    s_endpgm
1231;
1232; R600-LABEL: s_log_v3f32:
1233; R600:       ; %bb.0:
1234; R600-NEXT:    ALU 62, @4, KC0[CB0:0-32], KC1[]
1235; R600-NEXT:    MEM_RAT_CACHELESS STORE_RAW T2.X, T3.X, 0
1236; R600-NEXT:    MEM_RAT_CACHELESS STORE_RAW T1.XY, T0.X, 1
1237; R600-NEXT:    CF_END
1238; R600-NEXT:    ALU clause starting at 4:
1239; R600-NEXT:     SETGT T0.W, literal.x, KC0[3].Z,
1240; R600-NEXT:     SETGT * T1.W, literal.x, KC0[3].Y,
1241; R600-NEXT:    8388608(1.175494e-38), 0(0.000000e+00)
1242; R600-NEXT:     CNDE * T2.W, PV.W, 1.0, literal.x,
1243; R600-NEXT:    1333788672(4.294967e+09), 0(0.000000e+00)
1244; R600-NEXT:     MUL_IEEE T2.W, KC0[3].Z, PV.W,
1245; R600-NEXT:     CNDE * T3.W, T1.W, 1.0, literal.x,
1246; R600-NEXT:    1333788672(4.294967e+09), 0(0.000000e+00)
1247; R600-NEXT:     MUL_IEEE T0.Z, KC0[3].Y, PS,
1248; R600-NEXT:     SETGT T3.W, literal.x, KC0[3].W,
1249; R600-NEXT:     LOG_IEEE * T0.X, PV.W,
1250; R600-NEXT:    8388608(1.175494e-38), 0(0.000000e+00)
1251; R600-NEXT:     AND_INT T1.Z, PS, literal.x,
1252; R600-NEXT:     CNDE T2.W, PV.W, 1.0, literal.y,
1253; R600-NEXT:     LOG_IEEE * T0.Y, PV.Z,
1254; R600-NEXT:    -4096(nan), 1333788672(4.294967e+09)
1255; R600-NEXT:     MUL_IEEE T0.Z, KC0[3].W, PV.W,
1256; R600-NEXT:     ADD T2.W, T0.X, -PV.Z,
1257; R600-NEXT:     AND_INT * T4.W, PS, literal.x,
1258; R600-NEXT:    -4096(nan), 0(0.000000e+00)
1259; R600-NEXT:     ADD T2.Z, T0.Y, -PS,
1260; R600-NEXT:     MUL_IEEE T5.W, PV.W, literal.x,
1261; R600-NEXT:     LOG_IEEE * T0.Z, PV.Z,
1262; R600-NEXT:    939916788(3.194618e-05), 0(0.000000e+00)
1263; R600-NEXT:     MULADD_IEEE T3.Z, T1.Z, literal.x, PV.W,
1264; R600-NEXT:     AND_INT T5.W, PS, literal.y,
1265; R600-NEXT:     MUL_IEEE * T6.W, PV.Z, literal.x,
1266; R600-NEXT:    939916788(3.194618e-05), -4096(nan)
1267; R600-NEXT:     MULADD_IEEE T4.Z, T4.W, literal.x, PS,
1268; R600-NEXT:     ADD T6.W, T0.Z, -PV.W,
1269; R600-NEXT:     MULADD_IEEE * T2.W, T2.W, literal.y, PV.Z, BS:VEC_021/SCL_122
1270; R600-NEXT:    939916788(3.194618e-05), 1060204544(6.931152e-01)
1271; R600-NEXT:     MULADD_IEEE T1.Y, T1.Z, literal.x, PS,
1272; R600-NEXT:     SETGT T1.Z, literal.y, |T0.X|,
1273; R600-NEXT:     MUL_IEEE T2.W, PV.W, literal.z,
1274; R600-NEXT:     MULADD_IEEE * T7.W, T2.Z, literal.x, PV.Z, BS:VEC_021/SCL_122
1275; R600-NEXT:    1060204544(6.931152e-01), 2139095040(INF)
1276; R600-NEXT:    939916788(3.194618e-05), 0(0.000000e+00)
1277; R600-NEXT:     MULADD_IEEE T1.X, T4.W, literal.x, PS,
1278; R600-NEXT:     SETGT T2.Y, literal.y, |T0.Y|,
1279; R600-NEXT:     MULADD_IEEE T2.Z, T5.W, literal.z, PV.W, BS:VEC_120/SCL_212
1280; R600-NEXT:     CNDE T2.W, PV.Z, T0.X, PV.Y,
1281; R600-NEXT:     CNDE * T0.W, T0.W, 0.0, literal.w,
1282; R600-NEXT:    1060204544(6.931152e-01), 2139095040(INF)
1283; R600-NEXT:    939916788(3.194618e-05), 1102148120(2.218071e+01)
1284; R600-NEXT:     ADD T1.Y, PV.W, -PS,
1285; R600-NEXT:     MULADD_IEEE T1.Z, T6.W, literal.x, PV.Z,
1286; R600-NEXT:     CNDE T0.W, PV.Y, T0.Y, PV.X,
1287; R600-NEXT:     CNDE * T1.W, T1.W, 0.0, literal.y,
1288; R600-NEXT:    1060204544(6.931152e-01), 1102148120(2.218071e+01)
1289; R600-NEXT:     ADD T1.X, PV.W, -PS,
1290; R600-NEXT:     MULADD_IEEE T0.W, T5.W, literal.x, PV.Z,
1291; R600-NEXT:     SETGT * T1.W, literal.y, |T0.Z|,
1292; R600-NEXT:    1060204544(6.931152e-01), 2139095040(INF)
1293; R600-NEXT:     LSHR T0.X, KC0[2].Y, literal.x,
1294; R600-NEXT:     CNDE T0.W, PS, T0.Z, PV.W,
1295; R600-NEXT:     CNDE * T1.W, T3.W, 0.0, literal.y,
1296; R600-NEXT:    2(2.802597e-45), 1102148120(2.218071e+01)
1297; R600-NEXT:     ADD T2.X, PV.W, -PS,
1298; R600-NEXT:     ADD_INT * T0.W, KC0[2].Y, literal.x,
1299; R600-NEXT:    8(1.121039e-44), 0(0.000000e+00)
1300; R600-NEXT:     LSHR * T3.X, PV.W, literal.x,
1301; R600-NEXT:    2(2.802597e-45), 0(0.000000e+00)
1302;
1303; CM-LABEL: s_log_v3f32:
1304; CM:       ; %bb.0:
1305; CM-NEXT:    ALU 68, @4, KC0[CB0:0-32], KC1[]
1306; CM-NEXT:    MEM_RAT_CACHELESS STORE_DWORD T0, T2.X
1307; CM-NEXT:    MEM_RAT_CACHELESS STORE_DWORD T4.X, T1.X
1308; CM-NEXT:    CF_END
1309; CM-NEXT:    ALU clause starting at 4:
1310; CM-NEXT:     SETGT * T0.W, literal.x, KC0[3].Y,
1311; CM-NEXT:    8388608(1.175494e-38), 0(0.000000e+00)
1312; CM-NEXT:     CNDE T0.Z, PV.W, 1.0, literal.x,
1313; CM-NEXT:     SETGT * T1.W, literal.y, KC0[3].W,
1314; CM-NEXT:    1333788672(4.294967e+09), 8388608(1.175494e-38)
1315; CM-NEXT:     CNDE T0.Y, PV.W, 1.0, literal.x,
1316; CM-NEXT:     SETGT T1.Z, literal.y, KC0[3].Z,
1317; CM-NEXT:     MUL_IEEE * T2.W, KC0[3].Y, PV.Z,
1318; CM-NEXT:    1333788672(4.294967e+09), 8388608(1.175494e-38)
1319; CM-NEXT:     LOG_IEEE T0.X, T2.W,
1320; CM-NEXT:     LOG_IEEE T0.Y (MASKED), T2.W,
1321; CM-NEXT:     LOG_IEEE T0.Z (MASKED), T2.W,
1322; CM-NEXT:     LOG_IEEE * T0.W (MASKED), T2.W,
1323; CM-NEXT:     CNDE T1.Y, T1.Z, 1.0, literal.x,
1324; CM-NEXT:     AND_INT T0.Z, PV.X, literal.y,
1325; CM-NEXT:     MUL_IEEE * T2.W, KC0[3].W, T0.Y,
1326; CM-NEXT:    1333788672(4.294967e+09), -4096(nan)
1327; CM-NEXT:     LOG_IEEE T0.X (MASKED), T2.W,
1328; CM-NEXT:     LOG_IEEE T0.Y, T2.W,
1329; CM-NEXT:     LOG_IEEE T0.Z (MASKED), T2.W,
1330; CM-NEXT:     LOG_IEEE * T0.W (MASKED), T2.W,
1331; CM-NEXT:     ADD T2.Y, T0.X, -T0.Z,
1332; CM-NEXT:     AND_INT T2.Z, PV.Y, literal.x,
1333; CM-NEXT:     MUL_IEEE * T2.W, KC0[3].Z, T1.Y,
1334; CM-NEXT:    -4096(nan), 0(0.000000e+00)
1335; CM-NEXT:     LOG_IEEE T1.X, T2.W,
1336; CM-NEXT:     LOG_IEEE T1.Y (MASKED), T2.W,
1337; CM-NEXT:     LOG_IEEE T1.Z (MASKED), T2.W,
1338; CM-NEXT:     LOG_IEEE * T1.W (MASKED), T2.W,
1339; CM-NEXT:     ADD T1.Y, T0.Y, -T2.Z,
1340; CM-NEXT:     AND_INT T3.Z, PV.X, literal.x,
1341; CM-NEXT:     MUL_IEEE * T2.W, T2.Y, literal.y, BS:VEC_120/SCL_212
1342; CM-NEXT:    -4096(nan), 939916788(3.194618e-05)
1343; CM-NEXT:     MULADD_IEEE T3.Y, T0.Z, literal.x, PV.W,
1344; CM-NEXT:     ADD T4.Z, T1.X, -PV.Z,
1345; CM-NEXT:     MUL_IEEE * T2.W, PV.Y, literal.x,
1346; CM-NEXT:    939916788(3.194618e-05), 0(0.000000e+00)
1347; CM-NEXT:     MULADD_IEEE T4.Y, T2.Z, literal.x, PV.W,
1348; CM-NEXT:     MUL_IEEE T5.Z, PV.Z, literal.x,
1349; CM-NEXT:     MULADD_IEEE * T2.W, T2.Y, literal.y, PV.Y,
1350; CM-NEXT:    939916788(3.194618e-05), 1060204544(6.931152e-01)
1351; CM-NEXT:     MULADD_IEEE T2.Y, T0.Z, literal.x, PV.W,
1352; CM-NEXT:     MULADD_IEEE T0.Z, T3.Z, literal.y, PV.Z, BS:VEC_120/SCL_212
1353; CM-NEXT:     MULADD_IEEE * T2.W, T1.Y, literal.x, PV.Y,
1354; CM-NEXT:    1060204544(6.931152e-01), 939916788(3.194618e-05)
1355; CM-NEXT:     SETGT T2.X, literal.x, |T0.X|,
1356; CM-NEXT:     MULADD_IEEE T1.Y, T2.Z, literal.y, PV.W,
1357; CM-NEXT:     SETGT T2.Z, literal.x, |T0.Y|,
1358; CM-NEXT:     MULADD_IEEE * T2.W, T4.Z, literal.y, PV.Z, BS:VEC_120/SCL_212
1359; CM-NEXT:    2139095040(INF), 1060204544(6.931152e-01)
1360; CM-NEXT:     MULADD_IEEE T3.X, T3.Z, literal.x, PV.W,
1361; CM-NEXT:     SETGT T3.Y, literal.y, |T1.X|,
1362; CM-NEXT:     CNDE T0.Z, PV.Z, T0.Y, PV.Y,
1363; CM-NEXT:     CNDE * T1.W, T1.W, 0.0, literal.z,
1364; CM-NEXT:    1060204544(6.931152e-01), 2139095040(INF)
1365; CM-NEXT:    1102148120(2.218071e+01), 0(0.000000e+00)
1366; CM-NEXT:     ADD T4.X, PV.Z, -PV.W,
1367; CM-NEXT:     CNDE T0.Y, PV.Y, T1.X, PV.X,
1368; CM-NEXT:     CNDE T0.Z, T1.Z, 0.0, literal.x,
1369; CM-NEXT:     ADD_INT * T1.W, KC0[2].Y, literal.y,
1370; CM-NEXT:    1102148120(2.218071e+01), 8(1.121039e-44)
1371; CM-NEXT:     LSHR T1.X, PV.W, literal.x,
1372; CM-NEXT:     ADD T0.Y, PV.Y, -PV.Z,
1373; CM-NEXT:     CNDE T0.Z, T2.X, T0.X, T2.Y,
1374; CM-NEXT:     CNDE * T0.W, T0.W, 0.0, literal.y,
1375; CM-NEXT:    2(2.802597e-45), 1102148120(2.218071e+01)
1376; CM-NEXT:     ADD * T0.X, PV.Z, -PV.W,
1377; CM-NEXT:     LSHR * T2.X, KC0[2].Y, literal.x,
1378; CM-NEXT:    2(2.802597e-45), 0(0.000000e+00)
1379  %result = call <3 x float> @llvm.log.v3f32(<3 x float> %in)
1380  store <3 x float> %result, ptr addrspace(1) %out
1381  ret void
1382}
1383
1384; FIXME: We should be able to merge these packets together on Cayman so we
1385; have a maximum of 4 instructions.
1386define amdgpu_kernel void @s_log_v4f32(ptr addrspace(1) %out, <4 x float> %in) {
1387; SI-SDAG-LABEL: s_log_v4f32:
1388; SI-SDAG:       ; %bb.0:
1389; SI-SDAG-NEXT:    s_load_dwordx4 s[8:11], s[4:5], 0xd
1390; SI-SDAG-NEXT:    s_load_dwordx2 s[4:5], s[4:5], 0x9
1391; SI-SDAG-NEXT:    v_mov_b32_e32 v0, 0x800000
1392; SI-SDAG-NEXT:    s_mov_b32 s12, 0x3377d1cf
1393; SI-SDAG-NEXT:    s_mov_b32 s13, 0x7f800000
1394; SI-SDAG-NEXT:    s_waitcnt lgkmcnt(0)
1395; SI-SDAG-NEXT:    v_cmp_lt_f32_e32 vcc, s11, v0
1396; SI-SDAG-NEXT:    v_cndmask_b32_e64 v1, 0, 1, vcc
1397; SI-SDAG-NEXT:    v_lshlrev_b32_e32 v1, 5, v1
1398; SI-SDAG-NEXT:    v_ldexp_f32_e32 v1, s11, v1
1399; SI-SDAG-NEXT:    v_log_f32_e32 v1, v1
1400; SI-SDAG-NEXT:    s_mov_b32 s11, 0x3f317217
1401; SI-SDAG-NEXT:    v_mov_b32_e32 v4, 0x41b17218
1402; SI-SDAG-NEXT:    s_mov_b32 s7, 0xf000
1403; SI-SDAG-NEXT:    v_mul_f32_e32 v2, 0x3f317217, v1
1404; SI-SDAG-NEXT:    v_fma_f32 v3, v1, s11, -v2
1405; SI-SDAG-NEXT:    v_fma_f32 v3, v1, s12, v3
1406; SI-SDAG-NEXT:    v_add_f32_e32 v2, v2, v3
1407; SI-SDAG-NEXT:    v_cmp_lt_f32_e64 s[0:1], |v1|, s13
1408; SI-SDAG-NEXT:    v_cndmask_b32_e64 v1, v1, v2, s[0:1]
1409; SI-SDAG-NEXT:    v_cmp_lt_f32_e64 s[0:1], s10, v0
1410; SI-SDAG-NEXT:    v_cndmask_b32_e64 v2, 0, 1, s[0:1]
1411; SI-SDAG-NEXT:    v_lshlrev_b32_e32 v2, 5, v2
1412; SI-SDAG-NEXT:    v_ldexp_f32_e32 v2, s10, v2
1413; SI-SDAG-NEXT:    v_log_f32_e32 v2, v2
1414; SI-SDAG-NEXT:    v_cndmask_b32_e32 v3, 0, v4, vcc
1415; SI-SDAG-NEXT:    v_sub_f32_e32 v3, v1, v3
1416; SI-SDAG-NEXT:    v_cmp_lt_f32_e32 vcc, s9, v0
1417; SI-SDAG-NEXT:    v_mul_f32_e32 v1, 0x3f317217, v2
1418; SI-SDAG-NEXT:    v_fma_f32 v5, v2, s11, -v1
1419; SI-SDAG-NEXT:    v_fma_f32 v5, v2, s12, v5
1420; SI-SDAG-NEXT:    v_add_f32_e32 v1, v1, v5
1421; SI-SDAG-NEXT:    v_cndmask_b32_e64 v5, 0, 1, vcc
1422; SI-SDAG-NEXT:    v_lshlrev_b32_e32 v5, 5, v5
1423; SI-SDAG-NEXT:    v_ldexp_f32_e32 v5, s9, v5
1424; SI-SDAG-NEXT:    v_log_f32_e32 v5, v5
1425; SI-SDAG-NEXT:    v_cmp_lt_f32_e64 s[2:3], |v2|, s13
1426; SI-SDAG-NEXT:    v_cndmask_b32_e64 v1, v2, v1, s[2:3]
1427; SI-SDAG-NEXT:    v_cndmask_b32_e64 v2, 0, v4, s[0:1]
1428; SI-SDAG-NEXT:    v_cmp_lt_f32_e64 s[0:1], s8, v0
1429; SI-SDAG-NEXT:    v_cndmask_b32_e64 v0, 0, 1, s[0:1]
1430; SI-SDAG-NEXT:    v_lshlrev_b32_e32 v0, 5, v0
1431; SI-SDAG-NEXT:    v_sub_f32_e32 v2, v1, v2
1432; SI-SDAG-NEXT:    v_mul_f32_e32 v1, 0x3f317217, v5
1433; SI-SDAG-NEXT:    v_ldexp_f32_e32 v0, s8, v0
1434; SI-SDAG-NEXT:    v_fma_f32 v6, v5, s11, -v1
1435; SI-SDAG-NEXT:    v_log_f32_e32 v0, v0
1436; SI-SDAG-NEXT:    v_fma_f32 v6, v5, s12, v6
1437; SI-SDAG-NEXT:    v_add_f32_e32 v1, v1, v6
1438; SI-SDAG-NEXT:    v_cmp_lt_f32_e64 s[2:3], |v5|, s13
1439; SI-SDAG-NEXT:    v_cndmask_b32_e64 v1, v5, v1, s[2:3]
1440; SI-SDAG-NEXT:    v_cndmask_b32_e32 v5, 0, v4, vcc
1441; SI-SDAG-NEXT:    v_sub_f32_e32 v1, v1, v5
1442; SI-SDAG-NEXT:    v_mul_f32_e32 v5, 0x3f317217, v0
1443; SI-SDAG-NEXT:    v_fma_f32 v6, v0, s11, -v5
1444; SI-SDAG-NEXT:    v_fma_f32 v6, v0, s12, v6
1445; SI-SDAG-NEXT:    v_add_f32_e32 v5, v5, v6
1446; SI-SDAG-NEXT:    v_cmp_lt_f32_e64 vcc, |v0|, s13
1447; SI-SDAG-NEXT:    v_cndmask_b32_e32 v0, v0, v5, vcc
1448; SI-SDAG-NEXT:    v_cndmask_b32_e64 v4, 0, v4, s[0:1]
1449; SI-SDAG-NEXT:    s_mov_b32 s6, -1
1450; SI-SDAG-NEXT:    v_sub_f32_e32 v0, v0, v4
1451; SI-SDAG-NEXT:    buffer_store_dwordx4 v[0:3], off, s[4:7], 0
1452; SI-SDAG-NEXT:    s_endpgm
1453;
1454; SI-GISEL-LABEL: s_log_v4f32:
1455; SI-GISEL:       ; %bb.0:
1456; SI-GISEL-NEXT:    s_load_dwordx4 s[8:11], s[4:5], 0xd
1457; SI-GISEL-NEXT:    s_load_dwordx2 s[4:5], s[4:5], 0x9
1458; SI-GISEL-NEXT:    v_mov_b32_e32 v2, 0x800000
1459; SI-GISEL-NEXT:    v_mov_b32_e32 v3, 0x3f317217
1460; SI-GISEL-NEXT:    v_mov_b32_e32 v4, 0x3377d1cf
1461; SI-GISEL-NEXT:    s_waitcnt lgkmcnt(0)
1462; SI-GISEL-NEXT:    v_cmp_lt_f32_e32 vcc, s8, v2
1463; SI-GISEL-NEXT:    v_cndmask_b32_e64 v0, 0, 1, vcc
1464; SI-GISEL-NEXT:    v_lshlrev_b32_e32 v0, 5, v0
1465; SI-GISEL-NEXT:    v_ldexp_f32_e32 v0, s8, v0
1466; SI-GISEL-NEXT:    v_log_f32_e32 v0, v0
1467; SI-GISEL-NEXT:    v_mov_b32_e32 v5, 0x7f800000
1468; SI-GISEL-NEXT:    s_mov_b32 s6, -1
1469; SI-GISEL-NEXT:    s_mov_b32 s7, 0xf000
1470; SI-GISEL-NEXT:    v_mul_f32_e32 v1, 0x3f317217, v0
1471; SI-GISEL-NEXT:    v_fma_f32 v6, v0, v3, -v1
1472; SI-GISEL-NEXT:    v_fma_f32 v6, v0, v4, v6
1473; SI-GISEL-NEXT:    v_add_f32_e32 v1, v1, v6
1474; SI-GISEL-NEXT:    v_cmp_lt_f32_e64 s[0:1], |v0|, v5
1475; SI-GISEL-NEXT:    v_cndmask_b32_e64 v0, v0, v1, s[0:1]
1476; SI-GISEL-NEXT:    v_cmp_lt_f32_e64 s[0:1], s9, v2
1477; SI-GISEL-NEXT:    v_cndmask_b32_e64 v1, 0, 1, s[0:1]
1478; SI-GISEL-NEXT:    v_lshlrev_b32_e32 v1, 5, v1
1479; SI-GISEL-NEXT:    v_ldexp_f32_e32 v1, s9, v1
1480; SI-GISEL-NEXT:    v_log_f32_e32 v1, v1
1481; SI-GISEL-NEXT:    v_mov_b32_e32 v6, 0x41b17218
1482; SI-GISEL-NEXT:    v_cndmask_b32_e32 v7, 0, v6, vcc
1483; SI-GISEL-NEXT:    v_sub_f32_e32 v0, v0, v7
1484; SI-GISEL-NEXT:    v_mul_f32_e32 v7, 0x3f317217, v1
1485; SI-GISEL-NEXT:    v_fma_f32 v8, v1, v3, -v7
1486; SI-GISEL-NEXT:    v_fma_f32 v8, v1, v4, v8
1487; SI-GISEL-NEXT:    v_cmp_lt_f32_e32 vcc, s10, v2
1488; SI-GISEL-NEXT:    v_add_f32_e32 v7, v7, v8
1489; SI-GISEL-NEXT:    v_cndmask_b32_e64 v8, 0, 1, vcc
1490; SI-GISEL-NEXT:    v_lshlrev_b32_e32 v8, 5, v8
1491; SI-GISEL-NEXT:    v_ldexp_f32_e32 v8, s10, v8
1492; SI-GISEL-NEXT:    v_log_f32_e32 v8, v8
1493; SI-GISEL-NEXT:    v_cmp_lt_f32_e64 s[2:3], |v1|, v5
1494; SI-GISEL-NEXT:    v_cndmask_b32_e64 v1, v1, v7, s[2:3]
1495; SI-GISEL-NEXT:    v_cndmask_b32_e64 v7, 0, v6, s[0:1]
1496; SI-GISEL-NEXT:    v_cmp_lt_f32_e64 s[0:1], s11, v2
1497; SI-GISEL-NEXT:    v_sub_f32_e32 v1, v1, v7
1498; SI-GISEL-NEXT:    v_mul_f32_e32 v7, 0x3f317217, v8
1499; SI-GISEL-NEXT:    v_cndmask_b32_e64 v2, 0, 1, s[0:1]
1500; SI-GISEL-NEXT:    v_fma_f32 v9, v8, v3, -v7
1501; SI-GISEL-NEXT:    v_lshlrev_b32_e32 v2, 5, v2
1502; SI-GISEL-NEXT:    v_fma_f32 v9, v8, v4, v9
1503; SI-GISEL-NEXT:    v_ldexp_f32_e32 v2, s11, v2
1504; SI-GISEL-NEXT:    v_add_f32_e32 v7, v7, v9
1505; SI-GISEL-NEXT:    v_log_f32_e32 v9, v2
1506; SI-GISEL-NEXT:    v_cmp_lt_f32_e64 s[2:3], |v8|, v5
1507; SI-GISEL-NEXT:    v_cndmask_b32_e64 v2, v8, v7, s[2:3]
1508; SI-GISEL-NEXT:    v_cndmask_b32_e32 v7, 0, v6, vcc
1509; SI-GISEL-NEXT:    v_sub_f32_e32 v2, v2, v7
1510; SI-GISEL-NEXT:    v_mul_f32_e32 v7, 0x3f317217, v9
1511; SI-GISEL-NEXT:    v_fma_f32 v3, v9, v3, -v7
1512; SI-GISEL-NEXT:    v_fma_f32 v3, v9, v4, v3
1513; SI-GISEL-NEXT:    v_add_f32_e32 v3, v7, v3
1514; SI-GISEL-NEXT:    v_cmp_lt_f32_e64 vcc, |v9|, v5
1515; SI-GISEL-NEXT:    v_cndmask_b32_e32 v3, v9, v3, vcc
1516; SI-GISEL-NEXT:    v_cndmask_b32_e64 v4, 0, v6, s[0:1]
1517; SI-GISEL-NEXT:    v_sub_f32_e32 v3, v3, v4
1518; SI-GISEL-NEXT:    buffer_store_dwordx4 v[0:3], off, s[4:7], 0
1519; SI-GISEL-NEXT:    s_endpgm
1520;
1521; VI-SDAG-LABEL: s_log_v4f32:
1522; VI-SDAG:       ; %bb.0:
1523; VI-SDAG-NEXT:    s_load_dwordx4 s[8:11], s[4:5], 0x34
1524; VI-SDAG-NEXT:    v_mov_b32_e32 v0, 0x800000
1525; VI-SDAG-NEXT:    s_mov_b32 s6, 0x7f800000
1526; VI-SDAG-NEXT:    s_load_dwordx2 s[4:5], s[4:5], 0x24
1527; VI-SDAG-NEXT:    s_waitcnt lgkmcnt(0)
1528; VI-SDAG-NEXT:    v_cmp_lt_f32_e32 vcc, s11, v0
1529; VI-SDAG-NEXT:    v_cndmask_b32_e64 v1, 0, 1, vcc
1530; VI-SDAG-NEXT:    v_lshlrev_b32_e32 v1, 5, v1
1531; VI-SDAG-NEXT:    v_ldexp_f32 v1, s11, v1
1532; VI-SDAG-NEXT:    v_log_f32_e32 v1, v1
1533; VI-SDAG-NEXT:    v_and_b32_e32 v2, 0xfffff000, v1
1534; VI-SDAG-NEXT:    v_sub_f32_e32 v3, v1, v2
1535; VI-SDAG-NEXT:    v_mul_f32_e32 v4, 0x3805fdf4, v2
1536; VI-SDAG-NEXT:    v_mul_f32_e32 v5, 0x3f317000, v3
1537; VI-SDAG-NEXT:    v_mul_f32_e32 v3, 0x3805fdf4, v3
1538; VI-SDAG-NEXT:    v_add_f32_e32 v3, v4, v3
1539; VI-SDAG-NEXT:    v_mul_f32_e32 v2, 0x3f317000, v2
1540; VI-SDAG-NEXT:    v_add_f32_e32 v3, v5, v3
1541; VI-SDAG-NEXT:    v_add_f32_e32 v2, v2, v3
1542; VI-SDAG-NEXT:    v_cmp_lt_f32_e64 s[0:1], |v1|, s6
1543; VI-SDAG-NEXT:    v_cndmask_b32_e64 v1, v1, v2, s[0:1]
1544; VI-SDAG-NEXT:    v_cmp_lt_f32_e64 s[0:1], s10, v0
1545; VI-SDAG-NEXT:    v_cndmask_b32_e64 v2, 0, 1, s[0:1]
1546; VI-SDAG-NEXT:    v_lshlrev_b32_e32 v2, 5, v2
1547; VI-SDAG-NEXT:    v_ldexp_f32 v2, s10, v2
1548; VI-SDAG-NEXT:    v_log_f32_e32 v2, v2
1549; VI-SDAG-NEXT:    v_mov_b32_e32 v4, 0x41b17218
1550; VI-SDAG-NEXT:    v_cndmask_b32_e32 v3, 0, v4, vcc
1551; VI-SDAG-NEXT:    v_sub_f32_e32 v3, v1, v3
1552; VI-SDAG-NEXT:    v_and_b32_e32 v1, 0xfffff000, v2
1553; VI-SDAG-NEXT:    v_sub_f32_e32 v5, v2, v1
1554; VI-SDAG-NEXT:    v_mul_f32_e32 v6, 0x3f317000, v5
1555; VI-SDAG-NEXT:    v_mul_f32_e32 v5, 0x3805fdf4, v5
1556; VI-SDAG-NEXT:    v_mul_f32_e32 v7, 0x3805fdf4, v1
1557; VI-SDAG-NEXT:    v_add_f32_e32 v5, v7, v5
1558; VI-SDAG-NEXT:    v_add_f32_e32 v5, v6, v5
1559; VI-SDAG-NEXT:    v_mul_f32_e32 v1, 0x3f317000, v1
1560; VI-SDAG-NEXT:    v_cmp_lt_f32_e32 vcc, s9, v0
1561; VI-SDAG-NEXT:    v_add_f32_e32 v1, v1, v5
1562; VI-SDAG-NEXT:    v_cndmask_b32_e64 v5, 0, 1, vcc
1563; VI-SDAG-NEXT:    v_lshlrev_b32_e32 v5, 5, v5
1564; VI-SDAG-NEXT:    v_ldexp_f32 v5, s9, v5
1565; VI-SDAG-NEXT:    v_log_f32_e32 v5, v5
1566; VI-SDAG-NEXT:    v_cmp_lt_f32_e64 s[2:3], |v2|, s6
1567; VI-SDAG-NEXT:    v_cndmask_b32_e64 v1, v2, v1, s[2:3]
1568; VI-SDAG-NEXT:    v_cndmask_b32_e64 v2, 0, v4, s[0:1]
1569; VI-SDAG-NEXT:    v_cmp_lt_f32_e64 s[0:1], s8, v0
1570; VI-SDAG-NEXT:    v_sub_f32_e32 v2, v1, v2
1571; VI-SDAG-NEXT:    v_and_b32_e32 v1, 0xfffff000, v5
1572; VI-SDAG-NEXT:    v_cndmask_b32_e64 v0, 0, 1, s[0:1]
1573; VI-SDAG-NEXT:    v_sub_f32_e32 v6, v5, v1
1574; VI-SDAG-NEXT:    v_lshlrev_b32_e32 v0, 5, v0
1575; VI-SDAG-NEXT:    v_mul_f32_e32 v7, 0x3f317000, v6
1576; VI-SDAG-NEXT:    v_mul_f32_e32 v6, 0x3805fdf4, v6
1577; VI-SDAG-NEXT:    v_mul_f32_e32 v8, 0x3805fdf4, v1
1578; VI-SDAG-NEXT:    v_ldexp_f32 v0, s8, v0
1579; VI-SDAG-NEXT:    v_add_f32_e32 v6, v8, v6
1580; VI-SDAG-NEXT:    v_log_f32_e32 v0, v0
1581; VI-SDAG-NEXT:    v_add_f32_e32 v6, v7, v6
1582; VI-SDAG-NEXT:    v_mul_f32_e32 v1, 0x3f317000, v1
1583; VI-SDAG-NEXT:    v_add_f32_e32 v1, v1, v6
1584; VI-SDAG-NEXT:    v_cmp_lt_f32_e64 s[2:3], |v5|, s6
1585; VI-SDAG-NEXT:    v_cndmask_b32_e64 v1, v5, v1, s[2:3]
1586; VI-SDAG-NEXT:    v_cndmask_b32_e32 v5, 0, v4, vcc
1587; VI-SDAG-NEXT:    v_sub_f32_e32 v1, v1, v5
1588; VI-SDAG-NEXT:    v_and_b32_e32 v5, 0xfffff000, v0
1589; VI-SDAG-NEXT:    v_sub_f32_e32 v6, v0, v5
1590; VI-SDAG-NEXT:    v_mul_f32_e32 v7, 0x3f317000, v6
1591; VI-SDAG-NEXT:    v_mul_f32_e32 v6, 0x3805fdf4, v6
1592; VI-SDAG-NEXT:    v_mul_f32_e32 v8, 0x3805fdf4, v5
1593; VI-SDAG-NEXT:    v_add_f32_e32 v6, v8, v6
1594; VI-SDAG-NEXT:    v_add_f32_e32 v6, v7, v6
1595; VI-SDAG-NEXT:    v_mul_f32_e32 v5, 0x3f317000, v5
1596; VI-SDAG-NEXT:    v_add_f32_e32 v5, v5, v6
1597; VI-SDAG-NEXT:    v_cmp_lt_f32_e64 vcc, |v0|, s6
1598; VI-SDAG-NEXT:    v_cndmask_b32_e32 v0, v0, v5, vcc
1599; VI-SDAG-NEXT:    v_cndmask_b32_e64 v4, 0, v4, s[0:1]
1600; VI-SDAG-NEXT:    v_sub_f32_e32 v0, v0, v4
1601; VI-SDAG-NEXT:    v_mov_b32_e32 v4, s4
1602; VI-SDAG-NEXT:    v_mov_b32_e32 v5, s5
1603; VI-SDAG-NEXT:    flat_store_dwordx4 v[4:5], v[0:3]
1604; VI-SDAG-NEXT:    s_endpgm
1605;
1606; VI-GISEL-LABEL: s_log_v4f32:
1607; VI-GISEL:       ; %bb.0:
1608; VI-GISEL-NEXT:    s_load_dwordx4 s[8:11], s[4:5], 0x34
1609; VI-GISEL-NEXT:    v_mov_b32_e32 v2, 0x800000
1610; VI-GISEL-NEXT:    v_mov_b32_e32 v3, 0x7f800000
1611; VI-GISEL-NEXT:    s_load_dwordx2 s[4:5], s[4:5], 0x24
1612; VI-GISEL-NEXT:    s_waitcnt lgkmcnt(0)
1613; VI-GISEL-NEXT:    v_cmp_lt_f32_e32 vcc, s8, v2
1614; VI-GISEL-NEXT:    v_cndmask_b32_e64 v0, 0, 1, vcc
1615; VI-GISEL-NEXT:    v_lshlrev_b32_e32 v0, 5, v0
1616; VI-GISEL-NEXT:    v_ldexp_f32 v0, s8, v0
1617; VI-GISEL-NEXT:    v_log_f32_e32 v0, v0
1618; VI-GISEL-NEXT:    v_and_b32_e32 v1, 0xfffff000, v0
1619; VI-GISEL-NEXT:    v_sub_f32_e32 v4, v0, v1
1620; VI-GISEL-NEXT:    v_mul_f32_e32 v5, 0x3805fdf4, v1
1621; VI-GISEL-NEXT:    v_mul_f32_e32 v6, 0x3805fdf4, v4
1622; VI-GISEL-NEXT:    v_mul_f32_e32 v4, 0x3f317000, v4
1623; VI-GISEL-NEXT:    v_add_f32_e32 v5, v5, v6
1624; VI-GISEL-NEXT:    v_mul_f32_e32 v1, 0x3f317000, v1
1625; VI-GISEL-NEXT:    v_add_f32_e32 v4, v4, v5
1626; VI-GISEL-NEXT:    v_add_f32_e32 v1, v1, v4
1627; VI-GISEL-NEXT:    v_cmp_lt_f32_e64 s[0:1], |v0|, v3
1628; VI-GISEL-NEXT:    v_cndmask_b32_e64 v0, v0, v1, s[0:1]
1629; VI-GISEL-NEXT:    v_cmp_lt_f32_e64 s[0:1], s9, v2
1630; VI-GISEL-NEXT:    v_cndmask_b32_e64 v1, 0, 1, s[0:1]
1631; VI-GISEL-NEXT:    v_lshlrev_b32_e32 v1, 5, v1
1632; VI-GISEL-NEXT:    v_ldexp_f32 v1, s9, v1
1633; VI-GISEL-NEXT:    v_log_f32_e32 v1, v1
1634; VI-GISEL-NEXT:    v_mov_b32_e32 v4, 0x41b17218
1635; VI-GISEL-NEXT:    v_cndmask_b32_e32 v5, 0, v4, vcc
1636; VI-GISEL-NEXT:    v_sub_f32_e32 v0, v0, v5
1637; VI-GISEL-NEXT:    v_and_b32_e32 v5, 0xfffff000, v1
1638; VI-GISEL-NEXT:    v_sub_f32_e32 v6, v1, v5
1639; VI-GISEL-NEXT:    v_mul_f32_e32 v7, 0x3805fdf4, v6
1640; VI-GISEL-NEXT:    v_mul_f32_e32 v8, 0x3805fdf4, v5
1641; VI-GISEL-NEXT:    v_add_f32_e32 v7, v8, v7
1642; VI-GISEL-NEXT:    v_mul_f32_e32 v6, 0x3f317000, v6
1643; VI-GISEL-NEXT:    v_add_f32_e32 v6, v6, v7
1644; VI-GISEL-NEXT:    v_mul_f32_e32 v5, 0x3f317000, v5
1645; VI-GISEL-NEXT:    v_cmp_lt_f32_e32 vcc, s10, v2
1646; VI-GISEL-NEXT:    v_add_f32_e32 v5, v5, v6
1647; VI-GISEL-NEXT:    v_cndmask_b32_e64 v6, 0, 1, vcc
1648; VI-GISEL-NEXT:    v_lshlrev_b32_e32 v6, 5, v6
1649; VI-GISEL-NEXT:    v_ldexp_f32 v6, s10, v6
1650; VI-GISEL-NEXT:    v_log_f32_e32 v6, v6
1651; VI-GISEL-NEXT:    v_cmp_lt_f32_e64 s[2:3], |v1|, v3
1652; VI-GISEL-NEXT:    v_cndmask_b32_e64 v1, v1, v5, s[2:3]
1653; VI-GISEL-NEXT:    v_cndmask_b32_e64 v5, 0, v4, s[0:1]
1654; VI-GISEL-NEXT:    v_sub_f32_e32 v1, v1, v5
1655; VI-GISEL-NEXT:    v_and_b32_e32 v5, 0xfffff000, v6
1656; VI-GISEL-NEXT:    v_sub_f32_e32 v7, v6, v5
1657; VI-GISEL-NEXT:    v_cmp_lt_f32_e64 s[0:1], s11, v2
1658; VI-GISEL-NEXT:    v_mul_f32_e32 v8, 0x3805fdf4, v7
1659; VI-GISEL-NEXT:    v_mul_f32_e32 v9, 0x3805fdf4, v5
1660; VI-GISEL-NEXT:    v_cndmask_b32_e64 v2, 0, 1, s[0:1]
1661; VI-GISEL-NEXT:    v_add_f32_e32 v8, v9, v8
1662; VI-GISEL-NEXT:    v_mul_f32_e32 v7, 0x3f317000, v7
1663; VI-GISEL-NEXT:    v_lshlrev_b32_e32 v2, 5, v2
1664; VI-GISEL-NEXT:    v_add_f32_e32 v7, v7, v8
1665; VI-GISEL-NEXT:    v_mul_f32_e32 v5, 0x3f317000, v5
1666; VI-GISEL-NEXT:    v_ldexp_f32 v2, s11, v2
1667; VI-GISEL-NEXT:    v_add_f32_e32 v5, v5, v7
1668; VI-GISEL-NEXT:    v_log_f32_e32 v7, v2
1669; VI-GISEL-NEXT:    v_cmp_lt_f32_e64 s[2:3], |v6|, v3
1670; VI-GISEL-NEXT:    v_cndmask_b32_e64 v2, v6, v5, s[2:3]
1671; VI-GISEL-NEXT:    v_cndmask_b32_e32 v5, 0, v4, vcc
1672; VI-GISEL-NEXT:    v_sub_f32_e32 v2, v2, v5
1673; VI-GISEL-NEXT:    v_and_b32_e32 v5, 0xfffff000, v7
1674; VI-GISEL-NEXT:    v_sub_f32_e32 v6, v7, v5
1675; VI-GISEL-NEXT:    v_mul_f32_e32 v8, 0x3805fdf4, v6
1676; VI-GISEL-NEXT:    v_mul_f32_e32 v9, 0x3805fdf4, v5
1677; VI-GISEL-NEXT:    v_add_f32_e32 v8, v9, v8
1678; VI-GISEL-NEXT:    v_mul_f32_e32 v6, 0x3f317000, v6
1679; VI-GISEL-NEXT:    v_add_f32_e32 v6, v6, v8
1680; VI-GISEL-NEXT:    v_mul_f32_e32 v5, 0x3f317000, v5
1681; VI-GISEL-NEXT:    v_add_f32_e32 v5, v5, v6
1682; VI-GISEL-NEXT:    v_cmp_lt_f32_e64 vcc, |v7|, v3
1683; VI-GISEL-NEXT:    v_cndmask_b32_e32 v3, v7, v5, vcc
1684; VI-GISEL-NEXT:    v_cndmask_b32_e64 v4, 0, v4, s[0:1]
1685; VI-GISEL-NEXT:    v_sub_f32_e32 v3, v3, v4
1686; VI-GISEL-NEXT:    v_mov_b32_e32 v4, s4
1687; VI-GISEL-NEXT:    v_mov_b32_e32 v5, s5
1688; VI-GISEL-NEXT:    flat_store_dwordx4 v[4:5], v[0:3]
1689; VI-GISEL-NEXT:    s_endpgm
1690;
1691; GFX900-SDAG-LABEL: s_log_v4f32:
1692; GFX900-SDAG:       ; %bb.0:
1693; GFX900-SDAG-NEXT:    s_load_dwordx4 s[8:11], s[4:5], 0x34
1694; GFX900-SDAG-NEXT:    s_load_dwordx2 s[6:7], s[4:5], 0x24
1695; GFX900-SDAG-NEXT:    v_mov_b32_e32 v0, 0x800000
1696; GFX900-SDAG-NEXT:    s_mov_b32 s4, 0x3f317217
1697; GFX900-SDAG-NEXT:    s_mov_b32 s5, 0x3377d1cf
1698; GFX900-SDAG-NEXT:    s_waitcnt lgkmcnt(0)
1699; GFX900-SDAG-NEXT:    v_cmp_lt_f32_e32 vcc, s11, v0
1700; GFX900-SDAG-NEXT:    v_cndmask_b32_e64 v1, 0, 1, vcc
1701; GFX900-SDAG-NEXT:    v_lshlrev_b32_e32 v1, 5, v1
1702; GFX900-SDAG-NEXT:    v_ldexp_f32 v1, s11, v1
1703; GFX900-SDAG-NEXT:    v_log_f32_e32 v1, v1
1704; GFX900-SDAG-NEXT:    s_mov_b32 s11, 0x7f800000
1705; GFX900-SDAG-NEXT:    v_mov_b32_e32 v5, 0x41b17218
1706; GFX900-SDAG-NEXT:    v_mov_b32_e32 v4, 0
1707; GFX900-SDAG-NEXT:    v_mul_f32_e32 v2, 0x3f317217, v1
1708; GFX900-SDAG-NEXT:    v_fma_f32 v3, v1, s4, -v2
1709; GFX900-SDAG-NEXT:    v_fma_f32 v3, v1, s5, v3
1710; GFX900-SDAG-NEXT:    v_add_f32_e32 v2, v2, v3
1711; GFX900-SDAG-NEXT:    v_cmp_lt_f32_e64 s[0:1], |v1|, s11
1712; GFX900-SDAG-NEXT:    v_cndmask_b32_e64 v1, v1, v2, s[0:1]
1713; GFX900-SDAG-NEXT:    v_cmp_lt_f32_e64 s[0:1], s10, v0
1714; GFX900-SDAG-NEXT:    v_cndmask_b32_e64 v2, 0, 1, s[0:1]
1715; GFX900-SDAG-NEXT:    v_lshlrev_b32_e32 v2, 5, v2
1716; GFX900-SDAG-NEXT:    v_ldexp_f32 v2, s10, v2
1717; GFX900-SDAG-NEXT:    v_log_f32_e32 v2, v2
1718; GFX900-SDAG-NEXT:    v_cndmask_b32_e32 v3, 0, v5, vcc
1719; GFX900-SDAG-NEXT:    v_sub_f32_e32 v3, v1, v3
1720; GFX900-SDAG-NEXT:    v_cmp_lt_f32_e32 vcc, s9, v0
1721; GFX900-SDAG-NEXT:    v_mul_f32_e32 v1, 0x3f317217, v2
1722; GFX900-SDAG-NEXT:    v_fma_f32 v6, v2, s4, -v1
1723; GFX900-SDAG-NEXT:    v_fma_f32 v6, v2, s5, v6
1724; GFX900-SDAG-NEXT:    v_add_f32_e32 v1, v1, v6
1725; GFX900-SDAG-NEXT:    v_cndmask_b32_e64 v6, 0, 1, vcc
1726; GFX900-SDAG-NEXT:    v_lshlrev_b32_e32 v6, 5, v6
1727; GFX900-SDAG-NEXT:    v_ldexp_f32 v6, s9, v6
1728; GFX900-SDAG-NEXT:    v_log_f32_e32 v6, v6
1729; GFX900-SDAG-NEXT:    v_cmp_lt_f32_e64 s[2:3], |v2|, s11
1730; GFX900-SDAG-NEXT:    v_cndmask_b32_e64 v1, v2, v1, s[2:3]
1731; GFX900-SDAG-NEXT:    v_cndmask_b32_e64 v2, 0, v5, s[0:1]
1732; GFX900-SDAG-NEXT:    v_cmp_lt_f32_e64 s[0:1], s8, v0
1733; GFX900-SDAG-NEXT:    v_cndmask_b32_e64 v0, 0, 1, s[0:1]
1734; GFX900-SDAG-NEXT:    v_lshlrev_b32_e32 v0, 5, v0
1735; GFX900-SDAG-NEXT:    v_sub_f32_e32 v2, v1, v2
1736; GFX900-SDAG-NEXT:    v_mul_f32_e32 v1, 0x3f317217, v6
1737; GFX900-SDAG-NEXT:    v_ldexp_f32 v0, s8, v0
1738; GFX900-SDAG-NEXT:    v_fma_f32 v7, v6, s4, -v1
1739; GFX900-SDAG-NEXT:    v_log_f32_e32 v0, v0
1740; GFX900-SDAG-NEXT:    v_fma_f32 v7, v6, s5, v7
1741; GFX900-SDAG-NEXT:    v_add_f32_e32 v1, v1, v7
1742; GFX900-SDAG-NEXT:    v_cmp_lt_f32_e64 s[2:3], |v6|, s11
1743; GFX900-SDAG-NEXT:    v_cndmask_b32_e64 v1, v6, v1, s[2:3]
1744; GFX900-SDAG-NEXT:    v_cndmask_b32_e32 v6, 0, v5, vcc
1745; GFX900-SDAG-NEXT:    v_sub_f32_e32 v1, v1, v6
1746; GFX900-SDAG-NEXT:    v_mul_f32_e32 v6, 0x3f317217, v0
1747; GFX900-SDAG-NEXT:    v_fma_f32 v7, v0, s4, -v6
1748; GFX900-SDAG-NEXT:    v_fma_f32 v7, v0, s5, v7
1749; GFX900-SDAG-NEXT:    v_add_f32_e32 v6, v6, v7
1750; GFX900-SDAG-NEXT:    v_cmp_lt_f32_e64 vcc, |v0|, s11
1751; GFX900-SDAG-NEXT:    v_cndmask_b32_e32 v0, v0, v6, vcc
1752; GFX900-SDAG-NEXT:    v_cndmask_b32_e64 v5, 0, v5, s[0:1]
1753; GFX900-SDAG-NEXT:    v_sub_f32_e32 v0, v0, v5
1754; GFX900-SDAG-NEXT:    global_store_dwordx4 v4, v[0:3], s[6:7]
1755; GFX900-SDAG-NEXT:    s_endpgm
1756;
1757; GFX900-GISEL-LABEL: s_log_v4f32:
1758; GFX900-GISEL:       ; %bb.0:
1759; GFX900-GISEL-NEXT:    s_load_dwordx4 s[8:11], s[4:5], 0x34
1760; GFX900-GISEL-NEXT:    s_load_dwordx2 s[6:7], s[4:5], 0x24
1761; GFX900-GISEL-NEXT:    v_mov_b32_e32 v2, 0x800000
1762; GFX900-GISEL-NEXT:    v_mov_b32_e32 v3, 0x3f317217
1763; GFX900-GISEL-NEXT:    v_mov_b32_e32 v5, 0x3377d1cf
1764; GFX900-GISEL-NEXT:    s_waitcnt lgkmcnt(0)
1765; GFX900-GISEL-NEXT:    v_cmp_lt_f32_e32 vcc, s8, v2
1766; GFX900-GISEL-NEXT:    v_cndmask_b32_e64 v0, 0, 1, vcc
1767; GFX900-GISEL-NEXT:    v_lshlrev_b32_e32 v0, 5, v0
1768; GFX900-GISEL-NEXT:    v_ldexp_f32 v0, s8, v0
1769; GFX900-GISEL-NEXT:    v_log_f32_e32 v0, v0
1770; GFX900-GISEL-NEXT:    v_mov_b32_e32 v6, 0x7f800000
1771; GFX900-GISEL-NEXT:    v_mov_b32_e32 v4, 0
1772; GFX900-GISEL-NEXT:    v_mul_f32_e32 v1, 0x3f317217, v0
1773; GFX900-GISEL-NEXT:    v_fma_f32 v7, v0, v3, -v1
1774; GFX900-GISEL-NEXT:    v_fma_f32 v7, v0, v5, v7
1775; GFX900-GISEL-NEXT:    v_add_f32_e32 v1, v1, v7
1776; GFX900-GISEL-NEXT:    v_cmp_lt_f32_e64 s[0:1], |v0|, v6
1777; GFX900-GISEL-NEXT:    v_cndmask_b32_e64 v0, v0, v1, s[0:1]
1778; GFX900-GISEL-NEXT:    v_cmp_lt_f32_e64 s[0:1], s9, v2
1779; GFX900-GISEL-NEXT:    v_cndmask_b32_e64 v1, 0, 1, s[0:1]
1780; GFX900-GISEL-NEXT:    v_lshlrev_b32_e32 v1, 5, v1
1781; GFX900-GISEL-NEXT:    v_ldexp_f32 v1, s9, v1
1782; GFX900-GISEL-NEXT:    v_log_f32_e32 v1, v1
1783; GFX900-GISEL-NEXT:    v_mov_b32_e32 v7, 0x41b17218
1784; GFX900-GISEL-NEXT:    v_cndmask_b32_e32 v8, 0, v7, vcc
1785; GFX900-GISEL-NEXT:    v_sub_f32_e32 v0, v0, v8
1786; GFX900-GISEL-NEXT:    v_mul_f32_e32 v8, 0x3f317217, v1
1787; GFX900-GISEL-NEXT:    v_fma_f32 v9, v1, v3, -v8
1788; GFX900-GISEL-NEXT:    v_fma_f32 v9, v1, v5, v9
1789; GFX900-GISEL-NEXT:    v_cmp_lt_f32_e32 vcc, s10, v2
1790; GFX900-GISEL-NEXT:    v_add_f32_e32 v8, v8, v9
1791; GFX900-GISEL-NEXT:    v_cndmask_b32_e64 v9, 0, 1, vcc
1792; GFX900-GISEL-NEXT:    v_lshlrev_b32_e32 v9, 5, v9
1793; GFX900-GISEL-NEXT:    v_ldexp_f32 v9, s10, v9
1794; GFX900-GISEL-NEXT:    v_log_f32_e32 v9, v9
1795; GFX900-GISEL-NEXT:    v_cmp_lt_f32_e64 s[2:3], |v1|, v6
1796; GFX900-GISEL-NEXT:    v_cndmask_b32_e64 v1, v1, v8, s[2:3]
1797; GFX900-GISEL-NEXT:    v_cndmask_b32_e64 v8, 0, v7, s[0:1]
1798; GFX900-GISEL-NEXT:    v_cmp_lt_f32_e64 s[0:1], s11, v2
1799; GFX900-GISEL-NEXT:    v_sub_f32_e32 v1, v1, v8
1800; GFX900-GISEL-NEXT:    v_mul_f32_e32 v8, 0x3f317217, v9
1801; GFX900-GISEL-NEXT:    v_cndmask_b32_e64 v2, 0, 1, s[0:1]
1802; GFX900-GISEL-NEXT:    v_fma_f32 v10, v9, v3, -v8
1803; GFX900-GISEL-NEXT:    v_lshlrev_b32_e32 v2, 5, v2
1804; GFX900-GISEL-NEXT:    v_fma_f32 v10, v9, v5, v10
1805; GFX900-GISEL-NEXT:    v_ldexp_f32 v2, s11, v2
1806; GFX900-GISEL-NEXT:    v_add_f32_e32 v8, v8, v10
1807; GFX900-GISEL-NEXT:    v_log_f32_e32 v10, v2
1808; GFX900-GISEL-NEXT:    v_cmp_lt_f32_e64 s[2:3], |v9|, v6
1809; GFX900-GISEL-NEXT:    v_cndmask_b32_e64 v2, v9, v8, s[2:3]
1810; GFX900-GISEL-NEXT:    v_cndmask_b32_e32 v8, 0, v7, vcc
1811; GFX900-GISEL-NEXT:    v_sub_f32_e32 v2, v2, v8
1812; GFX900-GISEL-NEXT:    v_mul_f32_e32 v8, 0x3f317217, v10
1813; GFX900-GISEL-NEXT:    v_fma_f32 v3, v10, v3, -v8
1814; GFX900-GISEL-NEXT:    v_fma_f32 v3, v10, v5, v3
1815; GFX900-GISEL-NEXT:    v_add_f32_e32 v3, v8, v3
1816; GFX900-GISEL-NEXT:    v_cmp_lt_f32_e64 vcc, |v10|, v6
1817; GFX900-GISEL-NEXT:    v_cndmask_b32_e32 v3, v10, v3, vcc
1818; GFX900-GISEL-NEXT:    v_cndmask_b32_e64 v5, 0, v7, s[0:1]
1819; GFX900-GISEL-NEXT:    v_sub_f32_e32 v3, v3, v5
1820; GFX900-GISEL-NEXT:    global_store_dwordx4 v4, v[0:3], s[6:7]
1821; GFX900-GISEL-NEXT:    s_endpgm
1822;
1823; GFX1100-SDAG-LABEL: s_log_v4f32:
1824; GFX1100-SDAG:       ; %bb.0:
1825; GFX1100-SDAG-NEXT:    s_load_b128 s[0:3], s[4:5], 0x34
1826; GFX1100-SDAG-NEXT:    s_waitcnt lgkmcnt(0)
1827; GFX1100-SDAG-NEXT:    v_cmp_gt_f32_e64 s8, 0x800000, s1
1828; GFX1100-SDAG-NEXT:    v_cmp_gt_f32_e64 s9, 0x800000, s0
1829; GFX1100-SDAG-NEXT:    v_cmp_gt_f32_e64 s6, 0x800000, s3
1830; GFX1100-SDAG-NEXT:    v_cmp_gt_f32_e64 s7, 0x800000, s2
1831; GFX1100-SDAG-NEXT:    s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
1832; GFX1100-SDAG-NEXT:    v_cndmask_b32_e64 v2, 0, 1, s8
1833; GFX1100-SDAG-NEXT:    v_cndmask_b32_e64 v3, 0, 1, s9
1834; GFX1100-SDAG-NEXT:    s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
1835; GFX1100-SDAG-NEXT:    v_cndmask_b32_e64 v0, 0, 1, s6
1836; GFX1100-SDAG-NEXT:    v_cndmask_b32_e64 v1, 0, 1, s7
1837; GFX1100-SDAG-NEXT:    v_cndmask_b32_e64 v4, 0, 0x41b17218, s6
1838; GFX1100-SDAG-NEXT:    v_lshlrev_b32_e32 v2, 5, v2
1839; GFX1100-SDAG-NEXT:    v_lshlrev_b32_e32 v3, 5, v3
1840; GFX1100-SDAG-NEXT:    v_cndmask_b32_e64 v9, 0, 0x41b17218, s7
1841; GFX1100-SDAG-NEXT:    v_cndmask_b32_e64 v14, 0, 0x41b17218, s8
1842; GFX1100-SDAG-NEXT:    v_cndmask_b32_e64 v15, 0, 0x41b17218, s9
1843; GFX1100-SDAG-NEXT:    v_ldexp_f32 v2, s1, v2
1844; GFX1100-SDAG-NEXT:    v_ldexp_f32 v3, s0, v3
1845; GFX1100-SDAG-NEXT:    s_load_b64 s[0:1], s[4:5], 0x24
1846; GFX1100-SDAG-NEXT:    s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
1847; GFX1100-SDAG-NEXT:    v_log_f32_e32 v2, v2
1848; GFX1100-SDAG-NEXT:    v_lshlrev_b32_e32 v0, 5, v0
1849; GFX1100-SDAG-NEXT:    v_log_f32_e32 v3, v3
1850; GFX1100-SDAG-NEXT:    v_lshlrev_b32_e32 v1, 5, v1
1851; GFX1100-SDAG-NEXT:    s_waitcnt_depctr 0xfff
1852; GFX1100-SDAG-NEXT:    v_mul_f32_e32 v7, 0x3f317217, v2
1853; GFX1100-SDAG-NEXT:    v_ldexp_f32 v0, s3, v0
1854; GFX1100-SDAG-NEXT:    v_mul_f32_e32 v8, 0x3f317217, v3
1855; GFX1100-SDAG-NEXT:    v_ldexp_f32 v1, s2, v1
1856; GFX1100-SDAG-NEXT:    s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
1857; GFX1100-SDAG-NEXT:    v_fma_f32 v12, 0x3f317217, v2, -v7
1858; GFX1100-SDAG-NEXT:    v_log_f32_e32 v0, v0
1859; GFX1100-SDAG-NEXT:    s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
1860; GFX1100-SDAG-NEXT:    v_fma_f32 v13, 0x3f317217, v3, -v8
1861; GFX1100-SDAG-NEXT:    v_log_f32_e32 v1, v1
1862; GFX1100-SDAG-NEXT:    s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
1863; GFX1100-SDAG-NEXT:    v_dual_fmac_f32 v12, 0x3377d1cf, v2 :: v_dual_fmac_f32 v13, 0x3377d1cf, v3
1864; GFX1100-SDAG-NEXT:    v_add_f32_e32 v7, v7, v12
1865; GFX1100-SDAG-NEXT:    s_waitcnt_depctr 0xfff
1866; GFX1100-SDAG-NEXT:    v_dual_mul_f32 v5, 0x3f317217, v0 :: v_dual_add_f32 v8, v8, v13
1867; GFX1100-SDAG-NEXT:    v_mul_f32_e32 v6, 0x3f317217, v1
1868; GFX1100-SDAG-NEXT:    v_cmp_gt_f32_e64 vcc_lo, 0x7f800000, |v0|
1869; GFX1100-SDAG-NEXT:    s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
1870; GFX1100-SDAG-NEXT:    v_fma_f32 v10, 0x3f317217, v0, -v5
1871; GFX1100-SDAG-NEXT:    v_fma_f32 v11, 0x3f317217, v1, -v6
1872; GFX1100-SDAG-NEXT:    s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
1873; GFX1100-SDAG-NEXT:    v_dual_fmac_f32 v10, 0x3377d1cf, v0 :: v_dual_fmac_f32 v11, 0x3377d1cf, v1
1874; GFX1100-SDAG-NEXT:    v_dual_add_f32 v5, v5, v10 :: v_dual_add_f32 v6, v6, v11
1875; GFX1100-SDAG-NEXT:    s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_3)
1876; GFX1100-SDAG-NEXT:    v_cndmask_b32_e32 v0, v0, v5, vcc_lo
1877; GFX1100-SDAG-NEXT:    v_cmp_gt_f32_e64 vcc_lo, 0x7f800000, |v1|
1878; GFX1100-SDAG-NEXT:    v_cndmask_b32_e32 v1, v1, v6, vcc_lo
1879; GFX1100-SDAG-NEXT:    v_cmp_gt_f32_e64 vcc_lo, 0x7f800000, |v2|
1880; GFX1100-SDAG-NEXT:    v_cndmask_b32_e32 v5, v2, v7, vcc_lo
1881; GFX1100-SDAG-NEXT:    v_cmp_gt_f32_e64 vcc_lo, 0x7f800000, |v3|
1882; GFX1100-SDAG-NEXT:    s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_2) | instid1(VALU_DEP_2)
1883; GFX1100-SDAG-NEXT:    v_dual_mov_b32 v7, 0 :: v_dual_sub_f32 v2, v1, v9
1884; GFX1100-SDAG-NEXT:    v_cndmask_b32_e32 v6, v3, v8, vcc_lo
1885; GFX1100-SDAG-NEXT:    v_sub_f32_e32 v3, v0, v4
1886; GFX1100-SDAG-NEXT:    v_dual_sub_f32 v1, v5, v14 :: v_dual_sub_f32 v0, v6, v15
1887; GFX1100-SDAG-NEXT:    s_waitcnt lgkmcnt(0)
1888; GFX1100-SDAG-NEXT:    global_store_b128 v7, v[0:3], s[0:1]
1889; GFX1100-SDAG-NEXT:    s_endpgm
1890;
1891; GFX1100-GISEL-LABEL: s_log_v4f32:
1892; GFX1100-GISEL:       ; %bb.0:
1893; GFX1100-GISEL-NEXT:    s_load_b128 s[0:3], s[4:5], 0x34
1894; GFX1100-GISEL-NEXT:    s_waitcnt lgkmcnt(0)
1895; GFX1100-GISEL-NEXT:    v_cmp_gt_f32_e64 s8, 0x800000, s2
1896; GFX1100-GISEL-NEXT:    v_cmp_gt_f32_e64 s9, 0x800000, s3
1897; GFX1100-GISEL-NEXT:    v_cmp_gt_f32_e64 s6, 0x800000, s0
1898; GFX1100-GISEL-NEXT:    v_cmp_gt_f32_e64 s7, 0x800000, s1
1899; GFX1100-GISEL-NEXT:    s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
1900; GFX1100-GISEL-NEXT:    v_cndmask_b32_e64 v2, 0, 1, s8
1901; GFX1100-GISEL-NEXT:    v_cndmask_b32_e64 v3, 0, 1, s9
1902; GFX1100-GISEL-NEXT:    s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
1903; GFX1100-GISEL-NEXT:    v_cndmask_b32_e64 v0, 0, 1, s6
1904; GFX1100-GISEL-NEXT:    v_cndmask_b32_e64 v1, 0, 1, s7
1905; GFX1100-GISEL-NEXT:    v_cndmask_b32_e64 v4, 0, 0x41b17218, s6
1906; GFX1100-GISEL-NEXT:    v_lshlrev_b32_e32 v2, 5, v2
1907; GFX1100-GISEL-NEXT:    v_lshlrev_b32_e32 v3, 5, v3
1908; GFX1100-GISEL-NEXT:    v_cndmask_b32_e64 v9, 0, 0x41b17218, s7
1909; GFX1100-GISEL-NEXT:    v_cndmask_b32_e64 v14, 0, 0x41b17218, s8
1910; GFX1100-GISEL-NEXT:    v_cndmask_b32_e64 v15, 0, 0x41b17218, s9
1911; GFX1100-GISEL-NEXT:    v_ldexp_f32 v2, s2, v2
1912; GFX1100-GISEL-NEXT:    v_ldexp_f32 v3, s3, v3
1913; GFX1100-GISEL-NEXT:    s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
1914; GFX1100-GISEL-NEXT:    v_log_f32_e32 v2, v2
1915; GFX1100-GISEL-NEXT:    v_lshlrev_b32_e32 v0, 5, v0
1916; GFX1100-GISEL-NEXT:    v_log_f32_e32 v3, v3
1917; GFX1100-GISEL-NEXT:    v_lshlrev_b32_e32 v1, 5, v1
1918; GFX1100-GISEL-NEXT:    s_waitcnt_depctr 0xfff
1919; GFX1100-GISEL-NEXT:    v_mul_f32_e32 v7, 0x3f317217, v2
1920; GFX1100-GISEL-NEXT:    v_ldexp_f32 v0, s0, v0
1921; GFX1100-GISEL-NEXT:    v_mul_f32_e32 v8, 0x3f317217, v3
1922; GFX1100-GISEL-NEXT:    v_ldexp_f32 v1, s1, v1
1923; GFX1100-GISEL-NEXT:    s_load_b64 s[0:1], s[4:5], 0x24
1924; GFX1100-GISEL-NEXT:    v_fma_f32 v12, 0x3f317217, v2, -v7
1925; GFX1100-GISEL-NEXT:    v_log_f32_e32 v0, v0
1926; GFX1100-GISEL-NEXT:    v_fma_f32 v13, 0x3f317217, v3, -v8
1927; GFX1100-GISEL-NEXT:    v_log_f32_e32 v1, v1
1928; GFX1100-GISEL-NEXT:    s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
1929; GFX1100-GISEL-NEXT:    v_dual_fmac_f32 v12, 0x3377d1cf, v2 :: v_dual_fmac_f32 v13, 0x3377d1cf, v3
1930; GFX1100-GISEL-NEXT:    v_add_f32_e32 v7, v7, v12
1931; GFX1100-GISEL-NEXT:    s_waitcnt_depctr 0xfff
1932; GFX1100-GISEL-NEXT:    v_dual_mul_f32 v5, 0x3f317217, v0 :: v_dual_add_f32 v8, v8, v13
1933; GFX1100-GISEL-NEXT:    v_mul_f32_e32 v6, 0x3f317217, v1
1934; GFX1100-GISEL-NEXT:    v_cmp_gt_f32_e64 vcc_lo, 0x7f800000, |v0|
1935; GFX1100-GISEL-NEXT:    s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
1936; GFX1100-GISEL-NEXT:    v_fma_f32 v10, 0x3f317217, v0, -v5
1937; GFX1100-GISEL-NEXT:    v_fma_f32 v11, 0x3f317217, v1, -v6
1938; GFX1100-GISEL-NEXT:    s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
1939; GFX1100-GISEL-NEXT:    v_dual_fmac_f32 v10, 0x3377d1cf, v0 :: v_dual_fmac_f32 v11, 0x3377d1cf, v1
1940; GFX1100-GISEL-NEXT:    v_dual_add_f32 v5, v5, v10 :: v_dual_add_f32 v6, v6, v11
1941; GFX1100-GISEL-NEXT:    s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_3)
1942; GFX1100-GISEL-NEXT:    v_cndmask_b32_e32 v0, v0, v5, vcc_lo
1943; GFX1100-GISEL-NEXT:    v_cmp_gt_f32_e64 vcc_lo, 0x7f800000, |v1|
1944; GFX1100-GISEL-NEXT:    v_cndmask_b32_e32 v1, v1, v6, vcc_lo
1945; GFX1100-GISEL-NEXT:    v_cmp_gt_f32_e64 vcc_lo, 0x7f800000, |v2|
1946; GFX1100-GISEL-NEXT:    s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_3) | instid1(VALU_DEP_3)
1947; GFX1100-GISEL-NEXT:    v_dual_mov_b32 v5, 0 :: v_dual_sub_f32 v0, v0, v4
1948; GFX1100-GISEL-NEXT:    v_cndmask_b32_e32 v2, v2, v7, vcc_lo
1949; GFX1100-GISEL-NEXT:    v_cmp_gt_f32_e64 vcc_lo, 0x7f800000, |v3|
1950; GFX1100-GISEL-NEXT:    v_cndmask_b32_e32 v3, v3, v8, vcc_lo
1951; GFX1100-GISEL-NEXT:    v_dual_sub_f32 v1, v1, v9 :: v_dual_sub_f32 v2, v2, v14
1952; GFX1100-GISEL-NEXT:    s_delay_alu instid0(VALU_DEP_2)
1953; GFX1100-GISEL-NEXT:    v_sub_f32_e32 v3, v3, v15
1954; GFX1100-GISEL-NEXT:    s_waitcnt lgkmcnt(0)
1955; GFX1100-GISEL-NEXT:    global_store_b128 v5, v[0:3], s[0:1]
1956; GFX1100-GISEL-NEXT:    s_endpgm
1957;
1958; R600-LABEL: s_log_v4f32:
1959; R600:       ; %bb.0:
1960; R600-NEXT:    ALU 76, @4, KC0[CB0:0-32], KC1[]
1961; R600-NEXT:    MEM_RAT_CACHELESS STORE_RAW T2.XYZW, T0.X, 1
1962; R600-NEXT:    CF_END
1963; R600-NEXT:    PAD
1964; R600-NEXT:    ALU clause starting at 4:
1965; R600-NEXT:     SETGT T0.W, literal.x, KC0[3].Z,
1966; R600-NEXT:     SETGT * T1.W, literal.x, KC0[4].X,
1967; R600-NEXT:    8388608(1.175494e-38), 0(0.000000e+00)
1968; R600-NEXT:     CNDE * T2.W, PV.W, 1.0, literal.x,
1969; R600-NEXT:    1333788672(4.294967e+09), 0(0.000000e+00)
1970; R600-NEXT:     MUL_IEEE T0.Z, KC0[3].Z, PV.W,
1971; R600-NEXT:     SETGT T2.W, literal.x, KC0[3].W,
1972; R600-NEXT:     CNDE * T3.W, T1.W, 1.0, literal.y,
1973; R600-NEXT:    8388608(1.175494e-38), 1333788672(4.294967e+09)
1974; R600-NEXT:     MUL_IEEE T1.Z, KC0[4].X, PS,
1975; R600-NEXT:     CNDE T3.W, PV.W, 1.0, literal.x,
1976; R600-NEXT:     LOG_IEEE * T0.X, PV.Z,
1977; R600-NEXT:    1333788672(4.294967e+09), 0(0.000000e+00)
1978; R600-NEXT:     MUL_IEEE T0.Z, KC0[3].W, PV.W,
1979; R600-NEXT:     SETGT T3.W, literal.x, KC0[3].Y,
1980; R600-NEXT:     LOG_IEEE * T0.Y, PV.Z,
1981; R600-NEXT:    8388608(1.175494e-38), 0(0.000000e+00)
1982; R600-NEXT:     AND_INT T1.Y, PS, literal.x,
1983; R600-NEXT:     AND_INT T1.Z, T0.X, literal.x,
1984; R600-NEXT:     CNDE T4.W, PV.W, 1.0, literal.y,
1985; R600-NEXT:     LOG_IEEE * T0.Z, PV.Z,
1986; R600-NEXT:    -4096(nan), 1333788672(4.294967e+09)
1987; R600-NEXT:     MUL_IEEE T2.Y, KC0[3].Y, PV.W,
1988; R600-NEXT:     ADD T2.Z, T0.X, -PV.Z,
1989; R600-NEXT:     AND_INT T4.W, PS, literal.x,
1990; R600-NEXT:     ADD * T5.W, T0.Y, -PV.Y,
1991; R600-NEXT:    -4096(nan), 0(0.000000e+00)
1992; R600-NEXT:     MUL_IEEE T3.Y, PS, literal.x,
1993; R600-NEXT:     ADD T3.Z, T0.Z, -PV.W,
1994; R600-NEXT:     MUL_IEEE T6.W, PV.Z, literal.x,
1995; R600-NEXT:     LOG_IEEE * T1.X, PV.Y,
1996; R600-NEXT:    939916788(3.194618e-05), 0(0.000000e+00)
1997; R600-NEXT:     MULADD_IEEE T2.Y, T1.Z, literal.x, PV.W,
1998; R600-NEXT:     MUL_IEEE T4.Z, PV.Z, literal.x,
1999; R600-NEXT:     AND_INT T6.W, PS, literal.y,
2000; R600-NEXT:     MULADD_IEEE * T7.W, T1.Y, literal.x, PV.Y, BS:VEC_021/SCL_122
2001; R600-NEXT:    939916788(3.194618e-05), -4096(nan)
2002; R600-NEXT:     MULADD_IEEE T3.Y, T5.W, literal.x, PS,
2003; R600-NEXT:     ADD T5.Z, T1.X, -PV.W,
2004; R600-NEXT:     MULADD_IEEE T5.W, T4.W, literal.y, PV.Z, BS:VEC_120/SCL_212
2005; R600-NEXT:     MULADD_IEEE * T7.W, T2.Z, literal.x, PV.Y, BS:VEC_021/SCL_122
2006; R600-NEXT:    1060204544(6.931152e-01), 939916788(3.194618e-05)
2007; R600-NEXT:     MULADD_IEEE T2.X, T1.Z, literal.x, PS,
2008; R600-NEXT:     MULADD_IEEE T2.Y, T3.Z, literal.x, PV.W, BS:VEC_120/SCL_212
2009; R600-NEXT:     MUL_IEEE T1.Z, PV.Z, literal.y,
2010; R600-NEXT:     MULADD_IEEE T5.W, T1.Y, literal.x, PV.Y,
2011; R600-NEXT:     SETGT * T7.W, literal.z, |T0.Y|,
2012; R600-NEXT:    1060204544(6.931152e-01), 939916788(3.194618e-05)
2013; R600-NEXT:    2139095040(INF), 0(0.000000e+00)
2014; R600-NEXT:     CNDE T3.X, PS, T0.Y, PV.W,
2015; R600-NEXT:     CNDE T0.Y, T1.W, 0.0, literal.x,
2016; R600-NEXT:     MULADD_IEEE T1.Z, T6.W, literal.y, PV.Z, BS:VEC_120/SCL_212
2017; R600-NEXT:     MULADD_IEEE T1.W, T4.W, literal.z, PV.Y, BS:VEC_201
2018; R600-NEXT:     SETGT * T4.W, literal.w, |T0.Z|,
2019; R600-NEXT:    1102148120(2.218071e+01), 939916788(3.194618e-05)
2020; R600-NEXT:    1060204544(6.931152e-01), 2139095040(INF)
2021; R600-NEXT:     SETGT T4.X, literal.x, |T0.X|,
2022; R600-NEXT:     CNDE T1.Y, PS, T0.Z, PV.W,
2023; R600-NEXT:     CNDE T0.Z, T2.W, 0.0, literal.y,
2024; R600-NEXT:     MULADD_IEEE T1.W, T5.Z, literal.z, PV.Z,
2025; R600-NEXT:     ADD * T2.W, PV.X, -PV.Y,
2026; R600-NEXT:    2139095040(INF), 1102148120(2.218071e+01)
2027; R600-NEXT:    1060204544(6.931152e-01), 0(0.000000e+00)
2028; R600-NEXT:     MULADD_IEEE T3.X, T6.W, literal.x, PV.W,
2029; R600-NEXT:     SETGT T0.Y, literal.y, |T1.X|,
2030; R600-NEXT:     ADD T2.Z, PV.Y, -PV.Z,
2031; R600-NEXT:     CNDE T1.W, PV.X, T0.X, T2.X, BS:VEC_120/SCL_212
2032; R600-NEXT:     CNDE * T0.W, T0.W, 0.0, literal.z,
2033; R600-NEXT:    1060204544(6.931152e-01), 2139095040(INF)
2034; R600-NEXT:    1102148120(2.218071e+01), 0(0.000000e+00)
2035; R600-NEXT:     ADD T2.Y, PV.W, -PS,
2036; R600-NEXT:     CNDE T0.W, PV.Y, T1.X, PV.X,
2037; R600-NEXT:     CNDE * T1.W, T3.W, 0.0, literal.x,
2038; R600-NEXT:    1102148120(2.218071e+01), 0(0.000000e+00)
2039; R600-NEXT:     ADD T2.X, PV.W, -PS,
2040; R600-NEXT:     LSHR * T0.X, KC0[2].Y, literal.x,
2041; R600-NEXT:    2(2.802597e-45), 0(0.000000e+00)
2042;
2043; CM-LABEL: s_log_v4f32:
2044; CM:       ; %bb.0:
2045; CM-NEXT:    ALU 84, @4, KC0[CB0:0-32], KC1[]
2046; CM-NEXT:    MEM_RAT_CACHELESS STORE_DWORD T2, T0.X
2047; CM-NEXT:    CF_END
2048; CM-NEXT:    PAD
2049; CM-NEXT:    ALU clause starting at 4:
2050; CM-NEXT:     SETGT * T0.W, literal.x, KC0[3].Y,
2051; CM-NEXT:    8388608(1.175494e-38), 0(0.000000e+00)
2052; CM-NEXT:     CNDE T0.Y, PV.W, 1.0, literal.x,
2053; CM-NEXT:     SETGT T0.Z, literal.y, KC0[3].W,
2054; CM-NEXT:     SETGT * T1.W, literal.y, KC0[4].X,
2055; CM-NEXT:    1333788672(4.294967e+09), 8388608(1.175494e-38)
2056; CM-NEXT:     CNDE T0.X, PV.W, 1.0, literal.x,
2057; CM-NEXT:     CNDE T1.Y, PV.Z, 1.0, literal.x,
2058; CM-NEXT:     SETGT T1.Z, literal.y, KC0[3].Z,
2059; CM-NEXT:     MUL_IEEE * T2.W, KC0[3].Y, PV.Y,
2060; CM-NEXT:    1333788672(4.294967e+09), 8388608(1.175494e-38)
2061; CM-NEXT:     LOG_IEEE T0.X (MASKED), T2.W,
2062; CM-NEXT:     LOG_IEEE T0.Y, T2.W,
2063; CM-NEXT:     LOG_IEEE T0.Z (MASKED), T2.W,
2064; CM-NEXT:     LOG_IEEE * T0.W (MASKED), T2.W,
2065; CM-NEXT:     CNDE T1.X, T1.Z, 1.0, literal.x,
2066; CM-NEXT:     AND_INT T2.Y, PV.Y, literal.y,
2067; CM-NEXT:     MUL_IEEE T2.Z, KC0[3].W, T1.Y,
2068; CM-NEXT:     MUL_IEEE * T2.W, KC0[4].X, T0.X,
2069; CM-NEXT:    1333788672(4.294967e+09), -4096(nan)
2070; CM-NEXT:     LOG_IEEE T0.X, T2.W,
2071; CM-NEXT:     LOG_IEEE T0.Y (MASKED), T2.W,
2072; CM-NEXT:     LOG_IEEE T0.Z (MASKED), T2.W,
2073; CM-NEXT:     LOG_IEEE * T0.W (MASKED), T2.W,
2074; CM-NEXT:     LOG_IEEE T1.X (MASKED), T2.Z,
2075; CM-NEXT:     LOG_IEEE T1.Y, T2.Z,
2076; CM-NEXT:     LOG_IEEE T1.Z (MASKED), T2.Z,
2077; CM-NEXT:     LOG_IEEE * T1.W (MASKED), T2.Z,
2078; CM-NEXT:     ADD T2.X, T0.Y, -T2.Y,
2079; CM-NEXT:     AND_INT T3.Y, PV.Y, literal.x,
2080; CM-NEXT:     AND_INT T2.Z, T0.X, literal.x,
2081; CM-NEXT:     MUL_IEEE * T2.W, KC0[3].Z, T1.X,
2082; CM-NEXT:    -4096(nan), 0(0.000000e+00)
2083; CM-NEXT:     LOG_IEEE T1.X, T2.W,
2084; CM-NEXT:     LOG_IEEE T1.Y (MASKED), T2.W,
2085; CM-NEXT:     LOG_IEEE T1.Z (MASKED), T2.W,
2086; CM-NEXT:     LOG_IEEE * T1.W (MASKED), T2.W,
2087; CM-NEXT:     ADD T3.X, T0.X, -T2.Z,
2088; CM-NEXT:     ADD T4.Y, T1.Y, -T3.Y,
2089; CM-NEXT:     AND_INT T3.Z, PV.X, literal.x,
2090; CM-NEXT:     MUL_IEEE * T2.W, T2.X, literal.y, BS:VEC_120/SCL_212
2091; CM-NEXT:    -4096(nan), 939916788(3.194618e-05)
2092; CM-NEXT:     MULADD_IEEE T4.X, T2.Y, literal.x, PV.W,
2093; CM-NEXT:     ADD T5.Y, T1.X, -PV.Z,
2094; CM-NEXT:     MUL_IEEE T4.Z, PV.Y, literal.x,
2095; CM-NEXT:     MUL_IEEE * T2.W, PV.X, literal.x,
2096; CM-NEXT:    939916788(3.194618e-05), 0(0.000000e+00)
2097; CM-NEXT:     MULADD_IEEE T5.X, T2.Z, literal.x, PV.W,
2098; CM-NEXT:     MULADD_IEEE T6.Y, T3.Y, literal.x, PV.Z,
2099; CM-NEXT:     MUL_IEEE T4.Z, PV.Y, literal.x,
2100; CM-NEXT:     MULADD_IEEE * T2.W, T2.X, literal.y, PV.X,
2101; CM-NEXT:    939916788(3.194618e-05), 1060204544(6.931152e-01)
2102; CM-NEXT:     MULADD_IEEE T2.X, T2.Y, literal.x, PV.W,
2103; CM-NEXT:     MULADD_IEEE T2.Y, T3.Z, literal.y, PV.Z,
2104; CM-NEXT:     MULADD_IEEE T4.Z, T4.Y, literal.x, PV.Y, BS:VEC_120/SCL_212
2105; CM-NEXT:     MULADD_IEEE * T2.W, T3.X, literal.x, PV.X,
2106; CM-NEXT:    1060204544(6.931152e-01), 939916788(3.194618e-05)
2107; CM-NEXT:     MULADD_IEEE T3.X, T2.Z, literal.x, PV.W,
2108; CM-NEXT:     SETGT T4.Y, literal.y, |T0.X|,
2109; CM-NEXT:     MULADD_IEEE T2.Z, T3.Y, literal.x, PV.Z,
2110; CM-NEXT:     SETGT * T2.W, literal.y, |T1.Y|,
2111; CM-NEXT:    1060204544(6.931152e-01), 2139095040(INF)
2112; CM-NEXT:     CNDE T4.X, PV.W, T1.Y, PV.Z,
2113; CM-NEXT:     CNDE T1.Y, PV.Y, T0.X, PV.X,
2114; CM-NEXT:     CNDE T2.Z, T1.W, 0.0, literal.x,
2115; CM-NEXT:     MULADD_IEEE * T1.W, T5.Y, literal.y, T2.Y,
2116; CM-NEXT:    1102148120(2.218071e+01), 1060204544(6.931152e-01)
2117; CM-NEXT:     CNDE T0.X, T0.Z, 0.0, literal.x,
2118; CM-NEXT:     MULADD_IEEE T2.Y, T3.Z, literal.y, PV.W, BS:VEC_120/SCL_212
2119; CM-NEXT:     SETGT T0.Z, literal.z, |T1.X|,
2120; CM-NEXT:     ADD * T2.W, PV.Y, -PV.Z,
2121; CM-NEXT:    1102148120(2.218071e+01), 1060204544(6.931152e-01)
2122; CM-NEXT:    2139095040(INF), 0(0.000000e+00)
2123; CM-NEXT:     SETGT T3.X, literal.x, |T0.Y|,
2124; CM-NEXT:     CNDE T1.Y, PV.Z, T1.X, PV.Y,
2125; CM-NEXT:     ADD T2.Z, T4.X, -PV.X,
2126; CM-NEXT:     CNDE * T1.W, T1.Z, 0.0, literal.y,
2127; CM-NEXT:    2139095040(INF), 1102148120(2.218071e+01)
2128; CM-NEXT:     ADD T2.Y, PV.Y, -PV.W,
2129; CM-NEXT:     CNDE T0.Z, PV.X, T0.Y, T2.X,
2130; CM-NEXT:     CNDE * T0.W, T0.W, 0.0, literal.x,
2131; CM-NEXT:    1102148120(2.218071e+01), 0(0.000000e+00)
2132; CM-NEXT:     ADD * T2.X, PV.Z, -PV.W,
2133; CM-NEXT:     LSHR * T0.X, KC0[2].Y, literal.x,
2134; CM-NEXT:    2(2.802597e-45), 0(0.000000e+00)
2135  %result = call <4 x float> @llvm.log.v4f32(<4 x float> %in)
2136  store <4 x float> %result, ptr addrspace(1) %out
2137  ret void
2138}
2139
2140define float @v_log_f32(float %in) {
2141; SI-SDAG-LABEL: v_log_f32:
2142; SI-SDAG:       ; %bb.0:
2143; SI-SDAG-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
2144; SI-SDAG-NEXT:    s_mov_b32 s4, 0x800000
2145; SI-SDAG-NEXT:    v_cmp_gt_f32_e32 vcc, s4, v0
2146; SI-SDAG-NEXT:    v_cndmask_b32_e64 v1, 0, 1, vcc
2147; SI-SDAG-NEXT:    v_lshlrev_b32_e32 v1, 5, v1
2148; SI-SDAG-NEXT:    v_ldexp_f32_e32 v0, v0, v1
2149; SI-SDAG-NEXT:    v_log_f32_e32 v0, v0
2150; SI-SDAG-NEXT:    s_mov_b32 s4, 0x3f317217
2151; SI-SDAG-NEXT:    v_mul_f32_e32 v1, 0x3f317217, v0
2152; SI-SDAG-NEXT:    v_fma_f32 v2, v0, s4, -v1
2153; SI-SDAG-NEXT:    s_mov_b32 s4, 0x3377d1cf
2154; SI-SDAG-NEXT:    v_fma_f32 v2, v0, s4, v2
2155; SI-SDAG-NEXT:    s_mov_b32 s4, 0x7f800000
2156; SI-SDAG-NEXT:    v_add_f32_e32 v1, v1, v2
2157; SI-SDAG-NEXT:    v_cmp_lt_f32_e64 s[4:5], |v0|, s4
2158; SI-SDAG-NEXT:    v_cndmask_b32_e64 v0, v0, v1, s[4:5]
2159; SI-SDAG-NEXT:    v_mov_b32_e32 v1, 0x41b17218
2160; SI-SDAG-NEXT:    v_cndmask_b32_e32 v1, 0, v1, vcc
2161; SI-SDAG-NEXT:    v_sub_f32_e32 v0, v0, v1
2162; SI-SDAG-NEXT:    s_setpc_b64 s[30:31]
2163;
2164; SI-GISEL-LABEL: v_log_f32:
2165; SI-GISEL:       ; %bb.0:
2166; SI-GISEL-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
2167; SI-GISEL-NEXT:    v_mov_b32_e32 v1, 0x800000
2168; SI-GISEL-NEXT:    v_cmp_lt_f32_e32 vcc, v0, v1
2169; SI-GISEL-NEXT:    v_cndmask_b32_e64 v1, 0, 1, vcc
2170; SI-GISEL-NEXT:    v_lshlrev_b32_e32 v1, 5, v1
2171; SI-GISEL-NEXT:    v_ldexp_f32_e32 v0, v0, v1
2172; SI-GISEL-NEXT:    v_log_f32_e32 v0, v0
2173; SI-GISEL-NEXT:    v_mov_b32_e32 v1, 0x3f317217
2174; SI-GISEL-NEXT:    v_mov_b32_e32 v3, 0x3377d1cf
2175; SI-GISEL-NEXT:    v_mul_f32_e32 v2, 0x3f317217, v0
2176; SI-GISEL-NEXT:    v_fma_f32 v1, v0, v1, -v2
2177; SI-GISEL-NEXT:    v_fma_f32 v1, v0, v3, v1
2178; SI-GISEL-NEXT:    v_add_f32_e32 v1, v2, v1
2179; SI-GISEL-NEXT:    v_mov_b32_e32 v2, 0x7f800000
2180; SI-GISEL-NEXT:    v_cmp_lt_f32_e64 s[4:5], |v0|, v2
2181; SI-GISEL-NEXT:    v_cndmask_b32_e64 v0, v0, v1, s[4:5]
2182; SI-GISEL-NEXT:    v_mov_b32_e32 v1, 0x41b17218
2183; SI-GISEL-NEXT:    v_cndmask_b32_e32 v1, 0, v1, vcc
2184; SI-GISEL-NEXT:    v_sub_f32_e32 v0, v0, v1
2185; SI-GISEL-NEXT:    s_setpc_b64 s[30:31]
2186;
2187; VI-SDAG-LABEL: v_log_f32:
2188; VI-SDAG:       ; %bb.0:
2189; VI-SDAG-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
2190; VI-SDAG-NEXT:    s_mov_b32 s4, 0x800000
2191; VI-SDAG-NEXT:    v_cmp_gt_f32_e32 vcc, s4, v0
2192; VI-SDAG-NEXT:    v_cndmask_b32_e64 v1, 0, 1, vcc
2193; VI-SDAG-NEXT:    v_lshlrev_b32_e32 v1, 5, v1
2194; VI-SDAG-NEXT:    v_ldexp_f32 v0, v0, v1
2195; VI-SDAG-NEXT:    v_log_f32_e32 v0, v0
2196; VI-SDAG-NEXT:    s_mov_b32 s4, 0x7f800000
2197; VI-SDAG-NEXT:    v_and_b32_e32 v1, 0xfffff000, v0
2198; VI-SDAG-NEXT:    v_sub_f32_e32 v2, v0, v1
2199; VI-SDAG-NEXT:    v_mul_f32_e32 v3, 0x3f317000, v2
2200; VI-SDAG-NEXT:    v_mul_f32_e32 v2, 0x3805fdf4, v2
2201; VI-SDAG-NEXT:    v_mul_f32_e32 v4, 0x3805fdf4, v1
2202; VI-SDAG-NEXT:    v_add_f32_e32 v2, v4, v2
2203; VI-SDAG-NEXT:    v_add_f32_e32 v2, v3, v2
2204; VI-SDAG-NEXT:    v_mul_f32_e32 v1, 0x3f317000, v1
2205; VI-SDAG-NEXT:    v_add_f32_e32 v1, v1, v2
2206; VI-SDAG-NEXT:    v_cmp_lt_f32_e64 s[4:5], |v0|, s4
2207; VI-SDAG-NEXT:    v_cndmask_b32_e64 v0, v0, v1, s[4:5]
2208; VI-SDAG-NEXT:    v_mov_b32_e32 v1, 0x41b17218
2209; VI-SDAG-NEXT:    v_cndmask_b32_e32 v1, 0, v1, vcc
2210; VI-SDAG-NEXT:    v_sub_f32_e32 v0, v0, v1
2211; VI-SDAG-NEXT:    s_setpc_b64 s[30:31]
2212;
2213; VI-GISEL-LABEL: v_log_f32:
2214; VI-GISEL:       ; %bb.0:
2215; VI-GISEL-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
2216; VI-GISEL-NEXT:    v_mov_b32_e32 v1, 0x800000
2217; VI-GISEL-NEXT:    v_cmp_lt_f32_e32 vcc, v0, v1
2218; VI-GISEL-NEXT:    v_cndmask_b32_e64 v1, 0, 1, vcc
2219; VI-GISEL-NEXT:    v_lshlrev_b32_e32 v1, 5, v1
2220; VI-GISEL-NEXT:    v_ldexp_f32 v0, v0, v1
2221; VI-GISEL-NEXT:    v_log_f32_e32 v0, v0
2222; VI-GISEL-NEXT:    v_and_b32_e32 v1, 0xfffff000, v0
2223; VI-GISEL-NEXT:    v_sub_f32_e32 v2, v0, v1
2224; VI-GISEL-NEXT:    v_mul_f32_e32 v3, 0x3805fdf4, v1
2225; VI-GISEL-NEXT:    v_mul_f32_e32 v4, 0x3805fdf4, v2
2226; VI-GISEL-NEXT:    v_add_f32_e32 v3, v3, v4
2227; VI-GISEL-NEXT:    v_mul_f32_e32 v2, 0x3f317000, v2
2228; VI-GISEL-NEXT:    v_add_f32_e32 v2, v2, v3
2229; VI-GISEL-NEXT:    v_mul_f32_e32 v1, 0x3f317000, v1
2230; VI-GISEL-NEXT:    v_add_f32_e32 v1, v1, v2
2231; VI-GISEL-NEXT:    v_mov_b32_e32 v2, 0x7f800000
2232; VI-GISEL-NEXT:    v_cmp_lt_f32_e64 s[4:5], |v0|, v2
2233; VI-GISEL-NEXT:    v_cndmask_b32_e64 v0, v0, v1, s[4:5]
2234; VI-GISEL-NEXT:    v_mov_b32_e32 v1, 0x41b17218
2235; VI-GISEL-NEXT:    v_cndmask_b32_e32 v1, 0, v1, vcc
2236; VI-GISEL-NEXT:    v_sub_f32_e32 v0, v0, v1
2237; VI-GISEL-NEXT:    s_setpc_b64 s[30:31]
2238;
2239; GFX900-SDAG-LABEL: v_log_f32:
2240; GFX900-SDAG:       ; %bb.0:
2241; GFX900-SDAG-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
2242; GFX900-SDAG-NEXT:    s_mov_b32 s4, 0x800000
2243; GFX900-SDAG-NEXT:    v_cmp_gt_f32_e32 vcc, s4, v0
2244; GFX900-SDAG-NEXT:    v_cndmask_b32_e64 v1, 0, 1, vcc
2245; GFX900-SDAG-NEXT:    v_lshlrev_b32_e32 v1, 5, v1
2246; GFX900-SDAG-NEXT:    v_ldexp_f32 v0, v0, v1
2247; GFX900-SDAG-NEXT:    v_log_f32_e32 v0, v0
2248; GFX900-SDAG-NEXT:    s_mov_b32 s4, 0x3f317217
2249; GFX900-SDAG-NEXT:    v_mul_f32_e32 v1, 0x3f317217, v0
2250; GFX900-SDAG-NEXT:    v_fma_f32 v2, v0, s4, -v1
2251; GFX900-SDAG-NEXT:    s_mov_b32 s4, 0x3377d1cf
2252; GFX900-SDAG-NEXT:    v_fma_f32 v2, v0, s4, v2
2253; GFX900-SDAG-NEXT:    s_mov_b32 s4, 0x7f800000
2254; GFX900-SDAG-NEXT:    v_add_f32_e32 v1, v1, v2
2255; GFX900-SDAG-NEXT:    v_cmp_lt_f32_e64 s[4:5], |v0|, s4
2256; GFX900-SDAG-NEXT:    v_cndmask_b32_e64 v0, v0, v1, s[4:5]
2257; GFX900-SDAG-NEXT:    v_mov_b32_e32 v1, 0x41b17218
2258; GFX900-SDAG-NEXT:    v_cndmask_b32_e32 v1, 0, v1, vcc
2259; GFX900-SDAG-NEXT:    v_sub_f32_e32 v0, v0, v1
2260; GFX900-SDAG-NEXT:    s_setpc_b64 s[30:31]
2261;
2262; GFX900-GISEL-LABEL: v_log_f32:
2263; GFX900-GISEL:       ; %bb.0:
2264; GFX900-GISEL-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
2265; GFX900-GISEL-NEXT:    v_mov_b32_e32 v1, 0x800000
2266; GFX900-GISEL-NEXT:    v_cmp_lt_f32_e32 vcc, v0, v1
2267; GFX900-GISEL-NEXT:    v_cndmask_b32_e64 v1, 0, 1, vcc
2268; GFX900-GISEL-NEXT:    v_lshlrev_b32_e32 v1, 5, v1
2269; GFX900-GISEL-NEXT:    v_ldexp_f32 v0, v0, v1
2270; GFX900-GISEL-NEXT:    v_log_f32_e32 v0, v0
2271; GFX900-GISEL-NEXT:    v_mov_b32_e32 v1, 0x3f317217
2272; GFX900-GISEL-NEXT:    v_mov_b32_e32 v3, 0x3377d1cf
2273; GFX900-GISEL-NEXT:    v_mul_f32_e32 v2, 0x3f317217, v0
2274; GFX900-GISEL-NEXT:    v_fma_f32 v1, v0, v1, -v2
2275; GFX900-GISEL-NEXT:    v_fma_f32 v1, v0, v3, v1
2276; GFX900-GISEL-NEXT:    v_add_f32_e32 v1, v2, v1
2277; GFX900-GISEL-NEXT:    v_mov_b32_e32 v2, 0x7f800000
2278; GFX900-GISEL-NEXT:    v_cmp_lt_f32_e64 s[4:5], |v0|, v2
2279; GFX900-GISEL-NEXT:    v_cndmask_b32_e64 v0, v0, v1, s[4:5]
2280; GFX900-GISEL-NEXT:    v_mov_b32_e32 v1, 0x41b17218
2281; GFX900-GISEL-NEXT:    v_cndmask_b32_e32 v1, 0, v1, vcc
2282; GFX900-GISEL-NEXT:    v_sub_f32_e32 v0, v0, v1
2283; GFX900-GISEL-NEXT:    s_setpc_b64 s[30:31]
2284;
2285; GFX1100-SDAG-LABEL: v_log_f32:
2286; GFX1100-SDAG:       ; %bb.0:
2287; GFX1100-SDAG-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
2288; GFX1100-SDAG-NEXT:    v_cmp_gt_f32_e32 vcc_lo, 0x800000, v0
2289; GFX1100-SDAG-NEXT:    v_cndmask_b32_e64 v1, 0, 1, vcc_lo
2290; GFX1100-SDAG-NEXT:    s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
2291; GFX1100-SDAG-NEXT:    v_lshlrev_b32_e32 v1, 5, v1
2292; GFX1100-SDAG-NEXT:    v_ldexp_f32 v0, v0, v1
2293; GFX1100-SDAG-NEXT:    s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_2)
2294; GFX1100-SDAG-NEXT:    v_log_f32_e32 v0, v0
2295; GFX1100-SDAG-NEXT:    s_waitcnt_depctr 0xfff
2296; GFX1100-SDAG-NEXT:    v_mul_f32_e32 v1, 0x3f317217, v0
2297; GFX1100-SDAG-NEXT:    v_cmp_gt_f32_e64 s0, 0x7f800000, |v0|
2298; GFX1100-SDAG-NEXT:    v_fma_f32 v2, 0x3f317217, v0, -v1
2299; GFX1100-SDAG-NEXT:    s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
2300; GFX1100-SDAG-NEXT:    v_fmamk_f32 v2, v0, 0x3377d1cf, v2
2301; GFX1100-SDAG-NEXT:    v_add_f32_e32 v1, v1, v2
2302; GFX1100-SDAG-NEXT:    s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
2303; GFX1100-SDAG-NEXT:    v_cndmask_b32_e64 v0, v0, v1, s0
2304; GFX1100-SDAG-NEXT:    v_cndmask_b32_e64 v1, 0, 0x41b17218, vcc_lo
2305; GFX1100-SDAG-NEXT:    v_sub_f32_e32 v0, v0, v1
2306; GFX1100-SDAG-NEXT:    s_setpc_b64 s[30:31]
2307;
2308; GFX1100-GISEL-LABEL: v_log_f32:
2309; GFX1100-GISEL:       ; %bb.0:
2310; GFX1100-GISEL-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
2311; GFX1100-GISEL-NEXT:    v_cmp_gt_f32_e32 vcc_lo, 0x800000, v0
2312; GFX1100-GISEL-NEXT:    v_cndmask_b32_e64 v1, 0, 1, vcc_lo
2313; GFX1100-GISEL-NEXT:    s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
2314; GFX1100-GISEL-NEXT:    v_lshlrev_b32_e32 v1, 5, v1
2315; GFX1100-GISEL-NEXT:    v_ldexp_f32 v0, v0, v1
2316; GFX1100-GISEL-NEXT:    s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_2)
2317; GFX1100-GISEL-NEXT:    v_log_f32_e32 v0, v0
2318; GFX1100-GISEL-NEXT:    s_waitcnt_depctr 0xfff
2319; GFX1100-GISEL-NEXT:    v_mul_f32_e32 v1, 0x3f317217, v0
2320; GFX1100-GISEL-NEXT:    v_cmp_gt_f32_e64 s0, 0x7f800000, |v0|
2321; GFX1100-GISEL-NEXT:    v_fma_f32 v2, 0x3f317217, v0, -v1
2322; GFX1100-GISEL-NEXT:    s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
2323; GFX1100-GISEL-NEXT:    v_fmac_f32_e32 v2, 0x3377d1cf, v0
2324; GFX1100-GISEL-NEXT:    v_add_f32_e32 v1, v1, v2
2325; GFX1100-GISEL-NEXT:    s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
2326; GFX1100-GISEL-NEXT:    v_cndmask_b32_e64 v0, v0, v1, s0
2327; GFX1100-GISEL-NEXT:    v_cndmask_b32_e64 v1, 0, 0x41b17218, vcc_lo
2328; GFX1100-GISEL-NEXT:    v_sub_f32_e32 v0, v0, v1
2329; GFX1100-GISEL-NEXT:    s_setpc_b64 s[30:31]
2330;
2331; R600-LABEL: v_log_f32:
2332; R600:       ; %bb.0:
2333; R600-NEXT:    CF_END
2334; R600-NEXT:    PAD
2335;
2336; CM-LABEL: v_log_f32:
2337; CM:       ; %bb.0:
2338; CM-NEXT:    CF_END
2339; CM-NEXT:    PAD
2340  %result = call float @llvm.log.f32(float %in)
2341  ret float %result
2342}
2343
2344define float @v_log_fabs_f32(float %in) {
2345; SI-SDAG-LABEL: v_log_fabs_f32:
2346; SI-SDAG:       ; %bb.0:
2347; SI-SDAG-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
2348; SI-SDAG-NEXT:    s_mov_b32 s4, 0x800000
2349; SI-SDAG-NEXT:    v_cmp_lt_f32_e64 vcc, |v0|, s4
2350; SI-SDAG-NEXT:    v_cndmask_b32_e64 v1, 0, 1, vcc
2351; SI-SDAG-NEXT:    v_lshlrev_b32_e32 v1, 5, v1
2352; SI-SDAG-NEXT:    v_ldexp_f32_e64 v0, |v0|, v1
2353; SI-SDAG-NEXT:    v_log_f32_e32 v0, v0
2354; SI-SDAG-NEXT:    s_mov_b32 s4, 0x3f317217
2355; SI-SDAG-NEXT:    v_mul_f32_e32 v1, 0x3f317217, v0
2356; SI-SDAG-NEXT:    v_fma_f32 v2, v0, s4, -v1
2357; SI-SDAG-NEXT:    s_mov_b32 s4, 0x3377d1cf
2358; SI-SDAG-NEXT:    v_fma_f32 v2, v0, s4, v2
2359; SI-SDAG-NEXT:    s_mov_b32 s4, 0x7f800000
2360; SI-SDAG-NEXT:    v_add_f32_e32 v1, v1, v2
2361; SI-SDAG-NEXT:    v_cmp_lt_f32_e64 s[4:5], |v0|, s4
2362; SI-SDAG-NEXT:    v_cndmask_b32_e64 v0, v0, v1, s[4:5]
2363; SI-SDAG-NEXT:    v_mov_b32_e32 v1, 0x41b17218
2364; SI-SDAG-NEXT:    v_cndmask_b32_e32 v1, 0, v1, vcc
2365; SI-SDAG-NEXT:    v_sub_f32_e32 v0, v0, v1
2366; SI-SDAG-NEXT:    s_setpc_b64 s[30:31]
2367;
2368; SI-GISEL-LABEL: v_log_fabs_f32:
2369; SI-GISEL:       ; %bb.0:
2370; SI-GISEL-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
2371; SI-GISEL-NEXT:    v_mov_b32_e32 v1, 0x800000
2372; SI-GISEL-NEXT:    v_cmp_lt_f32_e64 vcc, |v0|, v1
2373; SI-GISEL-NEXT:    v_cndmask_b32_e64 v1, 0, 1, vcc
2374; SI-GISEL-NEXT:    v_lshlrev_b32_e32 v1, 5, v1
2375; SI-GISEL-NEXT:    v_ldexp_f32_e64 v0, |v0|, v1
2376; SI-GISEL-NEXT:    v_log_f32_e32 v0, v0
2377; SI-GISEL-NEXT:    v_mov_b32_e32 v1, 0x3f317217
2378; SI-GISEL-NEXT:    v_mov_b32_e32 v3, 0x3377d1cf
2379; SI-GISEL-NEXT:    v_mul_f32_e32 v2, 0x3f317217, v0
2380; SI-GISEL-NEXT:    v_fma_f32 v1, v0, v1, -v2
2381; SI-GISEL-NEXT:    v_fma_f32 v1, v0, v3, v1
2382; SI-GISEL-NEXT:    v_add_f32_e32 v1, v2, v1
2383; SI-GISEL-NEXT:    v_mov_b32_e32 v2, 0x7f800000
2384; SI-GISEL-NEXT:    v_cmp_lt_f32_e64 s[4:5], |v0|, v2
2385; SI-GISEL-NEXT:    v_cndmask_b32_e64 v0, v0, v1, s[4:5]
2386; SI-GISEL-NEXT:    v_mov_b32_e32 v1, 0x41b17218
2387; SI-GISEL-NEXT:    v_cndmask_b32_e32 v1, 0, v1, vcc
2388; SI-GISEL-NEXT:    v_sub_f32_e32 v0, v0, v1
2389; SI-GISEL-NEXT:    s_setpc_b64 s[30:31]
2390;
2391; VI-SDAG-LABEL: v_log_fabs_f32:
2392; VI-SDAG:       ; %bb.0:
2393; VI-SDAG-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
2394; VI-SDAG-NEXT:    s_mov_b32 s4, 0x800000
2395; VI-SDAG-NEXT:    v_cmp_lt_f32_e64 vcc, |v0|, s4
2396; VI-SDAG-NEXT:    v_cndmask_b32_e64 v1, 0, 1, vcc
2397; VI-SDAG-NEXT:    v_lshlrev_b32_e32 v1, 5, v1
2398; VI-SDAG-NEXT:    v_ldexp_f32 v0, |v0|, v1
2399; VI-SDAG-NEXT:    v_log_f32_e32 v0, v0
2400; VI-SDAG-NEXT:    s_mov_b32 s4, 0x7f800000
2401; VI-SDAG-NEXT:    v_and_b32_e32 v1, 0xfffff000, v0
2402; VI-SDAG-NEXT:    v_sub_f32_e32 v2, v0, v1
2403; VI-SDAG-NEXT:    v_mul_f32_e32 v3, 0x3f317000, v2
2404; VI-SDAG-NEXT:    v_mul_f32_e32 v2, 0x3805fdf4, v2
2405; VI-SDAG-NEXT:    v_mul_f32_e32 v4, 0x3805fdf4, v1
2406; VI-SDAG-NEXT:    v_add_f32_e32 v2, v4, v2
2407; VI-SDAG-NEXT:    v_add_f32_e32 v2, v3, v2
2408; VI-SDAG-NEXT:    v_mul_f32_e32 v1, 0x3f317000, v1
2409; VI-SDAG-NEXT:    v_add_f32_e32 v1, v1, v2
2410; VI-SDAG-NEXT:    v_cmp_lt_f32_e64 s[4:5], |v0|, s4
2411; VI-SDAG-NEXT:    v_cndmask_b32_e64 v0, v0, v1, s[4:5]
2412; VI-SDAG-NEXT:    v_mov_b32_e32 v1, 0x41b17218
2413; VI-SDAG-NEXT:    v_cndmask_b32_e32 v1, 0, v1, vcc
2414; VI-SDAG-NEXT:    v_sub_f32_e32 v0, v0, v1
2415; VI-SDAG-NEXT:    s_setpc_b64 s[30:31]
2416;
2417; VI-GISEL-LABEL: v_log_fabs_f32:
2418; VI-GISEL:       ; %bb.0:
2419; VI-GISEL-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
2420; VI-GISEL-NEXT:    v_mov_b32_e32 v1, 0x800000
2421; VI-GISEL-NEXT:    v_cmp_lt_f32_e64 vcc, |v0|, v1
2422; VI-GISEL-NEXT:    v_cndmask_b32_e64 v1, 0, 1, vcc
2423; VI-GISEL-NEXT:    v_lshlrev_b32_e32 v1, 5, v1
2424; VI-GISEL-NEXT:    v_ldexp_f32 v0, |v0|, v1
2425; VI-GISEL-NEXT:    v_log_f32_e32 v0, v0
2426; VI-GISEL-NEXT:    v_and_b32_e32 v1, 0xfffff000, v0
2427; VI-GISEL-NEXT:    v_sub_f32_e32 v2, v0, v1
2428; VI-GISEL-NEXT:    v_mul_f32_e32 v3, 0x3805fdf4, v1
2429; VI-GISEL-NEXT:    v_mul_f32_e32 v4, 0x3805fdf4, v2
2430; VI-GISEL-NEXT:    v_add_f32_e32 v3, v3, v4
2431; VI-GISEL-NEXT:    v_mul_f32_e32 v2, 0x3f317000, v2
2432; VI-GISEL-NEXT:    v_add_f32_e32 v2, v2, v3
2433; VI-GISEL-NEXT:    v_mul_f32_e32 v1, 0x3f317000, v1
2434; VI-GISEL-NEXT:    v_add_f32_e32 v1, v1, v2
2435; VI-GISEL-NEXT:    v_mov_b32_e32 v2, 0x7f800000
2436; VI-GISEL-NEXT:    v_cmp_lt_f32_e64 s[4:5], |v0|, v2
2437; VI-GISEL-NEXT:    v_cndmask_b32_e64 v0, v0, v1, s[4:5]
2438; VI-GISEL-NEXT:    v_mov_b32_e32 v1, 0x41b17218
2439; VI-GISEL-NEXT:    v_cndmask_b32_e32 v1, 0, v1, vcc
2440; VI-GISEL-NEXT:    v_sub_f32_e32 v0, v0, v1
2441; VI-GISEL-NEXT:    s_setpc_b64 s[30:31]
2442;
2443; GFX900-SDAG-LABEL: v_log_fabs_f32:
2444; GFX900-SDAG:       ; %bb.0:
2445; GFX900-SDAG-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
2446; GFX900-SDAG-NEXT:    s_mov_b32 s4, 0x800000
2447; GFX900-SDAG-NEXT:    v_cmp_lt_f32_e64 vcc, |v0|, s4
2448; GFX900-SDAG-NEXT:    v_cndmask_b32_e64 v1, 0, 1, vcc
2449; GFX900-SDAG-NEXT:    v_lshlrev_b32_e32 v1, 5, v1
2450; GFX900-SDAG-NEXT:    v_ldexp_f32 v0, |v0|, v1
2451; GFX900-SDAG-NEXT:    v_log_f32_e32 v0, v0
2452; GFX900-SDAG-NEXT:    s_mov_b32 s4, 0x3f317217
2453; GFX900-SDAG-NEXT:    v_mul_f32_e32 v1, 0x3f317217, v0
2454; GFX900-SDAG-NEXT:    v_fma_f32 v2, v0, s4, -v1
2455; GFX900-SDAG-NEXT:    s_mov_b32 s4, 0x3377d1cf
2456; GFX900-SDAG-NEXT:    v_fma_f32 v2, v0, s4, v2
2457; GFX900-SDAG-NEXT:    s_mov_b32 s4, 0x7f800000
2458; GFX900-SDAG-NEXT:    v_add_f32_e32 v1, v1, v2
2459; GFX900-SDAG-NEXT:    v_cmp_lt_f32_e64 s[4:5], |v0|, s4
2460; GFX900-SDAG-NEXT:    v_cndmask_b32_e64 v0, v0, v1, s[4:5]
2461; GFX900-SDAG-NEXT:    v_mov_b32_e32 v1, 0x41b17218
2462; GFX900-SDAG-NEXT:    v_cndmask_b32_e32 v1, 0, v1, vcc
2463; GFX900-SDAG-NEXT:    v_sub_f32_e32 v0, v0, v1
2464; GFX900-SDAG-NEXT:    s_setpc_b64 s[30:31]
2465;
2466; GFX900-GISEL-LABEL: v_log_fabs_f32:
2467; GFX900-GISEL:       ; %bb.0:
2468; GFX900-GISEL-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
2469; GFX900-GISEL-NEXT:    v_mov_b32_e32 v1, 0x800000
2470; GFX900-GISEL-NEXT:    v_cmp_lt_f32_e64 vcc, |v0|, v1
2471; GFX900-GISEL-NEXT:    v_cndmask_b32_e64 v1, 0, 1, vcc
2472; GFX900-GISEL-NEXT:    v_lshlrev_b32_e32 v1, 5, v1
2473; GFX900-GISEL-NEXT:    v_ldexp_f32 v0, |v0|, v1
2474; GFX900-GISEL-NEXT:    v_log_f32_e32 v0, v0
2475; GFX900-GISEL-NEXT:    v_mov_b32_e32 v1, 0x3f317217
2476; GFX900-GISEL-NEXT:    v_mov_b32_e32 v3, 0x3377d1cf
2477; GFX900-GISEL-NEXT:    v_mul_f32_e32 v2, 0x3f317217, v0
2478; GFX900-GISEL-NEXT:    v_fma_f32 v1, v0, v1, -v2
2479; GFX900-GISEL-NEXT:    v_fma_f32 v1, v0, v3, v1
2480; GFX900-GISEL-NEXT:    v_add_f32_e32 v1, v2, v1
2481; GFX900-GISEL-NEXT:    v_mov_b32_e32 v2, 0x7f800000
2482; GFX900-GISEL-NEXT:    v_cmp_lt_f32_e64 s[4:5], |v0|, v2
2483; GFX900-GISEL-NEXT:    v_cndmask_b32_e64 v0, v0, v1, s[4:5]
2484; GFX900-GISEL-NEXT:    v_mov_b32_e32 v1, 0x41b17218
2485; GFX900-GISEL-NEXT:    v_cndmask_b32_e32 v1, 0, v1, vcc
2486; GFX900-GISEL-NEXT:    v_sub_f32_e32 v0, v0, v1
2487; GFX900-GISEL-NEXT:    s_setpc_b64 s[30:31]
2488;
2489; GFX1100-SDAG-LABEL: v_log_fabs_f32:
2490; GFX1100-SDAG:       ; %bb.0:
2491; GFX1100-SDAG-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
2492; GFX1100-SDAG-NEXT:    v_cmp_gt_f32_e64 s0, 0x800000, |v0|
2493; GFX1100-SDAG-NEXT:    s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
2494; GFX1100-SDAG-NEXT:    v_cndmask_b32_e64 v1, 0, 1, s0
2495; GFX1100-SDAG-NEXT:    v_lshlrev_b32_e32 v1, 5, v1
2496; GFX1100-SDAG-NEXT:    s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
2497; GFX1100-SDAG-NEXT:    v_ldexp_f32 v0, |v0|, v1
2498; GFX1100-SDAG-NEXT:    v_log_f32_e32 v0, v0
2499; GFX1100-SDAG-NEXT:    s_waitcnt_depctr 0xfff
2500; GFX1100-SDAG-NEXT:    v_mul_f32_e32 v1, 0x3f317217, v0
2501; GFX1100-SDAG-NEXT:    v_cmp_gt_f32_e64 vcc_lo, 0x7f800000, |v0|
2502; GFX1100-SDAG-NEXT:    s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
2503; GFX1100-SDAG-NEXT:    v_fma_f32 v2, 0x3f317217, v0, -v1
2504; GFX1100-SDAG-NEXT:    v_fmamk_f32 v2, v0, 0x3377d1cf, v2
2505; GFX1100-SDAG-NEXT:    s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
2506; GFX1100-SDAG-NEXT:    v_add_f32_e32 v1, v1, v2
2507; GFX1100-SDAG-NEXT:    v_cndmask_b32_e32 v0, v0, v1, vcc_lo
2508; GFX1100-SDAG-NEXT:    v_cndmask_b32_e64 v1, 0, 0x41b17218, s0
2509; GFX1100-SDAG-NEXT:    s_delay_alu instid0(VALU_DEP_1)
2510; GFX1100-SDAG-NEXT:    v_sub_f32_e32 v0, v0, v1
2511; GFX1100-SDAG-NEXT:    s_setpc_b64 s[30:31]
2512;
2513; GFX1100-GISEL-LABEL: v_log_fabs_f32:
2514; GFX1100-GISEL:       ; %bb.0:
2515; GFX1100-GISEL-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
2516; GFX1100-GISEL-NEXT:    v_cmp_gt_f32_e64 s0, 0x800000, |v0|
2517; GFX1100-GISEL-NEXT:    s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
2518; GFX1100-GISEL-NEXT:    v_cndmask_b32_e64 v1, 0, 1, s0
2519; GFX1100-GISEL-NEXT:    v_lshlrev_b32_e32 v1, 5, v1
2520; GFX1100-GISEL-NEXT:    s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
2521; GFX1100-GISEL-NEXT:    v_ldexp_f32 v0, |v0|, v1
2522; GFX1100-GISEL-NEXT:    v_log_f32_e32 v0, v0
2523; GFX1100-GISEL-NEXT:    s_waitcnt_depctr 0xfff
2524; GFX1100-GISEL-NEXT:    v_mul_f32_e32 v1, 0x3f317217, v0
2525; GFX1100-GISEL-NEXT:    v_cmp_gt_f32_e64 vcc_lo, 0x7f800000, |v0|
2526; GFX1100-GISEL-NEXT:    s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
2527; GFX1100-GISEL-NEXT:    v_fma_f32 v2, 0x3f317217, v0, -v1
2528; GFX1100-GISEL-NEXT:    v_fmac_f32_e32 v2, 0x3377d1cf, v0
2529; GFX1100-GISEL-NEXT:    s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
2530; GFX1100-GISEL-NEXT:    v_add_f32_e32 v1, v1, v2
2531; GFX1100-GISEL-NEXT:    v_cndmask_b32_e32 v0, v0, v1, vcc_lo
2532; GFX1100-GISEL-NEXT:    v_cndmask_b32_e64 v1, 0, 0x41b17218, s0
2533; GFX1100-GISEL-NEXT:    s_delay_alu instid0(VALU_DEP_1)
2534; GFX1100-GISEL-NEXT:    v_sub_f32_e32 v0, v0, v1
2535; GFX1100-GISEL-NEXT:    s_setpc_b64 s[30:31]
2536;
2537; R600-LABEL: v_log_fabs_f32:
2538; R600:       ; %bb.0:
2539; R600-NEXT:    CF_END
2540; R600-NEXT:    PAD
2541;
2542; CM-LABEL: v_log_fabs_f32:
2543; CM:       ; %bb.0:
2544; CM-NEXT:    CF_END
2545; CM-NEXT:    PAD
2546  %fabs = call float @llvm.fabs.f32(float %in)
2547  %result = call float @llvm.log.f32(float %fabs)
2548  ret float %result
2549}
2550
2551define float @v_log_fneg_fabs_f32(float %in) {
2552; SI-SDAG-LABEL: v_log_fneg_fabs_f32:
2553; SI-SDAG:       ; %bb.0:
2554; SI-SDAG-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
2555; SI-SDAG-NEXT:    s_mov_b32 s4, 0x80800000
2556; SI-SDAG-NEXT:    v_cmp_gt_f32_e64 vcc, |v0|, s4
2557; SI-SDAG-NEXT:    v_cndmask_b32_e64 v1, 0, 1, vcc
2558; SI-SDAG-NEXT:    v_lshlrev_b32_e32 v1, 5, v1
2559; SI-SDAG-NEXT:    v_ldexp_f32_e64 v0, -|v0|, v1
2560; SI-SDAG-NEXT:    v_log_f32_e32 v0, v0
2561; SI-SDAG-NEXT:    s_mov_b32 s4, 0x3f317217
2562; SI-SDAG-NEXT:    v_mul_f32_e32 v1, 0x3f317217, v0
2563; SI-SDAG-NEXT:    v_fma_f32 v2, v0, s4, -v1
2564; SI-SDAG-NEXT:    s_mov_b32 s4, 0x3377d1cf
2565; SI-SDAG-NEXT:    v_fma_f32 v2, v0, s4, v2
2566; SI-SDAG-NEXT:    s_mov_b32 s4, 0x7f800000
2567; SI-SDAG-NEXT:    v_add_f32_e32 v1, v1, v2
2568; SI-SDAG-NEXT:    v_cmp_lt_f32_e64 s[4:5], |v0|, s4
2569; SI-SDAG-NEXT:    v_cndmask_b32_e64 v0, v0, v1, s[4:5]
2570; SI-SDAG-NEXT:    v_mov_b32_e32 v1, 0x41b17218
2571; SI-SDAG-NEXT:    v_cndmask_b32_e32 v1, 0, v1, vcc
2572; SI-SDAG-NEXT:    v_sub_f32_e32 v0, v0, v1
2573; SI-SDAG-NEXT:    s_setpc_b64 s[30:31]
2574;
2575; SI-GISEL-LABEL: v_log_fneg_fabs_f32:
2576; SI-GISEL:       ; %bb.0:
2577; SI-GISEL-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
2578; SI-GISEL-NEXT:    v_mov_b32_e32 v1, 0x800000
2579; SI-GISEL-NEXT:    v_cmp_lt_f32_e64 vcc, -|v0|, v1
2580; SI-GISEL-NEXT:    v_cndmask_b32_e64 v1, 0, 1, vcc
2581; SI-GISEL-NEXT:    v_lshlrev_b32_e32 v1, 5, v1
2582; SI-GISEL-NEXT:    v_ldexp_f32_e64 v0, -|v0|, v1
2583; SI-GISEL-NEXT:    v_log_f32_e32 v0, v0
2584; SI-GISEL-NEXT:    v_mov_b32_e32 v1, 0x3f317217
2585; SI-GISEL-NEXT:    v_mov_b32_e32 v3, 0x3377d1cf
2586; SI-GISEL-NEXT:    v_mul_f32_e32 v2, 0x3f317217, v0
2587; SI-GISEL-NEXT:    v_fma_f32 v1, v0, v1, -v2
2588; SI-GISEL-NEXT:    v_fma_f32 v1, v0, v3, v1
2589; SI-GISEL-NEXT:    v_add_f32_e32 v1, v2, v1
2590; SI-GISEL-NEXT:    v_mov_b32_e32 v2, 0x7f800000
2591; SI-GISEL-NEXT:    v_cmp_lt_f32_e64 s[4:5], |v0|, v2
2592; SI-GISEL-NEXT:    v_cndmask_b32_e64 v0, v0, v1, s[4:5]
2593; SI-GISEL-NEXT:    v_mov_b32_e32 v1, 0x41b17218
2594; SI-GISEL-NEXT:    v_cndmask_b32_e32 v1, 0, v1, vcc
2595; SI-GISEL-NEXT:    v_sub_f32_e32 v0, v0, v1
2596; SI-GISEL-NEXT:    s_setpc_b64 s[30:31]
2597;
2598; VI-SDAG-LABEL: v_log_fneg_fabs_f32:
2599; VI-SDAG:       ; %bb.0:
2600; VI-SDAG-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
2601; VI-SDAG-NEXT:    s_mov_b32 s4, 0x80800000
2602; VI-SDAG-NEXT:    v_cmp_gt_f32_e64 vcc, |v0|, s4
2603; VI-SDAG-NEXT:    v_cndmask_b32_e64 v1, 0, 1, vcc
2604; VI-SDAG-NEXT:    v_lshlrev_b32_e32 v1, 5, v1
2605; VI-SDAG-NEXT:    v_ldexp_f32 v0, -|v0|, v1
2606; VI-SDAG-NEXT:    v_log_f32_e32 v0, v0
2607; VI-SDAG-NEXT:    s_mov_b32 s4, 0x7f800000
2608; VI-SDAG-NEXT:    v_and_b32_e32 v1, 0xfffff000, v0
2609; VI-SDAG-NEXT:    v_sub_f32_e32 v2, v0, v1
2610; VI-SDAG-NEXT:    v_mul_f32_e32 v3, 0x3f317000, v2
2611; VI-SDAG-NEXT:    v_mul_f32_e32 v2, 0x3805fdf4, v2
2612; VI-SDAG-NEXT:    v_mul_f32_e32 v4, 0x3805fdf4, v1
2613; VI-SDAG-NEXT:    v_add_f32_e32 v2, v4, v2
2614; VI-SDAG-NEXT:    v_add_f32_e32 v2, v3, v2
2615; VI-SDAG-NEXT:    v_mul_f32_e32 v1, 0x3f317000, v1
2616; VI-SDAG-NEXT:    v_add_f32_e32 v1, v1, v2
2617; VI-SDAG-NEXT:    v_cmp_lt_f32_e64 s[4:5], |v0|, s4
2618; VI-SDAG-NEXT:    v_cndmask_b32_e64 v0, v0, v1, s[4:5]
2619; VI-SDAG-NEXT:    v_mov_b32_e32 v1, 0x41b17218
2620; VI-SDAG-NEXT:    v_cndmask_b32_e32 v1, 0, v1, vcc
2621; VI-SDAG-NEXT:    v_sub_f32_e32 v0, v0, v1
2622; VI-SDAG-NEXT:    s_setpc_b64 s[30:31]
2623;
2624; VI-GISEL-LABEL: v_log_fneg_fabs_f32:
2625; VI-GISEL:       ; %bb.0:
2626; VI-GISEL-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
2627; VI-GISEL-NEXT:    v_mov_b32_e32 v1, 0x800000
2628; VI-GISEL-NEXT:    v_cmp_lt_f32_e64 vcc, -|v0|, v1
2629; VI-GISEL-NEXT:    v_cndmask_b32_e64 v1, 0, 1, vcc
2630; VI-GISEL-NEXT:    v_lshlrev_b32_e32 v1, 5, v1
2631; VI-GISEL-NEXT:    v_ldexp_f32 v0, -|v0|, v1
2632; VI-GISEL-NEXT:    v_log_f32_e32 v0, v0
2633; VI-GISEL-NEXT:    v_and_b32_e32 v1, 0xfffff000, v0
2634; VI-GISEL-NEXT:    v_sub_f32_e32 v2, v0, v1
2635; VI-GISEL-NEXT:    v_mul_f32_e32 v3, 0x3805fdf4, v1
2636; VI-GISEL-NEXT:    v_mul_f32_e32 v4, 0x3805fdf4, v2
2637; VI-GISEL-NEXT:    v_add_f32_e32 v3, v3, v4
2638; VI-GISEL-NEXT:    v_mul_f32_e32 v2, 0x3f317000, v2
2639; VI-GISEL-NEXT:    v_add_f32_e32 v2, v2, v3
2640; VI-GISEL-NEXT:    v_mul_f32_e32 v1, 0x3f317000, v1
2641; VI-GISEL-NEXT:    v_add_f32_e32 v1, v1, v2
2642; VI-GISEL-NEXT:    v_mov_b32_e32 v2, 0x7f800000
2643; VI-GISEL-NEXT:    v_cmp_lt_f32_e64 s[4:5], |v0|, v2
2644; VI-GISEL-NEXT:    v_cndmask_b32_e64 v0, v0, v1, s[4:5]
2645; VI-GISEL-NEXT:    v_mov_b32_e32 v1, 0x41b17218
2646; VI-GISEL-NEXT:    v_cndmask_b32_e32 v1, 0, v1, vcc
2647; VI-GISEL-NEXT:    v_sub_f32_e32 v0, v0, v1
2648; VI-GISEL-NEXT:    s_setpc_b64 s[30:31]
2649;
2650; GFX900-SDAG-LABEL: v_log_fneg_fabs_f32:
2651; GFX900-SDAG:       ; %bb.0:
2652; GFX900-SDAG-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
2653; GFX900-SDAG-NEXT:    s_mov_b32 s4, 0x80800000
2654; GFX900-SDAG-NEXT:    v_cmp_gt_f32_e64 vcc, |v0|, s4
2655; GFX900-SDAG-NEXT:    v_cndmask_b32_e64 v1, 0, 1, vcc
2656; GFX900-SDAG-NEXT:    v_lshlrev_b32_e32 v1, 5, v1
2657; GFX900-SDAG-NEXT:    v_ldexp_f32 v0, -|v0|, v1
2658; GFX900-SDAG-NEXT:    v_log_f32_e32 v0, v0
2659; GFX900-SDAG-NEXT:    s_mov_b32 s4, 0x3f317217
2660; GFX900-SDAG-NEXT:    v_mul_f32_e32 v1, 0x3f317217, v0
2661; GFX900-SDAG-NEXT:    v_fma_f32 v2, v0, s4, -v1
2662; GFX900-SDAG-NEXT:    s_mov_b32 s4, 0x3377d1cf
2663; GFX900-SDAG-NEXT:    v_fma_f32 v2, v0, s4, v2
2664; GFX900-SDAG-NEXT:    s_mov_b32 s4, 0x7f800000
2665; GFX900-SDAG-NEXT:    v_add_f32_e32 v1, v1, v2
2666; GFX900-SDAG-NEXT:    v_cmp_lt_f32_e64 s[4:5], |v0|, s4
2667; GFX900-SDAG-NEXT:    v_cndmask_b32_e64 v0, v0, v1, s[4:5]
2668; GFX900-SDAG-NEXT:    v_mov_b32_e32 v1, 0x41b17218
2669; GFX900-SDAG-NEXT:    v_cndmask_b32_e32 v1, 0, v1, vcc
2670; GFX900-SDAG-NEXT:    v_sub_f32_e32 v0, v0, v1
2671; GFX900-SDAG-NEXT:    s_setpc_b64 s[30:31]
2672;
2673; GFX900-GISEL-LABEL: v_log_fneg_fabs_f32:
2674; GFX900-GISEL:       ; %bb.0:
2675; GFX900-GISEL-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
2676; GFX900-GISEL-NEXT:    v_mov_b32_e32 v1, 0x800000
2677; GFX900-GISEL-NEXT:    v_cmp_lt_f32_e64 vcc, -|v0|, v1
2678; GFX900-GISEL-NEXT:    v_cndmask_b32_e64 v1, 0, 1, vcc
2679; GFX900-GISEL-NEXT:    v_lshlrev_b32_e32 v1, 5, v1
2680; GFX900-GISEL-NEXT:    v_ldexp_f32 v0, -|v0|, v1
2681; GFX900-GISEL-NEXT:    v_log_f32_e32 v0, v0
2682; GFX900-GISEL-NEXT:    v_mov_b32_e32 v1, 0x3f317217
2683; GFX900-GISEL-NEXT:    v_mov_b32_e32 v3, 0x3377d1cf
2684; GFX900-GISEL-NEXT:    v_mul_f32_e32 v2, 0x3f317217, v0
2685; GFX900-GISEL-NEXT:    v_fma_f32 v1, v0, v1, -v2
2686; GFX900-GISEL-NEXT:    v_fma_f32 v1, v0, v3, v1
2687; GFX900-GISEL-NEXT:    v_add_f32_e32 v1, v2, v1
2688; GFX900-GISEL-NEXT:    v_mov_b32_e32 v2, 0x7f800000
2689; GFX900-GISEL-NEXT:    v_cmp_lt_f32_e64 s[4:5], |v0|, v2
2690; GFX900-GISEL-NEXT:    v_cndmask_b32_e64 v0, v0, v1, s[4:5]
2691; GFX900-GISEL-NEXT:    v_mov_b32_e32 v1, 0x41b17218
2692; GFX900-GISEL-NEXT:    v_cndmask_b32_e32 v1, 0, v1, vcc
2693; GFX900-GISEL-NEXT:    v_sub_f32_e32 v0, v0, v1
2694; GFX900-GISEL-NEXT:    s_setpc_b64 s[30:31]
2695;
2696; GFX1100-SDAG-LABEL: v_log_fneg_fabs_f32:
2697; GFX1100-SDAG:       ; %bb.0:
2698; GFX1100-SDAG-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
2699; GFX1100-SDAG-NEXT:    v_cmp_lt_f32_e64 s0, 0x80800000, |v0|
2700; GFX1100-SDAG-NEXT:    s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
2701; GFX1100-SDAG-NEXT:    v_cndmask_b32_e64 v1, 0, 1, s0
2702; GFX1100-SDAG-NEXT:    v_lshlrev_b32_e32 v1, 5, v1
2703; GFX1100-SDAG-NEXT:    s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
2704; GFX1100-SDAG-NEXT:    v_ldexp_f32 v0, -|v0|, v1
2705; GFX1100-SDAG-NEXT:    v_log_f32_e32 v0, v0
2706; GFX1100-SDAG-NEXT:    s_waitcnt_depctr 0xfff
2707; GFX1100-SDAG-NEXT:    v_mul_f32_e32 v1, 0x3f317217, v0
2708; GFX1100-SDAG-NEXT:    v_cmp_gt_f32_e64 vcc_lo, 0x7f800000, |v0|
2709; GFX1100-SDAG-NEXT:    s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
2710; GFX1100-SDAG-NEXT:    v_fma_f32 v2, 0x3f317217, v0, -v1
2711; GFX1100-SDAG-NEXT:    v_fmamk_f32 v2, v0, 0x3377d1cf, v2
2712; GFX1100-SDAG-NEXT:    s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
2713; GFX1100-SDAG-NEXT:    v_add_f32_e32 v1, v1, v2
2714; GFX1100-SDAG-NEXT:    v_cndmask_b32_e32 v0, v0, v1, vcc_lo
2715; GFX1100-SDAG-NEXT:    v_cndmask_b32_e64 v1, 0, 0x41b17218, s0
2716; GFX1100-SDAG-NEXT:    s_delay_alu instid0(VALU_DEP_1)
2717; GFX1100-SDAG-NEXT:    v_sub_f32_e32 v0, v0, v1
2718; GFX1100-SDAG-NEXT:    s_setpc_b64 s[30:31]
2719;
2720; GFX1100-GISEL-LABEL: v_log_fneg_fabs_f32:
2721; GFX1100-GISEL:       ; %bb.0:
2722; GFX1100-GISEL-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
2723; GFX1100-GISEL-NEXT:    v_cmp_gt_f32_e64 s0, 0x800000, -|v0|
2724; GFX1100-GISEL-NEXT:    s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
2725; GFX1100-GISEL-NEXT:    v_cndmask_b32_e64 v1, 0, 1, s0
2726; GFX1100-GISEL-NEXT:    v_lshlrev_b32_e32 v1, 5, v1
2727; GFX1100-GISEL-NEXT:    s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
2728; GFX1100-GISEL-NEXT:    v_ldexp_f32 v0, -|v0|, v1
2729; GFX1100-GISEL-NEXT:    v_log_f32_e32 v0, v0
2730; GFX1100-GISEL-NEXT:    s_waitcnt_depctr 0xfff
2731; GFX1100-GISEL-NEXT:    v_mul_f32_e32 v1, 0x3f317217, v0
2732; GFX1100-GISEL-NEXT:    v_cmp_gt_f32_e64 vcc_lo, 0x7f800000, |v0|
2733; GFX1100-GISEL-NEXT:    s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
2734; GFX1100-GISEL-NEXT:    v_fma_f32 v2, 0x3f317217, v0, -v1
2735; GFX1100-GISEL-NEXT:    v_fmac_f32_e32 v2, 0x3377d1cf, v0
2736; GFX1100-GISEL-NEXT:    s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
2737; GFX1100-GISEL-NEXT:    v_add_f32_e32 v1, v1, v2
2738; GFX1100-GISEL-NEXT:    v_cndmask_b32_e32 v0, v0, v1, vcc_lo
2739; GFX1100-GISEL-NEXT:    v_cndmask_b32_e64 v1, 0, 0x41b17218, s0
2740; GFX1100-GISEL-NEXT:    s_delay_alu instid0(VALU_DEP_1)
2741; GFX1100-GISEL-NEXT:    v_sub_f32_e32 v0, v0, v1
2742; GFX1100-GISEL-NEXT:    s_setpc_b64 s[30:31]
2743;
2744; R600-LABEL: v_log_fneg_fabs_f32:
2745; R600:       ; %bb.0:
2746; R600-NEXT:    CF_END
2747; R600-NEXT:    PAD
2748;
2749; CM-LABEL: v_log_fneg_fabs_f32:
2750; CM:       ; %bb.0:
2751; CM-NEXT:    CF_END
2752; CM-NEXT:    PAD
2753  %fabs = call float @llvm.fabs.f32(float %in)
2754  %fneg.fabs = fneg float %fabs
2755  %result = call float @llvm.log.f32(float %fneg.fabs)
2756  ret float %result
2757}
2758
2759define float @v_log_fneg_f32(float %in) {
2760; SI-SDAG-LABEL: v_log_fneg_f32:
2761; SI-SDAG:       ; %bb.0:
2762; SI-SDAG-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
2763; SI-SDAG-NEXT:    s_mov_b32 s4, 0x80800000
2764; SI-SDAG-NEXT:    v_cmp_lt_f32_e32 vcc, s4, v0
2765; SI-SDAG-NEXT:    v_cndmask_b32_e64 v1, 0, 1, vcc
2766; SI-SDAG-NEXT:    v_lshlrev_b32_e32 v1, 5, v1
2767; SI-SDAG-NEXT:    v_ldexp_f32_e64 v0, -v0, v1
2768; SI-SDAG-NEXT:    v_log_f32_e32 v0, v0
2769; SI-SDAG-NEXT:    s_mov_b32 s4, 0x3f317217
2770; SI-SDAG-NEXT:    v_mul_f32_e32 v1, 0x3f317217, v0
2771; SI-SDAG-NEXT:    v_fma_f32 v2, v0, s4, -v1
2772; SI-SDAG-NEXT:    s_mov_b32 s4, 0x3377d1cf
2773; SI-SDAG-NEXT:    v_fma_f32 v2, v0, s4, v2
2774; SI-SDAG-NEXT:    s_mov_b32 s4, 0x7f800000
2775; SI-SDAG-NEXT:    v_add_f32_e32 v1, v1, v2
2776; SI-SDAG-NEXT:    v_cmp_lt_f32_e64 s[4:5], |v0|, s4
2777; SI-SDAG-NEXT:    v_cndmask_b32_e64 v0, v0, v1, s[4:5]
2778; SI-SDAG-NEXT:    v_mov_b32_e32 v1, 0x41b17218
2779; SI-SDAG-NEXT:    v_cndmask_b32_e32 v1, 0, v1, vcc
2780; SI-SDAG-NEXT:    v_sub_f32_e32 v0, v0, v1
2781; SI-SDAG-NEXT:    s_setpc_b64 s[30:31]
2782;
2783; SI-GISEL-LABEL: v_log_fneg_f32:
2784; SI-GISEL:       ; %bb.0:
2785; SI-GISEL-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
2786; SI-GISEL-NEXT:    v_mov_b32_e32 v1, 0x800000
2787; SI-GISEL-NEXT:    v_cmp_lt_f32_e64 vcc, -v0, v1
2788; SI-GISEL-NEXT:    v_cndmask_b32_e64 v1, 0, 1, vcc
2789; SI-GISEL-NEXT:    v_lshlrev_b32_e32 v1, 5, v1
2790; SI-GISEL-NEXT:    v_ldexp_f32_e64 v0, -v0, v1
2791; SI-GISEL-NEXT:    v_log_f32_e32 v0, v0
2792; SI-GISEL-NEXT:    v_mov_b32_e32 v1, 0x3f317217
2793; SI-GISEL-NEXT:    v_mov_b32_e32 v3, 0x3377d1cf
2794; SI-GISEL-NEXT:    v_mul_f32_e32 v2, 0x3f317217, v0
2795; SI-GISEL-NEXT:    v_fma_f32 v1, v0, v1, -v2
2796; SI-GISEL-NEXT:    v_fma_f32 v1, v0, v3, v1
2797; SI-GISEL-NEXT:    v_add_f32_e32 v1, v2, v1
2798; SI-GISEL-NEXT:    v_mov_b32_e32 v2, 0x7f800000
2799; SI-GISEL-NEXT:    v_cmp_lt_f32_e64 s[4:5], |v0|, v2
2800; SI-GISEL-NEXT:    v_cndmask_b32_e64 v0, v0, v1, s[4:5]
2801; SI-GISEL-NEXT:    v_mov_b32_e32 v1, 0x41b17218
2802; SI-GISEL-NEXT:    v_cndmask_b32_e32 v1, 0, v1, vcc
2803; SI-GISEL-NEXT:    v_sub_f32_e32 v0, v0, v1
2804; SI-GISEL-NEXT:    s_setpc_b64 s[30:31]
2805;
2806; VI-SDAG-LABEL: v_log_fneg_f32:
2807; VI-SDAG:       ; %bb.0:
2808; VI-SDAG-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
2809; VI-SDAG-NEXT:    s_mov_b32 s4, 0x80800000
2810; VI-SDAG-NEXT:    v_cmp_lt_f32_e32 vcc, s4, v0
2811; VI-SDAG-NEXT:    v_cndmask_b32_e64 v1, 0, 1, vcc
2812; VI-SDAG-NEXT:    v_lshlrev_b32_e32 v1, 5, v1
2813; VI-SDAG-NEXT:    v_ldexp_f32 v0, -v0, v1
2814; VI-SDAG-NEXT:    v_log_f32_e32 v0, v0
2815; VI-SDAG-NEXT:    s_mov_b32 s4, 0x7f800000
2816; VI-SDAG-NEXT:    v_and_b32_e32 v1, 0xfffff000, v0
2817; VI-SDAG-NEXT:    v_sub_f32_e32 v2, v0, v1
2818; VI-SDAG-NEXT:    v_mul_f32_e32 v3, 0x3f317000, v2
2819; VI-SDAG-NEXT:    v_mul_f32_e32 v2, 0x3805fdf4, v2
2820; VI-SDAG-NEXT:    v_mul_f32_e32 v4, 0x3805fdf4, v1
2821; VI-SDAG-NEXT:    v_add_f32_e32 v2, v4, v2
2822; VI-SDAG-NEXT:    v_add_f32_e32 v2, v3, v2
2823; VI-SDAG-NEXT:    v_mul_f32_e32 v1, 0x3f317000, v1
2824; VI-SDAG-NEXT:    v_add_f32_e32 v1, v1, v2
2825; VI-SDAG-NEXT:    v_cmp_lt_f32_e64 s[4:5], |v0|, s4
2826; VI-SDAG-NEXT:    v_cndmask_b32_e64 v0, v0, v1, s[4:5]
2827; VI-SDAG-NEXT:    v_mov_b32_e32 v1, 0x41b17218
2828; VI-SDAG-NEXT:    v_cndmask_b32_e32 v1, 0, v1, vcc
2829; VI-SDAG-NEXT:    v_sub_f32_e32 v0, v0, v1
2830; VI-SDAG-NEXT:    s_setpc_b64 s[30:31]
2831;
2832; VI-GISEL-LABEL: v_log_fneg_f32:
2833; VI-GISEL:       ; %bb.0:
2834; VI-GISEL-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
2835; VI-GISEL-NEXT:    v_mov_b32_e32 v1, 0x800000
2836; VI-GISEL-NEXT:    v_cmp_lt_f32_e64 vcc, -v0, v1
2837; VI-GISEL-NEXT:    v_cndmask_b32_e64 v1, 0, 1, vcc
2838; VI-GISEL-NEXT:    v_lshlrev_b32_e32 v1, 5, v1
2839; VI-GISEL-NEXT:    v_ldexp_f32 v0, -v0, v1
2840; VI-GISEL-NEXT:    v_log_f32_e32 v0, v0
2841; VI-GISEL-NEXT:    v_and_b32_e32 v1, 0xfffff000, v0
2842; VI-GISEL-NEXT:    v_sub_f32_e32 v2, v0, v1
2843; VI-GISEL-NEXT:    v_mul_f32_e32 v3, 0x3805fdf4, v1
2844; VI-GISEL-NEXT:    v_mul_f32_e32 v4, 0x3805fdf4, v2
2845; VI-GISEL-NEXT:    v_add_f32_e32 v3, v3, v4
2846; VI-GISEL-NEXT:    v_mul_f32_e32 v2, 0x3f317000, v2
2847; VI-GISEL-NEXT:    v_add_f32_e32 v2, v2, v3
2848; VI-GISEL-NEXT:    v_mul_f32_e32 v1, 0x3f317000, v1
2849; VI-GISEL-NEXT:    v_add_f32_e32 v1, v1, v2
2850; VI-GISEL-NEXT:    v_mov_b32_e32 v2, 0x7f800000
2851; VI-GISEL-NEXT:    v_cmp_lt_f32_e64 s[4:5], |v0|, v2
2852; VI-GISEL-NEXT:    v_cndmask_b32_e64 v0, v0, v1, s[4:5]
2853; VI-GISEL-NEXT:    v_mov_b32_e32 v1, 0x41b17218
2854; VI-GISEL-NEXT:    v_cndmask_b32_e32 v1, 0, v1, vcc
2855; VI-GISEL-NEXT:    v_sub_f32_e32 v0, v0, v1
2856; VI-GISEL-NEXT:    s_setpc_b64 s[30:31]
2857;
2858; GFX900-SDAG-LABEL: v_log_fneg_f32:
2859; GFX900-SDAG:       ; %bb.0:
2860; GFX900-SDAG-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
2861; GFX900-SDAG-NEXT:    s_mov_b32 s4, 0x80800000
2862; GFX900-SDAG-NEXT:    v_cmp_lt_f32_e32 vcc, s4, v0
2863; GFX900-SDAG-NEXT:    v_cndmask_b32_e64 v1, 0, 1, vcc
2864; GFX900-SDAG-NEXT:    v_lshlrev_b32_e32 v1, 5, v1
2865; GFX900-SDAG-NEXT:    v_ldexp_f32 v0, -v0, v1
2866; GFX900-SDAG-NEXT:    v_log_f32_e32 v0, v0
2867; GFX900-SDAG-NEXT:    s_mov_b32 s4, 0x3f317217
2868; GFX900-SDAG-NEXT:    v_mul_f32_e32 v1, 0x3f317217, v0
2869; GFX900-SDAG-NEXT:    v_fma_f32 v2, v0, s4, -v1
2870; GFX900-SDAG-NEXT:    s_mov_b32 s4, 0x3377d1cf
2871; GFX900-SDAG-NEXT:    v_fma_f32 v2, v0, s4, v2
2872; GFX900-SDAG-NEXT:    s_mov_b32 s4, 0x7f800000
2873; GFX900-SDAG-NEXT:    v_add_f32_e32 v1, v1, v2
2874; GFX900-SDAG-NEXT:    v_cmp_lt_f32_e64 s[4:5], |v0|, s4
2875; GFX900-SDAG-NEXT:    v_cndmask_b32_e64 v0, v0, v1, s[4:5]
2876; GFX900-SDAG-NEXT:    v_mov_b32_e32 v1, 0x41b17218
2877; GFX900-SDAG-NEXT:    v_cndmask_b32_e32 v1, 0, v1, vcc
2878; GFX900-SDAG-NEXT:    v_sub_f32_e32 v0, v0, v1
2879; GFX900-SDAG-NEXT:    s_setpc_b64 s[30:31]
2880;
2881; GFX900-GISEL-LABEL: v_log_fneg_f32:
2882; GFX900-GISEL:       ; %bb.0:
2883; GFX900-GISEL-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
2884; GFX900-GISEL-NEXT:    v_mov_b32_e32 v1, 0x800000
2885; GFX900-GISEL-NEXT:    v_cmp_lt_f32_e64 vcc, -v0, v1
2886; GFX900-GISEL-NEXT:    v_cndmask_b32_e64 v1, 0, 1, vcc
2887; GFX900-GISEL-NEXT:    v_lshlrev_b32_e32 v1, 5, v1
2888; GFX900-GISEL-NEXT:    v_ldexp_f32 v0, -v0, v1
2889; GFX900-GISEL-NEXT:    v_log_f32_e32 v0, v0
2890; GFX900-GISEL-NEXT:    v_mov_b32_e32 v1, 0x3f317217
2891; GFX900-GISEL-NEXT:    v_mov_b32_e32 v3, 0x3377d1cf
2892; GFX900-GISEL-NEXT:    v_mul_f32_e32 v2, 0x3f317217, v0
2893; GFX900-GISEL-NEXT:    v_fma_f32 v1, v0, v1, -v2
2894; GFX900-GISEL-NEXT:    v_fma_f32 v1, v0, v3, v1
2895; GFX900-GISEL-NEXT:    v_add_f32_e32 v1, v2, v1
2896; GFX900-GISEL-NEXT:    v_mov_b32_e32 v2, 0x7f800000
2897; GFX900-GISEL-NEXT:    v_cmp_lt_f32_e64 s[4:5], |v0|, v2
2898; GFX900-GISEL-NEXT:    v_cndmask_b32_e64 v0, v0, v1, s[4:5]
2899; GFX900-GISEL-NEXT:    v_mov_b32_e32 v1, 0x41b17218
2900; GFX900-GISEL-NEXT:    v_cndmask_b32_e32 v1, 0, v1, vcc
2901; GFX900-GISEL-NEXT:    v_sub_f32_e32 v0, v0, v1
2902; GFX900-GISEL-NEXT:    s_setpc_b64 s[30:31]
2903;
2904; GFX1100-SDAG-LABEL: v_log_fneg_f32:
2905; GFX1100-SDAG:       ; %bb.0:
2906; GFX1100-SDAG-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
2907; GFX1100-SDAG-NEXT:    v_cmp_lt_f32_e32 vcc_lo, 0x80800000, v0
2908; GFX1100-SDAG-NEXT:    v_cndmask_b32_e64 v1, 0, 1, vcc_lo
2909; GFX1100-SDAG-NEXT:    s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
2910; GFX1100-SDAG-NEXT:    v_lshlrev_b32_e32 v1, 5, v1
2911; GFX1100-SDAG-NEXT:    v_ldexp_f32 v0, -v0, v1
2912; GFX1100-SDAG-NEXT:    s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_2)
2913; GFX1100-SDAG-NEXT:    v_log_f32_e32 v0, v0
2914; GFX1100-SDAG-NEXT:    s_waitcnt_depctr 0xfff
2915; GFX1100-SDAG-NEXT:    v_mul_f32_e32 v1, 0x3f317217, v0
2916; GFX1100-SDAG-NEXT:    v_cmp_gt_f32_e64 s0, 0x7f800000, |v0|
2917; GFX1100-SDAG-NEXT:    v_fma_f32 v2, 0x3f317217, v0, -v1
2918; GFX1100-SDAG-NEXT:    s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
2919; GFX1100-SDAG-NEXT:    v_fmamk_f32 v2, v0, 0x3377d1cf, v2
2920; GFX1100-SDAG-NEXT:    v_add_f32_e32 v1, v1, v2
2921; GFX1100-SDAG-NEXT:    s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
2922; GFX1100-SDAG-NEXT:    v_cndmask_b32_e64 v0, v0, v1, s0
2923; GFX1100-SDAG-NEXT:    v_cndmask_b32_e64 v1, 0, 0x41b17218, vcc_lo
2924; GFX1100-SDAG-NEXT:    v_sub_f32_e32 v0, v0, v1
2925; GFX1100-SDAG-NEXT:    s_setpc_b64 s[30:31]
2926;
2927; GFX1100-GISEL-LABEL: v_log_fneg_f32:
2928; GFX1100-GISEL:       ; %bb.0:
2929; GFX1100-GISEL-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
2930; GFX1100-GISEL-NEXT:    v_cmp_gt_f32_e64 s0, 0x800000, -v0
2931; GFX1100-GISEL-NEXT:    s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
2932; GFX1100-GISEL-NEXT:    v_cndmask_b32_e64 v1, 0, 1, s0
2933; GFX1100-GISEL-NEXT:    v_lshlrev_b32_e32 v1, 5, v1
2934; GFX1100-GISEL-NEXT:    s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
2935; GFX1100-GISEL-NEXT:    v_ldexp_f32 v0, -v0, v1
2936; GFX1100-GISEL-NEXT:    v_log_f32_e32 v0, v0
2937; GFX1100-GISEL-NEXT:    s_waitcnt_depctr 0xfff
2938; GFX1100-GISEL-NEXT:    v_mul_f32_e32 v1, 0x3f317217, v0
2939; GFX1100-GISEL-NEXT:    v_cmp_gt_f32_e64 vcc_lo, 0x7f800000, |v0|
2940; GFX1100-GISEL-NEXT:    s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
2941; GFX1100-GISEL-NEXT:    v_fma_f32 v2, 0x3f317217, v0, -v1
2942; GFX1100-GISEL-NEXT:    v_fmac_f32_e32 v2, 0x3377d1cf, v0
2943; GFX1100-GISEL-NEXT:    s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
2944; GFX1100-GISEL-NEXT:    v_add_f32_e32 v1, v1, v2
2945; GFX1100-GISEL-NEXT:    v_cndmask_b32_e32 v0, v0, v1, vcc_lo
2946; GFX1100-GISEL-NEXT:    v_cndmask_b32_e64 v1, 0, 0x41b17218, s0
2947; GFX1100-GISEL-NEXT:    s_delay_alu instid0(VALU_DEP_1)
2948; GFX1100-GISEL-NEXT:    v_sub_f32_e32 v0, v0, v1
2949; GFX1100-GISEL-NEXT:    s_setpc_b64 s[30:31]
2950;
2951; R600-LABEL: v_log_fneg_f32:
2952; R600:       ; %bb.0:
2953; R600-NEXT:    CF_END
2954; R600-NEXT:    PAD
2955;
2956; CM-LABEL: v_log_fneg_f32:
2957; CM:       ; %bb.0:
2958; CM-NEXT:    CF_END
2959; CM-NEXT:    PAD
2960  %fneg = fneg float %in
2961  %result = call float @llvm.log.f32(float %fneg)
2962  ret float %result
2963}
2964
2965define float @v_log_f32_fast(float %in) {
2966; SI-SDAG-LABEL: v_log_f32_fast:
2967; SI-SDAG:       ; %bb.0:
2968; SI-SDAG-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
2969; SI-SDAG-NEXT:    s_mov_b32 s4, 0x800000
2970; SI-SDAG-NEXT:    v_cmp_gt_f32_e32 vcc, s4, v0
2971; SI-SDAG-NEXT:    v_cndmask_b32_e64 v2, 0, 1, vcc
2972; SI-SDAG-NEXT:    v_lshlrev_b32_e32 v2, 5, v2
2973; SI-SDAG-NEXT:    v_ldexp_f32_e32 v0, v0, v2
2974; SI-SDAG-NEXT:    v_log_f32_e32 v0, v0
2975; SI-SDAG-NEXT:    v_mov_b32_e32 v1, 0xc1b17218
2976; SI-SDAG-NEXT:    v_cndmask_b32_e32 v1, 0, v1, vcc
2977; SI-SDAG-NEXT:    s_mov_b32 s4, 0x3f317218
2978; SI-SDAG-NEXT:    v_fma_f32 v0, v0, s4, v1
2979; SI-SDAG-NEXT:    s_setpc_b64 s[30:31]
2980;
2981; SI-GISEL-LABEL: v_log_f32_fast:
2982; SI-GISEL:       ; %bb.0:
2983; SI-GISEL-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
2984; SI-GISEL-NEXT:    v_log_f32_e32 v2, v0
2985; SI-GISEL-NEXT:    v_mov_b32_e32 v1, 0x800000
2986; SI-GISEL-NEXT:    v_mov_b32_e32 v3, 0xc1b17218
2987; SI-GISEL-NEXT:    v_cmp_lt_f32_e32 vcc, v0, v1
2988; SI-GISEL-NEXT:    v_cndmask_b32_e32 v0, 0, v3, vcc
2989; SI-GISEL-NEXT:    v_mov_b32_e32 v1, 0x3f317218
2990; SI-GISEL-NEXT:    v_fma_f32 v0, v2, v1, v0
2991; SI-GISEL-NEXT:    s_setpc_b64 s[30:31]
2992;
2993; VI-SDAG-LABEL: v_log_f32_fast:
2994; VI-SDAG:       ; %bb.0:
2995; VI-SDAG-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
2996; VI-SDAG-NEXT:    s_mov_b32 s4, 0x800000
2997; VI-SDAG-NEXT:    v_cmp_gt_f32_e32 vcc, s4, v0
2998; VI-SDAG-NEXT:    v_cndmask_b32_e64 v2, 0, 1, vcc
2999; VI-SDAG-NEXT:    v_lshlrev_b32_e32 v2, 5, v2
3000; VI-SDAG-NEXT:    v_ldexp_f32 v0, v0, v2
3001; VI-SDAG-NEXT:    v_log_f32_e32 v0, v0
3002; VI-SDAG-NEXT:    v_mov_b32_e32 v1, 0xc1b17218
3003; VI-SDAG-NEXT:    v_cndmask_b32_e32 v1, 0, v1, vcc
3004; VI-SDAG-NEXT:    v_mul_f32_e32 v0, 0x3f317218, v0
3005; VI-SDAG-NEXT:    v_add_f32_e32 v0, v0, v1
3006; VI-SDAG-NEXT:    s_setpc_b64 s[30:31]
3007;
3008; VI-GISEL-LABEL: v_log_f32_fast:
3009; VI-GISEL:       ; %bb.0:
3010; VI-GISEL-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
3011; VI-GISEL-NEXT:    v_log_f32_e32 v2, v0
3012; VI-GISEL-NEXT:    v_mov_b32_e32 v1, 0x800000
3013; VI-GISEL-NEXT:    v_mov_b32_e32 v3, 0xc1b17218
3014; VI-GISEL-NEXT:    v_cmp_lt_f32_e32 vcc, v0, v1
3015; VI-GISEL-NEXT:    v_cndmask_b32_e32 v0, 0, v3, vcc
3016; VI-GISEL-NEXT:    v_mul_f32_e32 v1, 0x3f317218, v2
3017; VI-GISEL-NEXT:    v_add_f32_e32 v0, v1, v0
3018; VI-GISEL-NEXT:    s_setpc_b64 s[30:31]
3019;
3020; GFX900-SDAG-LABEL: v_log_f32_fast:
3021; GFX900-SDAG:       ; %bb.0:
3022; GFX900-SDAG-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
3023; GFX900-SDAG-NEXT:    s_mov_b32 s4, 0x800000
3024; GFX900-SDAG-NEXT:    v_cmp_gt_f32_e32 vcc, s4, v0
3025; GFX900-SDAG-NEXT:    v_cndmask_b32_e64 v2, 0, 1, vcc
3026; GFX900-SDAG-NEXT:    v_lshlrev_b32_e32 v2, 5, v2
3027; GFX900-SDAG-NEXT:    v_ldexp_f32 v0, v0, v2
3028; GFX900-SDAG-NEXT:    v_log_f32_e32 v0, v0
3029; GFX900-SDAG-NEXT:    v_mov_b32_e32 v1, 0xc1b17218
3030; GFX900-SDAG-NEXT:    v_cndmask_b32_e32 v1, 0, v1, vcc
3031; GFX900-SDAG-NEXT:    s_mov_b32 s4, 0x3f317218
3032; GFX900-SDAG-NEXT:    v_fma_f32 v0, v0, s4, v1
3033; GFX900-SDAG-NEXT:    s_setpc_b64 s[30:31]
3034;
3035; GFX900-GISEL-LABEL: v_log_f32_fast:
3036; GFX900-GISEL:       ; %bb.0:
3037; GFX900-GISEL-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
3038; GFX900-GISEL-NEXT:    v_log_f32_e32 v2, v0
3039; GFX900-GISEL-NEXT:    v_mov_b32_e32 v1, 0x800000
3040; GFX900-GISEL-NEXT:    v_mov_b32_e32 v3, 0xc1b17218
3041; GFX900-GISEL-NEXT:    v_cmp_lt_f32_e32 vcc, v0, v1
3042; GFX900-GISEL-NEXT:    v_cndmask_b32_e32 v0, 0, v3, vcc
3043; GFX900-GISEL-NEXT:    v_mov_b32_e32 v1, 0x3f317218
3044; GFX900-GISEL-NEXT:    v_fma_f32 v0, v2, v1, v0
3045; GFX900-GISEL-NEXT:    s_setpc_b64 s[30:31]
3046;
3047; GFX1100-SDAG-LABEL: v_log_f32_fast:
3048; GFX1100-SDAG:       ; %bb.0:
3049; GFX1100-SDAG-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
3050; GFX1100-SDAG-NEXT:    v_cmp_gt_f32_e32 vcc_lo, 0x800000, v0
3051; GFX1100-SDAG-NEXT:    v_cndmask_b32_e64 v2, 0, 1, vcc_lo
3052; GFX1100-SDAG-NEXT:    v_cndmask_b32_e64 v1, 0, 0xc1b17218, vcc_lo
3053; GFX1100-SDAG-NEXT:    s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
3054; GFX1100-SDAG-NEXT:    v_lshlrev_b32_e32 v2, 5, v2
3055; GFX1100-SDAG-NEXT:    v_ldexp_f32 v0, v0, v2
3056; GFX1100-SDAG-NEXT:    s_delay_alu instid0(VALU_DEP_1)
3057; GFX1100-SDAG-NEXT:    v_log_f32_e32 v0, v0
3058; GFX1100-SDAG-NEXT:    s_waitcnt_depctr 0xfff
3059; GFX1100-SDAG-NEXT:    v_fmamk_f32 v0, v0, 0x3f317218, v1
3060; GFX1100-SDAG-NEXT:    s_setpc_b64 s[30:31]
3061;
3062; GFX1100-GISEL-LABEL: v_log_f32_fast:
3063; GFX1100-GISEL:       ; %bb.0:
3064; GFX1100-GISEL-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
3065; GFX1100-GISEL-NEXT:    v_log_f32_e32 v1, v0
3066; GFX1100-GISEL-NEXT:    v_cmp_gt_f32_e32 vcc_lo, 0x800000, v0
3067; GFX1100-GISEL-NEXT:    v_cndmask_b32_e64 v0, 0, 0xc1b17218, vcc_lo
3068; GFX1100-GISEL-NEXT:    s_waitcnt_depctr 0xfff
3069; GFX1100-GISEL-NEXT:    v_fmac_f32_e32 v0, 0x3f317218, v1
3070; GFX1100-GISEL-NEXT:    s_setpc_b64 s[30:31]
3071;
3072; R600-LABEL: v_log_f32_fast:
3073; R600:       ; %bb.0:
3074; R600-NEXT:    CF_END
3075; R600-NEXT:    PAD
3076;
3077; CM-LABEL: v_log_f32_fast:
3078; CM:       ; %bb.0:
3079; CM-NEXT:    CF_END
3080; CM-NEXT:    PAD
3081  %result = call fast float @llvm.log.f32(float %in)
3082  ret float %result
3083}
3084
3085define float @v_log_f32_unsafe_math_attr(float %in) "unsafe-fp-math"="true" {
3086; SI-SDAG-LABEL: v_log_f32_unsafe_math_attr:
3087; SI-SDAG:       ; %bb.0:
3088; SI-SDAG-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
3089; SI-SDAG-NEXT:    s_mov_b32 s4, 0x800000
3090; SI-SDAG-NEXT:    v_cmp_gt_f32_e32 vcc, s4, v0
3091; SI-SDAG-NEXT:    v_cndmask_b32_e64 v2, 0, 1, vcc
3092; SI-SDAG-NEXT:    v_lshlrev_b32_e32 v2, 5, v2
3093; SI-SDAG-NEXT:    v_ldexp_f32_e32 v0, v0, v2
3094; SI-SDAG-NEXT:    v_log_f32_e32 v0, v0
3095; SI-SDAG-NEXT:    v_mov_b32_e32 v1, 0xc1b17218
3096; SI-SDAG-NEXT:    v_cndmask_b32_e32 v1, 0, v1, vcc
3097; SI-SDAG-NEXT:    s_mov_b32 s4, 0x3f317218
3098; SI-SDAG-NEXT:    v_fma_f32 v0, v0, s4, v1
3099; SI-SDAG-NEXT:    s_setpc_b64 s[30:31]
3100;
3101; SI-GISEL-LABEL: v_log_f32_unsafe_math_attr:
3102; SI-GISEL:       ; %bb.0:
3103; SI-GISEL-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
3104; SI-GISEL-NEXT:    v_log_f32_e32 v2, v0
3105; SI-GISEL-NEXT:    v_mov_b32_e32 v1, 0x800000
3106; SI-GISEL-NEXT:    v_mov_b32_e32 v3, 0xc1b17218
3107; SI-GISEL-NEXT:    v_cmp_lt_f32_e32 vcc, v0, v1
3108; SI-GISEL-NEXT:    v_cndmask_b32_e32 v0, 0, v3, vcc
3109; SI-GISEL-NEXT:    v_mov_b32_e32 v1, 0x3f317218
3110; SI-GISEL-NEXT:    v_fma_f32 v0, v2, v1, v0
3111; SI-GISEL-NEXT:    s_setpc_b64 s[30:31]
3112;
3113; VI-SDAG-LABEL: v_log_f32_unsafe_math_attr:
3114; VI-SDAG:       ; %bb.0:
3115; VI-SDAG-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
3116; VI-SDAG-NEXT:    s_mov_b32 s4, 0x800000
3117; VI-SDAG-NEXT:    v_cmp_gt_f32_e32 vcc, s4, v0
3118; VI-SDAG-NEXT:    v_cndmask_b32_e64 v2, 0, 1, vcc
3119; VI-SDAG-NEXT:    v_lshlrev_b32_e32 v2, 5, v2
3120; VI-SDAG-NEXT:    v_ldexp_f32 v0, v0, v2
3121; VI-SDAG-NEXT:    v_log_f32_e32 v0, v0
3122; VI-SDAG-NEXT:    v_mov_b32_e32 v1, 0xc1b17218
3123; VI-SDAG-NEXT:    v_cndmask_b32_e32 v1, 0, v1, vcc
3124; VI-SDAG-NEXT:    v_mul_f32_e32 v0, 0x3f317218, v0
3125; VI-SDAG-NEXT:    v_add_f32_e32 v0, v0, v1
3126; VI-SDAG-NEXT:    s_setpc_b64 s[30:31]
3127;
3128; VI-GISEL-LABEL: v_log_f32_unsafe_math_attr:
3129; VI-GISEL:       ; %bb.0:
3130; VI-GISEL-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
3131; VI-GISEL-NEXT:    v_log_f32_e32 v2, v0
3132; VI-GISEL-NEXT:    v_mov_b32_e32 v1, 0x800000
3133; VI-GISEL-NEXT:    v_mov_b32_e32 v3, 0xc1b17218
3134; VI-GISEL-NEXT:    v_cmp_lt_f32_e32 vcc, v0, v1
3135; VI-GISEL-NEXT:    v_cndmask_b32_e32 v0, 0, v3, vcc
3136; VI-GISEL-NEXT:    v_mul_f32_e32 v1, 0x3f317218, v2
3137; VI-GISEL-NEXT:    v_add_f32_e32 v0, v1, v0
3138; VI-GISEL-NEXT:    s_setpc_b64 s[30:31]
3139;
3140; GFX900-SDAG-LABEL: v_log_f32_unsafe_math_attr:
3141; GFX900-SDAG:       ; %bb.0:
3142; GFX900-SDAG-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
3143; GFX900-SDAG-NEXT:    s_mov_b32 s4, 0x800000
3144; GFX900-SDAG-NEXT:    v_cmp_gt_f32_e32 vcc, s4, v0
3145; GFX900-SDAG-NEXT:    v_cndmask_b32_e64 v2, 0, 1, vcc
3146; GFX900-SDAG-NEXT:    v_lshlrev_b32_e32 v2, 5, v2
3147; GFX900-SDAG-NEXT:    v_ldexp_f32 v0, v0, v2
3148; GFX900-SDAG-NEXT:    v_log_f32_e32 v0, v0
3149; GFX900-SDAG-NEXT:    v_mov_b32_e32 v1, 0xc1b17218
3150; GFX900-SDAG-NEXT:    v_cndmask_b32_e32 v1, 0, v1, vcc
3151; GFX900-SDAG-NEXT:    s_mov_b32 s4, 0x3f317218
3152; GFX900-SDAG-NEXT:    v_fma_f32 v0, v0, s4, v1
3153; GFX900-SDAG-NEXT:    s_setpc_b64 s[30:31]
3154;
3155; GFX900-GISEL-LABEL: v_log_f32_unsafe_math_attr:
3156; GFX900-GISEL:       ; %bb.0:
3157; GFX900-GISEL-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
3158; GFX900-GISEL-NEXT:    v_log_f32_e32 v2, v0
3159; GFX900-GISEL-NEXT:    v_mov_b32_e32 v1, 0x800000
3160; GFX900-GISEL-NEXT:    v_mov_b32_e32 v3, 0xc1b17218
3161; GFX900-GISEL-NEXT:    v_cmp_lt_f32_e32 vcc, v0, v1
3162; GFX900-GISEL-NEXT:    v_cndmask_b32_e32 v0, 0, v3, vcc
3163; GFX900-GISEL-NEXT:    v_mov_b32_e32 v1, 0x3f317218
3164; GFX900-GISEL-NEXT:    v_fma_f32 v0, v2, v1, v0
3165; GFX900-GISEL-NEXT:    s_setpc_b64 s[30:31]
3166;
3167; GFX1100-SDAG-LABEL: v_log_f32_unsafe_math_attr:
3168; GFX1100-SDAG:       ; %bb.0:
3169; GFX1100-SDAG-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
3170; GFX1100-SDAG-NEXT:    v_cmp_gt_f32_e32 vcc_lo, 0x800000, v0
3171; GFX1100-SDAG-NEXT:    v_cndmask_b32_e64 v2, 0, 1, vcc_lo
3172; GFX1100-SDAG-NEXT:    v_cndmask_b32_e64 v1, 0, 0xc1b17218, vcc_lo
3173; GFX1100-SDAG-NEXT:    s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
3174; GFX1100-SDAG-NEXT:    v_lshlrev_b32_e32 v2, 5, v2
3175; GFX1100-SDAG-NEXT:    v_ldexp_f32 v0, v0, v2
3176; GFX1100-SDAG-NEXT:    s_delay_alu instid0(VALU_DEP_1)
3177; GFX1100-SDAG-NEXT:    v_log_f32_e32 v0, v0
3178; GFX1100-SDAG-NEXT:    s_waitcnt_depctr 0xfff
3179; GFX1100-SDAG-NEXT:    v_fmamk_f32 v0, v0, 0x3f317218, v1
3180; GFX1100-SDAG-NEXT:    s_setpc_b64 s[30:31]
3181;
3182; GFX1100-GISEL-LABEL: v_log_f32_unsafe_math_attr:
3183; GFX1100-GISEL:       ; %bb.0:
3184; GFX1100-GISEL-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
3185; GFX1100-GISEL-NEXT:    v_log_f32_e32 v1, v0
3186; GFX1100-GISEL-NEXT:    v_cmp_gt_f32_e32 vcc_lo, 0x800000, v0
3187; GFX1100-GISEL-NEXT:    v_cndmask_b32_e64 v0, 0, 0xc1b17218, vcc_lo
3188; GFX1100-GISEL-NEXT:    s_waitcnt_depctr 0xfff
3189; GFX1100-GISEL-NEXT:    v_fmac_f32_e32 v0, 0x3f317218, v1
3190; GFX1100-GISEL-NEXT:    s_setpc_b64 s[30:31]
3191;
3192; R600-LABEL: v_log_f32_unsafe_math_attr:
3193; R600:       ; %bb.0:
3194; R600-NEXT:    CF_END
3195; R600-NEXT:    PAD
3196;
3197; CM-LABEL: v_log_f32_unsafe_math_attr:
3198; CM:       ; %bb.0:
3199; CM-NEXT:    CF_END
3200; CM-NEXT:    PAD
3201  %result = call float @llvm.log.f32(float %in)
3202  ret float %result
3203}
3204
3205define float @v_log_f32_approx_fn_attr(float %in) "approx-func-fp-math"="true" {
3206; SI-SDAG-LABEL: v_log_f32_approx_fn_attr:
3207; SI-SDAG:       ; %bb.0:
3208; SI-SDAG-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
3209; SI-SDAG-NEXT:    s_mov_b32 s4, 0x800000
3210; SI-SDAG-NEXT:    v_cmp_gt_f32_e32 vcc, s4, v0
3211; SI-SDAG-NEXT:    v_cndmask_b32_e64 v2, 0, 1, vcc
3212; SI-SDAG-NEXT:    v_lshlrev_b32_e32 v2, 5, v2
3213; SI-SDAG-NEXT:    v_ldexp_f32_e32 v0, v0, v2
3214; SI-SDAG-NEXT:    v_log_f32_e32 v0, v0
3215; SI-SDAG-NEXT:    v_mov_b32_e32 v1, 0xc1b17218
3216; SI-SDAG-NEXT:    v_cndmask_b32_e32 v1, 0, v1, vcc
3217; SI-SDAG-NEXT:    s_mov_b32 s4, 0x3f317218
3218; SI-SDAG-NEXT:    v_fma_f32 v0, v0, s4, v1
3219; SI-SDAG-NEXT:    s_setpc_b64 s[30:31]
3220;
3221; SI-GISEL-LABEL: v_log_f32_approx_fn_attr:
3222; SI-GISEL:       ; %bb.0:
3223; SI-GISEL-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
3224; SI-GISEL-NEXT:    v_log_f32_e32 v2, v0
3225; SI-GISEL-NEXT:    v_mov_b32_e32 v1, 0x800000
3226; SI-GISEL-NEXT:    v_mov_b32_e32 v3, 0xc1b17218
3227; SI-GISEL-NEXT:    v_cmp_lt_f32_e32 vcc, v0, v1
3228; SI-GISEL-NEXT:    v_cndmask_b32_e32 v0, 0, v3, vcc
3229; SI-GISEL-NEXT:    v_mov_b32_e32 v1, 0x3f317218
3230; SI-GISEL-NEXT:    v_fma_f32 v0, v2, v1, v0
3231; SI-GISEL-NEXT:    s_setpc_b64 s[30:31]
3232;
3233; VI-SDAG-LABEL: v_log_f32_approx_fn_attr:
3234; VI-SDAG:       ; %bb.0:
3235; VI-SDAG-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
3236; VI-SDAG-NEXT:    s_mov_b32 s4, 0x800000
3237; VI-SDAG-NEXT:    v_cmp_gt_f32_e32 vcc, s4, v0
3238; VI-SDAG-NEXT:    v_cndmask_b32_e64 v2, 0, 1, vcc
3239; VI-SDAG-NEXT:    v_lshlrev_b32_e32 v2, 5, v2
3240; VI-SDAG-NEXT:    v_ldexp_f32 v0, v0, v2
3241; VI-SDAG-NEXT:    v_log_f32_e32 v0, v0
3242; VI-SDAG-NEXT:    v_mov_b32_e32 v1, 0xc1b17218
3243; VI-SDAG-NEXT:    v_cndmask_b32_e32 v1, 0, v1, vcc
3244; VI-SDAG-NEXT:    v_mul_f32_e32 v0, 0x3f317218, v0
3245; VI-SDAG-NEXT:    v_add_f32_e32 v0, v0, v1
3246; VI-SDAG-NEXT:    s_setpc_b64 s[30:31]
3247;
3248; VI-GISEL-LABEL: v_log_f32_approx_fn_attr:
3249; VI-GISEL:       ; %bb.0:
3250; VI-GISEL-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
3251; VI-GISEL-NEXT:    v_log_f32_e32 v2, v0
3252; VI-GISEL-NEXT:    v_mov_b32_e32 v1, 0x800000
3253; VI-GISEL-NEXT:    v_mov_b32_e32 v3, 0xc1b17218
3254; VI-GISEL-NEXT:    v_cmp_lt_f32_e32 vcc, v0, v1
3255; VI-GISEL-NEXT:    v_cndmask_b32_e32 v0, 0, v3, vcc
3256; VI-GISEL-NEXT:    v_mul_f32_e32 v1, 0x3f317218, v2
3257; VI-GISEL-NEXT:    v_add_f32_e32 v0, v1, v0
3258; VI-GISEL-NEXT:    s_setpc_b64 s[30:31]
3259;
3260; GFX900-SDAG-LABEL: v_log_f32_approx_fn_attr:
3261; GFX900-SDAG:       ; %bb.0:
3262; GFX900-SDAG-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
3263; GFX900-SDAG-NEXT:    s_mov_b32 s4, 0x800000
3264; GFX900-SDAG-NEXT:    v_cmp_gt_f32_e32 vcc, s4, v0
3265; GFX900-SDAG-NEXT:    v_cndmask_b32_e64 v2, 0, 1, vcc
3266; GFX900-SDAG-NEXT:    v_lshlrev_b32_e32 v2, 5, v2
3267; GFX900-SDAG-NEXT:    v_ldexp_f32 v0, v0, v2
3268; GFX900-SDAG-NEXT:    v_log_f32_e32 v0, v0
3269; GFX900-SDAG-NEXT:    v_mov_b32_e32 v1, 0xc1b17218
3270; GFX900-SDAG-NEXT:    v_cndmask_b32_e32 v1, 0, v1, vcc
3271; GFX900-SDAG-NEXT:    s_mov_b32 s4, 0x3f317218
3272; GFX900-SDAG-NEXT:    v_fma_f32 v0, v0, s4, v1
3273; GFX900-SDAG-NEXT:    s_setpc_b64 s[30:31]
3274;
3275; GFX900-GISEL-LABEL: v_log_f32_approx_fn_attr:
3276; GFX900-GISEL:       ; %bb.0:
3277; GFX900-GISEL-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
3278; GFX900-GISEL-NEXT:    v_log_f32_e32 v2, v0
3279; GFX900-GISEL-NEXT:    v_mov_b32_e32 v1, 0x800000
3280; GFX900-GISEL-NEXT:    v_mov_b32_e32 v3, 0xc1b17218
3281; GFX900-GISEL-NEXT:    v_cmp_lt_f32_e32 vcc, v0, v1
3282; GFX900-GISEL-NEXT:    v_cndmask_b32_e32 v0, 0, v3, vcc
3283; GFX900-GISEL-NEXT:    v_mov_b32_e32 v1, 0x3f317218
3284; GFX900-GISEL-NEXT:    v_fma_f32 v0, v2, v1, v0
3285; GFX900-GISEL-NEXT:    s_setpc_b64 s[30:31]
3286;
3287; GFX1100-SDAG-LABEL: v_log_f32_approx_fn_attr:
3288; GFX1100-SDAG:       ; %bb.0:
3289; GFX1100-SDAG-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
3290; GFX1100-SDAG-NEXT:    v_cmp_gt_f32_e32 vcc_lo, 0x800000, v0
3291; GFX1100-SDAG-NEXT:    v_cndmask_b32_e64 v2, 0, 1, vcc_lo
3292; GFX1100-SDAG-NEXT:    v_cndmask_b32_e64 v1, 0, 0xc1b17218, vcc_lo
3293; GFX1100-SDAG-NEXT:    s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
3294; GFX1100-SDAG-NEXT:    v_lshlrev_b32_e32 v2, 5, v2
3295; GFX1100-SDAG-NEXT:    v_ldexp_f32 v0, v0, v2
3296; GFX1100-SDAG-NEXT:    s_delay_alu instid0(VALU_DEP_1)
3297; GFX1100-SDAG-NEXT:    v_log_f32_e32 v0, v0
3298; GFX1100-SDAG-NEXT:    s_waitcnt_depctr 0xfff
3299; GFX1100-SDAG-NEXT:    v_fmamk_f32 v0, v0, 0x3f317218, v1
3300; GFX1100-SDAG-NEXT:    s_setpc_b64 s[30:31]
3301;
3302; GFX1100-GISEL-LABEL: v_log_f32_approx_fn_attr:
3303; GFX1100-GISEL:       ; %bb.0:
3304; GFX1100-GISEL-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
3305; GFX1100-GISEL-NEXT:    v_log_f32_e32 v1, v0
3306; GFX1100-GISEL-NEXT:    v_cmp_gt_f32_e32 vcc_lo, 0x800000, v0
3307; GFX1100-GISEL-NEXT:    v_cndmask_b32_e64 v0, 0, 0xc1b17218, vcc_lo
3308; GFX1100-GISEL-NEXT:    s_waitcnt_depctr 0xfff
3309; GFX1100-GISEL-NEXT:    v_fmac_f32_e32 v0, 0x3f317218, v1
3310; GFX1100-GISEL-NEXT:    s_setpc_b64 s[30:31]
3311;
3312; R600-LABEL: v_log_f32_approx_fn_attr:
3313; R600:       ; %bb.0:
3314; R600-NEXT:    CF_END
3315; R600-NEXT:    PAD
3316;
3317; CM-LABEL: v_log_f32_approx_fn_attr:
3318; CM:       ; %bb.0:
3319; CM-NEXT:    CF_END
3320; CM-NEXT:    PAD
3321  %result = call float @llvm.log.f32(float %in)
3322  ret float %result
3323}
3324
3325define float @v_log_f32_ninf(float %in) {
3326; SI-SDAG-LABEL: v_log_f32_ninf:
3327; SI-SDAG:       ; %bb.0:
3328; SI-SDAG-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
3329; SI-SDAG-NEXT:    s_mov_b32 s4, 0x800000
3330; SI-SDAG-NEXT:    v_cmp_gt_f32_e32 vcc, s4, v0
3331; SI-SDAG-NEXT:    v_cndmask_b32_e64 v1, 0, 1, vcc
3332; SI-SDAG-NEXT:    v_lshlrev_b32_e32 v1, 5, v1
3333; SI-SDAG-NEXT:    v_ldexp_f32_e32 v0, v0, v1
3334; SI-SDAG-NEXT:    v_log_f32_e32 v0, v0
3335; SI-SDAG-NEXT:    s_mov_b32 s4, 0x3f317217
3336; SI-SDAG-NEXT:    v_mul_f32_e32 v1, 0x3f317217, v0
3337; SI-SDAG-NEXT:    v_fma_f32 v2, v0, s4, -v1
3338; SI-SDAG-NEXT:    s_mov_b32 s4, 0x3377d1cf
3339; SI-SDAG-NEXT:    v_fma_f32 v2, v0, s4, v2
3340; SI-SDAG-NEXT:    s_mov_b32 s4, 0x7f800000
3341; SI-SDAG-NEXT:    v_add_f32_e32 v1, v1, v2
3342; SI-SDAG-NEXT:    v_cmp_lt_f32_e64 s[4:5], |v0|, s4
3343; SI-SDAG-NEXT:    v_cndmask_b32_e64 v0, v0, v1, s[4:5]
3344; SI-SDAG-NEXT:    v_mov_b32_e32 v1, 0x41b17218
3345; SI-SDAG-NEXT:    v_cndmask_b32_e32 v1, 0, v1, vcc
3346; SI-SDAG-NEXT:    v_sub_f32_e32 v0, v0, v1
3347; SI-SDAG-NEXT:    s_setpc_b64 s[30:31]
3348;
3349; SI-GISEL-LABEL: v_log_f32_ninf:
3350; SI-GISEL:       ; %bb.0:
3351; SI-GISEL-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
3352; SI-GISEL-NEXT:    v_mov_b32_e32 v1, 0x800000
3353; SI-GISEL-NEXT:    v_cmp_lt_f32_e32 vcc, v0, v1
3354; SI-GISEL-NEXT:    v_cndmask_b32_e64 v1, 0, 1, vcc
3355; SI-GISEL-NEXT:    v_lshlrev_b32_e32 v1, 5, v1
3356; SI-GISEL-NEXT:    v_ldexp_f32_e32 v0, v0, v1
3357; SI-GISEL-NEXT:    v_log_f32_e32 v0, v0
3358; SI-GISEL-NEXT:    v_mov_b32_e32 v1, 0x3f317217
3359; SI-GISEL-NEXT:    v_mov_b32_e32 v3, 0x3377d1cf
3360; SI-GISEL-NEXT:    v_mul_f32_e32 v2, 0x3f317217, v0
3361; SI-GISEL-NEXT:    v_fma_f32 v1, v0, v1, -v2
3362; SI-GISEL-NEXT:    v_fma_f32 v1, v0, v3, v1
3363; SI-GISEL-NEXT:    v_add_f32_e32 v1, v2, v1
3364; SI-GISEL-NEXT:    v_mov_b32_e32 v2, 0x7f800000
3365; SI-GISEL-NEXT:    v_cmp_lt_f32_e64 s[4:5], |v0|, v2
3366; SI-GISEL-NEXT:    v_cndmask_b32_e64 v0, v0, v1, s[4:5]
3367; SI-GISEL-NEXT:    v_mov_b32_e32 v1, 0x41b17218
3368; SI-GISEL-NEXT:    v_cndmask_b32_e32 v1, 0, v1, vcc
3369; SI-GISEL-NEXT:    v_sub_f32_e32 v0, v0, v1
3370; SI-GISEL-NEXT:    s_setpc_b64 s[30:31]
3371;
3372; VI-SDAG-LABEL: v_log_f32_ninf:
3373; VI-SDAG:       ; %bb.0:
3374; VI-SDAG-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
3375; VI-SDAG-NEXT:    s_mov_b32 s4, 0x800000
3376; VI-SDAG-NEXT:    v_cmp_gt_f32_e32 vcc, s4, v0
3377; VI-SDAG-NEXT:    v_cndmask_b32_e64 v1, 0, 1, vcc
3378; VI-SDAG-NEXT:    v_lshlrev_b32_e32 v1, 5, v1
3379; VI-SDAG-NEXT:    v_ldexp_f32 v0, v0, v1
3380; VI-SDAG-NEXT:    v_log_f32_e32 v0, v0
3381; VI-SDAG-NEXT:    s_mov_b32 s4, 0x7f800000
3382; VI-SDAG-NEXT:    v_and_b32_e32 v1, 0xfffff000, v0
3383; VI-SDAG-NEXT:    v_sub_f32_e32 v2, v0, v1
3384; VI-SDAG-NEXT:    v_mul_f32_e32 v3, 0x3f317000, v2
3385; VI-SDAG-NEXT:    v_mul_f32_e32 v2, 0x3805fdf4, v2
3386; VI-SDAG-NEXT:    v_mul_f32_e32 v4, 0x3805fdf4, v1
3387; VI-SDAG-NEXT:    v_add_f32_e32 v2, v4, v2
3388; VI-SDAG-NEXT:    v_add_f32_e32 v2, v3, v2
3389; VI-SDAG-NEXT:    v_mul_f32_e32 v1, 0x3f317000, v1
3390; VI-SDAG-NEXT:    v_add_f32_e32 v1, v1, v2
3391; VI-SDAG-NEXT:    v_cmp_lt_f32_e64 s[4:5], |v0|, s4
3392; VI-SDAG-NEXT:    v_cndmask_b32_e64 v0, v0, v1, s[4:5]
3393; VI-SDAG-NEXT:    v_mov_b32_e32 v1, 0x41b17218
3394; VI-SDAG-NEXT:    v_cndmask_b32_e32 v1, 0, v1, vcc
3395; VI-SDAG-NEXT:    v_sub_f32_e32 v0, v0, v1
3396; VI-SDAG-NEXT:    s_setpc_b64 s[30:31]
3397;
3398; VI-GISEL-LABEL: v_log_f32_ninf:
3399; VI-GISEL:       ; %bb.0:
3400; VI-GISEL-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
3401; VI-GISEL-NEXT:    v_mov_b32_e32 v1, 0x800000
3402; VI-GISEL-NEXT:    v_cmp_lt_f32_e32 vcc, v0, v1
3403; VI-GISEL-NEXT:    v_cndmask_b32_e64 v1, 0, 1, vcc
3404; VI-GISEL-NEXT:    v_lshlrev_b32_e32 v1, 5, v1
3405; VI-GISEL-NEXT:    v_ldexp_f32 v0, v0, v1
3406; VI-GISEL-NEXT:    v_log_f32_e32 v0, v0
3407; VI-GISEL-NEXT:    v_and_b32_e32 v1, 0xfffff000, v0
3408; VI-GISEL-NEXT:    v_sub_f32_e32 v2, v0, v1
3409; VI-GISEL-NEXT:    v_mul_f32_e32 v3, 0x3805fdf4, v1
3410; VI-GISEL-NEXT:    v_mul_f32_e32 v4, 0x3805fdf4, v2
3411; VI-GISEL-NEXT:    v_add_f32_e32 v3, v3, v4
3412; VI-GISEL-NEXT:    v_mul_f32_e32 v2, 0x3f317000, v2
3413; VI-GISEL-NEXT:    v_add_f32_e32 v2, v2, v3
3414; VI-GISEL-NEXT:    v_mul_f32_e32 v1, 0x3f317000, v1
3415; VI-GISEL-NEXT:    v_add_f32_e32 v1, v1, v2
3416; VI-GISEL-NEXT:    v_mov_b32_e32 v2, 0x7f800000
3417; VI-GISEL-NEXT:    v_cmp_lt_f32_e64 s[4:5], |v0|, v2
3418; VI-GISEL-NEXT:    v_cndmask_b32_e64 v0, v0, v1, s[4:5]
3419; VI-GISEL-NEXT:    v_mov_b32_e32 v1, 0x41b17218
3420; VI-GISEL-NEXT:    v_cndmask_b32_e32 v1, 0, v1, vcc
3421; VI-GISEL-NEXT:    v_sub_f32_e32 v0, v0, v1
3422; VI-GISEL-NEXT:    s_setpc_b64 s[30:31]
3423;
3424; GFX900-SDAG-LABEL: v_log_f32_ninf:
3425; GFX900-SDAG:       ; %bb.0:
3426; GFX900-SDAG-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
3427; GFX900-SDAG-NEXT:    s_mov_b32 s4, 0x800000
3428; GFX900-SDAG-NEXT:    v_cmp_gt_f32_e32 vcc, s4, v0
3429; GFX900-SDAG-NEXT:    v_cndmask_b32_e64 v1, 0, 1, vcc
3430; GFX900-SDAG-NEXT:    v_lshlrev_b32_e32 v1, 5, v1
3431; GFX900-SDAG-NEXT:    v_ldexp_f32 v0, v0, v1
3432; GFX900-SDAG-NEXT:    v_log_f32_e32 v0, v0
3433; GFX900-SDAG-NEXT:    s_mov_b32 s4, 0x3f317217
3434; GFX900-SDAG-NEXT:    v_mul_f32_e32 v1, 0x3f317217, v0
3435; GFX900-SDAG-NEXT:    v_fma_f32 v2, v0, s4, -v1
3436; GFX900-SDAG-NEXT:    s_mov_b32 s4, 0x3377d1cf
3437; GFX900-SDAG-NEXT:    v_fma_f32 v2, v0, s4, v2
3438; GFX900-SDAG-NEXT:    s_mov_b32 s4, 0x7f800000
3439; GFX900-SDAG-NEXT:    v_add_f32_e32 v1, v1, v2
3440; GFX900-SDAG-NEXT:    v_cmp_lt_f32_e64 s[4:5], |v0|, s4
3441; GFX900-SDAG-NEXT:    v_cndmask_b32_e64 v0, v0, v1, s[4:5]
3442; GFX900-SDAG-NEXT:    v_mov_b32_e32 v1, 0x41b17218
3443; GFX900-SDAG-NEXT:    v_cndmask_b32_e32 v1, 0, v1, vcc
3444; GFX900-SDAG-NEXT:    v_sub_f32_e32 v0, v0, v1
3445; GFX900-SDAG-NEXT:    s_setpc_b64 s[30:31]
3446;
3447; GFX900-GISEL-LABEL: v_log_f32_ninf:
3448; GFX900-GISEL:       ; %bb.0:
3449; GFX900-GISEL-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
3450; GFX900-GISEL-NEXT:    v_mov_b32_e32 v1, 0x800000
3451; GFX900-GISEL-NEXT:    v_cmp_lt_f32_e32 vcc, v0, v1
3452; GFX900-GISEL-NEXT:    v_cndmask_b32_e64 v1, 0, 1, vcc
3453; GFX900-GISEL-NEXT:    v_lshlrev_b32_e32 v1, 5, v1
3454; GFX900-GISEL-NEXT:    v_ldexp_f32 v0, v0, v1
3455; GFX900-GISEL-NEXT:    v_log_f32_e32 v0, v0
3456; GFX900-GISEL-NEXT:    v_mov_b32_e32 v1, 0x3f317217
3457; GFX900-GISEL-NEXT:    v_mov_b32_e32 v3, 0x3377d1cf
3458; GFX900-GISEL-NEXT:    v_mul_f32_e32 v2, 0x3f317217, v0
3459; GFX900-GISEL-NEXT:    v_fma_f32 v1, v0, v1, -v2
3460; GFX900-GISEL-NEXT:    v_fma_f32 v1, v0, v3, v1
3461; GFX900-GISEL-NEXT:    v_add_f32_e32 v1, v2, v1
3462; GFX900-GISEL-NEXT:    v_mov_b32_e32 v2, 0x7f800000
3463; GFX900-GISEL-NEXT:    v_cmp_lt_f32_e64 s[4:5], |v0|, v2
3464; GFX900-GISEL-NEXT:    v_cndmask_b32_e64 v0, v0, v1, s[4:5]
3465; GFX900-GISEL-NEXT:    v_mov_b32_e32 v1, 0x41b17218
3466; GFX900-GISEL-NEXT:    v_cndmask_b32_e32 v1, 0, v1, vcc
3467; GFX900-GISEL-NEXT:    v_sub_f32_e32 v0, v0, v1
3468; GFX900-GISEL-NEXT:    s_setpc_b64 s[30:31]
3469;
3470; GFX1100-SDAG-LABEL: v_log_f32_ninf:
3471; GFX1100-SDAG:       ; %bb.0:
3472; GFX1100-SDAG-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
3473; GFX1100-SDAG-NEXT:    v_cmp_gt_f32_e32 vcc_lo, 0x800000, v0
3474; GFX1100-SDAG-NEXT:    v_cndmask_b32_e64 v1, 0, 1, vcc_lo
3475; GFX1100-SDAG-NEXT:    s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
3476; GFX1100-SDAG-NEXT:    v_lshlrev_b32_e32 v1, 5, v1
3477; GFX1100-SDAG-NEXT:    v_ldexp_f32 v0, v0, v1
3478; GFX1100-SDAG-NEXT:    s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_2)
3479; GFX1100-SDAG-NEXT:    v_log_f32_e32 v0, v0
3480; GFX1100-SDAG-NEXT:    s_waitcnt_depctr 0xfff
3481; GFX1100-SDAG-NEXT:    v_mul_f32_e32 v1, 0x3f317217, v0
3482; GFX1100-SDAG-NEXT:    v_cmp_gt_f32_e64 s0, 0x7f800000, |v0|
3483; GFX1100-SDAG-NEXT:    v_fma_f32 v2, 0x3f317217, v0, -v1
3484; GFX1100-SDAG-NEXT:    s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
3485; GFX1100-SDAG-NEXT:    v_fmamk_f32 v2, v0, 0x3377d1cf, v2
3486; GFX1100-SDAG-NEXT:    v_add_f32_e32 v1, v1, v2
3487; GFX1100-SDAG-NEXT:    s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
3488; GFX1100-SDAG-NEXT:    v_cndmask_b32_e64 v0, v0, v1, s0
3489; GFX1100-SDAG-NEXT:    v_cndmask_b32_e64 v1, 0, 0x41b17218, vcc_lo
3490; GFX1100-SDAG-NEXT:    v_sub_f32_e32 v0, v0, v1
3491; GFX1100-SDAG-NEXT:    s_setpc_b64 s[30:31]
3492;
3493; GFX1100-GISEL-LABEL: v_log_f32_ninf:
3494; GFX1100-GISEL:       ; %bb.0:
3495; GFX1100-GISEL-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
3496; GFX1100-GISEL-NEXT:    v_cmp_gt_f32_e32 vcc_lo, 0x800000, v0
3497; GFX1100-GISEL-NEXT:    v_cndmask_b32_e64 v1, 0, 1, vcc_lo
3498; GFX1100-GISEL-NEXT:    s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
3499; GFX1100-GISEL-NEXT:    v_lshlrev_b32_e32 v1, 5, v1
3500; GFX1100-GISEL-NEXT:    v_ldexp_f32 v0, v0, v1
3501; GFX1100-GISEL-NEXT:    s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_2)
3502; GFX1100-GISEL-NEXT:    v_log_f32_e32 v0, v0
3503; GFX1100-GISEL-NEXT:    s_waitcnt_depctr 0xfff
3504; GFX1100-GISEL-NEXT:    v_mul_f32_e32 v1, 0x3f317217, v0
3505; GFX1100-GISEL-NEXT:    v_cmp_gt_f32_e64 s0, 0x7f800000, |v0|
3506; GFX1100-GISEL-NEXT:    v_fma_f32 v2, 0x3f317217, v0, -v1
3507; GFX1100-GISEL-NEXT:    s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
3508; GFX1100-GISEL-NEXT:    v_fmac_f32_e32 v2, 0x3377d1cf, v0
3509; GFX1100-GISEL-NEXT:    v_add_f32_e32 v1, v1, v2
3510; GFX1100-GISEL-NEXT:    s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
3511; GFX1100-GISEL-NEXT:    v_cndmask_b32_e64 v0, v0, v1, s0
3512; GFX1100-GISEL-NEXT:    v_cndmask_b32_e64 v1, 0, 0x41b17218, vcc_lo
3513; GFX1100-GISEL-NEXT:    v_sub_f32_e32 v0, v0, v1
3514; GFX1100-GISEL-NEXT:    s_setpc_b64 s[30:31]
3515;
3516; R600-LABEL: v_log_f32_ninf:
3517; R600:       ; %bb.0:
3518; R600-NEXT:    CF_END
3519; R600-NEXT:    PAD
3520;
3521; CM-LABEL: v_log_f32_ninf:
3522; CM:       ; %bb.0:
3523; CM-NEXT:    CF_END
3524; CM-NEXT:    PAD
3525  %result = call ninf float @llvm.log.f32(float %in)
3526  ret float %result
3527}
3528
3529define float @v_log_f32_afn(float %in) {
3530; SI-SDAG-LABEL: v_log_f32_afn:
3531; SI-SDAG:       ; %bb.0:
3532; SI-SDAG-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
3533; SI-SDAG-NEXT:    s_mov_b32 s4, 0x800000
3534; SI-SDAG-NEXT:    v_cmp_gt_f32_e32 vcc, s4, v0
3535; SI-SDAG-NEXT:    v_cndmask_b32_e64 v2, 0, 1, vcc
3536; SI-SDAG-NEXT:    v_lshlrev_b32_e32 v2, 5, v2
3537; SI-SDAG-NEXT:    v_ldexp_f32_e32 v0, v0, v2
3538; SI-SDAG-NEXT:    v_log_f32_e32 v0, v0
3539; SI-SDAG-NEXT:    v_mov_b32_e32 v1, 0xc1b17218
3540; SI-SDAG-NEXT:    v_cndmask_b32_e32 v1, 0, v1, vcc
3541; SI-SDAG-NEXT:    s_mov_b32 s4, 0x3f317218
3542; SI-SDAG-NEXT:    v_fma_f32 v0, v0, s4, v1
3543; SI-SDAG-NEXT:    s_setpc_b64 s[30:31]
3544;
3545; SI-GISEL-LABEL: v_log_f32_afn:
3546; SI-GISEL:       ; %bb.0:
3547; SI-GISEL-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
3548; SI-GISEL-NEXT:    v_log_f32_e32 v2, v0
3549; SI-GISEL-NEXT:    v_mov_b32_e32 v1, 0x800000
3550; SI-GISEL-NEXT:    v_mov_b32_e32 v3, 0xc1b17218
3551; SI-GISEL-NEXT:    v_cmp_lt_f32_e32 vcc, v0, v1
3552; SI-GISEL-NEXT:    v_cndmask_b32_e32 v0, 0, v3, vcc
3553; SI-GISEL-NEXT:    v_mov_b32_e32 v1, 0x3f317218
3554; SI-GISEL-NEXT:    v_fma_f32 v0, v2, v1, v0
3555; SI-GISEL-NEXT:    s_setpc_b64 s[30:31]
3556;
3557; VI-SDAG-LABEL: v_log_f32_afn:
3558; VI-SDAG:       ; %bb.0:
3559; VI-SDAG-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
3560; VI-SDAG-NEXT:    s_mov_b32 s4, 0x800000
3561; VI-SDAG-NEXT:    v_cmp_gt_f32_e32 vcc, s4, v0
3562; VI-SDAG-NEXT:    v_cndmask_b32_e64 v2, 0, 1, vcc
3563; VI-SDAG-NEXT:    v_lshlrev_b32_e32 v2, 5, v2
3564; VI-SDAG-NEXT:    v_ldexp_f32 v0, v0, v2
3565; VI-SDAG-NEXT:    v_log_f32_e32 v0, v0
3566; VI-SDAG-NEXT:    v_mov_b32_e32 v1, 0xc1b17218
3567; VI-SDAG-NEXT:    v_cndmask_b32_e32 v1, 0, v1, vcc
3568; VI-SDAG-NEXT:    v_mul_f32_e32 v0, 0x3f317218, v0
3569; VI-SDAG-NEXT:    v_add_f32_e32 v0, v0, v1
3570; VI-SDAG-NEXT:    s_setpc_b64 s[30:31]
3571;
3572; VI-GISEL-LABEL: v_log_f32_afn:
3573; VI-GISEL:       ; %bb.0:
3574; VI-GISEL-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
3575; VI-GISEL-NEXT:    v_log_f32_e32 v2, v0
3576; VI-GISEL-NEXT:    v_mov_b32_e32 v1, 0x800000
3577; VI-GISEL-NEXT:    v_mov_b32_e32 v3, 0xc1b17218
3578; VI-GISEL-NEXT:    v_cmp_lt_f32_e32 vcc, v0, v1
3579; VI-GISEL-NEXT:    v_cndmask_b32_e32 v0, 0, v3, vcc
3580; VI-GISEL-NEXT:    v_mul_f32_e32 v1, 0x3f317218, v2
3581; VI-GISEL-NEXT:    v_add_f32_e32 v0, v1, v0
3582; VI-GISEL-NEXT:    s_setpc_b64 s[30:31]
3583;
3584; GFX900-SDAG-LABEL: v_log_f32_afn:
3585; GFX900-SDAG:       ; %bb.0:
3586; GFX900-SDAG-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
3587; GFX900-SDAG-NEXT:    s_mov_b32 s4, 0x800000
3588; GFX900-SDAG-NEXT:    v_cmp_gt_f32_e32 vcc, s4, v0
3589; GFX900-SDAG-NEXT:    v_cndmask_b32_e64 v2, 0, 1, vcc
3590; GFX900-SDAG-NEXT:    v_lshlrev_b32_e32 v2, 5, v2
3591; GFX900-SDAG-NEXT:    v_ldexp_f32 v0, v0, v2
3592; GFX900-SDAG-NEXT:    v_log_f32_e32 v0, v0
3593; GFX900-SDAG-NEXT:    v_mov_b32_e32 v1, 0xc1b17218
3594; GFX900-SDAG-NEXT:    v_cndmask_b32_e32 v1, 0, v1, vcc
3595; GFX900-SDAG-NEXT:    s_mov_b32 s4, 0x3f317218
3596; GFX900-SDAG-NEXT:    v_fma_f32 v0, v0, s4, v1
3597; GFX900-SDAG-NEXT:    s_setpc_b64 s[30:31]
3598;
3599; GFX900-GISEL-LABEL: v_log_f32_afn:
3600; GFX900-GISEL:       ; %bb.0:
3601; GFX900-GISEL-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
3602; GFX900-GISEL-NEXT:    v_log_f32_e32 v2, v0
3603; GFX900-GISEL-NEXT:    v_mov_b32_e32 v1, 0x800000
3604; GFX900-GISEL-NEXT:    v_mov_b32_e32 v3, 0xc1b17218
3605; GFX900-GISEL-NEXT:    v_cmp_lt_f32_e32 vcc, v0, v1
3606; GFX900-GISEL-NEXT:    v_cndmask_b32_e32 v0, 0, v3, vcc
3607; GFX900-GISEL-NEXT:    v_mov_b32_e32 v1, 0x3f317218
3608; GFX900-GISEL-NEXT:    v_fma_f32 v0, v2, v1, v0
3609; GFX900-GISEL-NEXT:    s_setpc_b64 s[30:31]
3610;
3611; GFX1100-SDAG-LABEL: v_log_f32_afn:
3612; GFX1100-SDAG:       ; %bb.0:
3613; GFX1100-SDAG-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
3614; GFX1100-SDAG-NEXT:    v_cmp_gt_f32_e32 vcc_lo, 0x800000, v0
3615; GFX1100-SDAG-NEXT:    v_cndmask_b32_e64 v2, 0, 1, vcc_lo
3616; GFX1100-SDAG-NEXT:    v_cndmask_b32_e64 v1, 0, 0xc1b17218, vcc_lo
3617; GFX1100-SDAG-NEXT:    s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
3618; GFX1100-SDAG-NEXT:    v_lshlrev_b32_e32 v2, 5, v2
3619; GFX1100-SDAG-NEXT:    v_ldexp_f32 v0, v0, v2
3620; GFX1100-SDAG-NEXT:    s_delay_alu instid0(VALU_DEP_1)
3621; GFX1100-SDAG-NEXT:    v_log_f32_e32 v0, v0
3622; GFX1100-SDAG-NEXT:    s_waitcnt_depctr 0xfff
3623; GFX1100-SDAG-NEXT:    v_fmamk_f32 v0, v0, 0x3f317218, v1
3624; GFX1100-SDAG-NEXT:    s_setpc_b64 s[30:31]
3625;
3626; GFX1100-GISEL-LABEL: v_log_f32_afn:
3627; GFX1100-GISEL:       ; %bb.0:
3628; GFX1100-GISEL-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
3629; GFX1100-GISEL-NEXT:    v_log_f32_e32 v1, v0
3630; GFX1100-GISEL-NEXT:    v_cmp_gt_f32_e32 vcc_lo, 0x800000, v0
3631; GFX1100-GISEL-NEXT:    v_cndmask_b32_e64 v0, 0, 0xc1b17218, vcc_lo
3632; GFX1100-GISEL-NEXT:    s_waitcnt_depctr 0xfff
3633; GFX1100-GISEL-NEXT:    v_fmac_f32_e32 v0, 0x3f317218, v1
3634; GFX1100-GISEL-NEXT:    s_setpc_b64 s[30:31]
3635;
3636; R600-LABEL: v_log_f32_afn:
3637; R600:       ; %bb.0:
3638; R600-NEXT:    CF_END
3639; R600-NEXT:    PAD
3640;
3641; CM-LABEL: v_log_f32_afn:
3642; CM:       ; %bb.0:
3643; CM-NEXT:    CF_END
3644; CM-NEXT:    PAD
3645  %result = call afn float @llvm.log.f32(float %in)
3646  ret float %result
3647}
3648
3649define float @v_log_f32_afn_daz(float %in) #0 {
3650; GFX689-LABEL: v_log_f32_afn_daz:
3651; GFX689:       ; %bb.0:
3652; GFX689-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
3653; GFX689-NEXT:    v_log_f32_e32 v0, v0
3654; GFX689-NEXT:    v_mul_f32_e32 v0, 0x3f317218, v0
3655; GFX689-NEXT:    s_setpc_b64 s[30:31]
3656;
3657; GFX1100-LABEL: v_log_f32_afn_daz:
3658; GFX1100:       ; %bb.0:
3659; GFX1100-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
3660; GFX1100-NEXT:    v_log_f32_e32 v0, v0
3661; GFX1100-NEXT:    s_waitcnt_depctr 0xfff
3662; GFX1100-NEXT:    v_mul_f32_e32 v0, 0x3f317218, v0
3663; GFX1100-NEXT:    s_setpc_b64 s[30:31]
3664;
3665; R600-LABEL: v_log_f32_afn_daz:
3666; R600:       ; %bb.0:
3667; R600-NEXT:    CF_END
3668; R600-NEXT:    PAD
3669;
3670; CM-LABEL: v_log_f32_afn_daz:
3671; CM:       ; %bb.0:
3672; CM-NEXT:    CF_END
3673; CM-NEXT:    PAD
3674  %result = call afn float @llvm.log.f32(float %in)
3675  ret float %result
3676}
3677
3678define float @v_log_f32_afn_dynamic(float %in) #1 {
3679; SI-SDAG-LABEL: v_log_f32_afn_dynamic:
3680; SI-SDAG:       ; %bb.0:
3681; SI-SDAG-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
3682; SI-SDAG-NEXT:    s_mov_b32 s4, 0x800000
3683; SI-SDAG-NEXT:    v_cmp_gt_f32_e32 vcc, s4, v0
3684; SI-SDAG-NEXT:    v_cndmask_b32_e64 v2, 0, 1, vcc
3685; SI-SDAG-NEXT:    v_lshlrev_b32_e32 v2, 5, v2
3686; SI-SDAG-NEXT:    v_ldexp_f32_e32 v0, v0, v2
3687; SI-SDAG-NEXT:    v_log_f32_e32 v0, v0
3688; SI-SDAG-NEXT:    v_mov_b32_e32 v1, 0xc1b17218
3689; SI-SDAG-NEXT:    v_cndmask_b32_e32 v1, 0, v1, vcc
3690; SI-SDAG-NEXT:    s_mov_b32 s4, 0x3f317218
3691; SI-SDAG-NEXT:    v_fma_f32 v0, v0, s4, v1
3692; SI-SDAG-NEXT:    s_setpc_b64 s[30:31]
3693;
3694; SI-GISEL-LABEL: v_log_f32_afn_dynamic:
3695; SI-GISEL:       ; %bb.0:
3696; SI-GISEL-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
3697; SI-GISEL-NEXT:    v_log_f32_e32 v2, v0
3698; SI-GISEL-NEXT:    v_mov_b32_e32 v1, 0x800000
3699; SI-GISEL-NEXT:    v_mov_b32_e32 v3, 0xc1b17218
3700; SI-GISEL-NEXT:    v_cmp_lt_f32_e32 vcc, v0, v1
3701; SI-GISEL-NEXT:    v_cndmask_b32_e32 v0, 0, v3, vcc
3702; SI-GISEL-NEXT:    v_mov_b32_e32 v1, 0x3f317218
3703; SI-GISEL-NEXT:    v_fma_f32 v0, v2, v1, v0
3704; SI-GISEL-NEXT:    s_setpc_b64 s[30:31]
3705;
3706; VI-SDAG-LABEL: v_log_f32_afn_dynamic:
3707; VI-SDAG:       ; %bb.0:
3708; VI-SDAG-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
3709; VI-SDAG-NEXT:    s_mov_b32 s4, 0x800000
3710; VI-SDAG-NEXT:    v_cmp_gt_f32_e32 vcc, s4, v0
3711; VI-SDAG-NEXT:    v_cndmask_b32_e64 v2, 0, 1, vcc
3712; VI-SDAG-NEXT:    v_lshlrev_b32_e32 v2, 5, v2
3713; VI-SDAG-NEXT:    v_ldexp_f32 v0, v0, v2
3714; VI-SDAG-NEXT:    v_log_f32_e32 v0, v0
3715; VI-SDAG-NEXT:    v_mov_b32_e32 v1, 0xc1b17218
3716; VI-SDAG-NEXT:    v_cndmask_b32_e32 v1, 0, v1, vcc
3717; VI-SDAG-NEXT:    v_mul_f32_e32 v0, 0x3f317218, v0
3718; VI-SDAG-NEXT:    v_add_f32_e32 v0, v0, v1
3719; VI-SDAG-NEXT:    s_setpc_b64 s[30:31]
3720;
3721; VI-GISEL-LABEL: v_log_f32_afn_dynamic:
3722; VI-GISEL:       ; %bb.0:
3723; VI-GISEL-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
3724; VI-GISEL-NEXT:    v_log_f32_e32 v2, v0
3725; VI-GISEL-NEXT:    v_mov_b32_e32 v1, 0x800000
3726; VI-GISEL-NEXT:    v_mov_b32_e32 v3, 0xc1b17218
3727; VI-GISEL-NEXT:    v_cmp_lt_f32_e32 vcc, v0, v1
3728; VI-GISEL-NEXT:    v_cndmask_b32_e32 v0, 0, v3, vcc
3729; VI-GISEL-NEXT:    v_mul_f32_e32 v1, 0x3f317218, v2
3730; VI-GISEL-NEXT:    v_add_f32_e32 v0, v1, v0
3731; VI-GISEL-NEXT:    s_setpc_b64 s[30:31]
3732;
3733; GFX900-SDAG-LABEL: v_log_f32_afn_dynamic:
3734; GFX900-SDAG:       ; %bb.0:
3735; GFX900-SDAG-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
3736; GFX900-SDAG-NEXT:    s_mov_b32 s4, 0x800000
3737; GFX900-SDAG-NEXT:    v_cmp_gt_f32_e32 vcc, s4, v0
3738; GFX900-SDAG-NEXT:    v_cndmask_b32_e64 v2, 0, 1, vcc
3739; GFX900-SDAG-NEXT:    v_lshlrev_b32_e32 v2, 5, v2
3740; GFX900-SDAG-NEXT:    v_ldexp_f32 v0, v0, v2
3741; GFX900-SDAG-NEXT:    v_log_f32_e32 v0, v0
3742; GFX900-SDAG-NEXT:    v_mov_b32_e32 v1, 0xc1b17218
3743; GFX900-SDAG-NEXT:    v_cndmask_b32_e32 v1, 0, v1, vcc
3744; GFX900-SDAG-NEXT:    s_mov_b32 s4, 0x3f317218
3745; GFX900-SDAG-NEXT:    v_fma_f32 v0, v0, s4, v1
3746; GFX900-SDAG-NEXT:    s_setpc_b64 s[30:31]
3747;
3748; GFX900-GISEL-LABEL: v_log_f32_afn_dynamic:
3749; GFX900-GISEL:       ; %bb.0:
3750; GFX900-GISEL-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
3751; GFX900-GISEL-NEXT:    v_log_f32_e32 v2, v0
3752; GFX900-GISEL-NEXT:    v_mov_b32_e32 v1, 0x800000
3753; GFX900-GISEL-NEXT:    v_mov_b32_e32 v3, 0xc1b17218
3754; GFX900-GISEL-NEXT:    v_cmp_lt_f32_e32 vcc, v0, v1
3755; GFX900-GISEL-NEXT:    v_cndmask_b32_e32 v0, 0, v3, vcc
3756; GFX900-GISEL-NEXT:    v_mov_b32_e32 v1, 0x3f317218
3757; GFX900-GISEL-NEXT:    v_fma_f32 v0, v2, v1, v0
3758; GFX900-GISEL-NEXT:    s_setpc_b64 s[30:31]
3759;
3760; GFX1100-SDAG-LABEL: v_log_f32_afn_dynamic:
3761; GFX1100-SDAG:       ; %bb.0:
3762; GFX1100-SDAG-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
3763; GFX1100-SDAG-NEXT:    v_cmp_gt_f32_e32 vcc_lo, 0x800000, v0
3764; GFX1100-SDAG-NEXT:    v_cndmask_b32_e64 v2, 0, 1, vcc_lo
3765; GFX1100-SDAG-NEXT:    v_cndmask_b32_e64 v1, 0, 0xc1b17218, vcc_lo
3766; GFX1100-SDAG-NEXT:    s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
3767; GFX1100-SDAG-NEXT:    v_lshlrev_b32_e32 v2, 5, v2
3768; GFX1100-SDAG-NEXT:    v_ldexp_f32 v0, v0, v2
3769; GFX1100-SDAG-NEXT:    s_delay_alu instid0(VALU_DEP_1)
3770; GFX1100-SDAG-NEXT:    v_log_f32_e32 v0, v0
3771; GFX1100-SDAG-NEXT:    s_waitcnt_depctr 0xfff
3772; GFX1100-SDAG-NEXT:    v_fmamk_f32 v0, v0, 0x3f317218, v1
3773; GFX1100-SDAG-NEXT:    s_setpc_b64 s[30:31]
3774;
3775; GFX1100-GISEL-LABEL: v_log_f32_afn_dynamic:
3776; GFX1100-GISEL:       ; %bb.0:
3777; GFX1100-GISEL-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
3778; GFX1100-GISEL-NEXT:    v_log_f32_e32 v1, v0
3779; GFX1100-GISEL-NEXT:    v_cmp_gt_f32_e32 vcc_lo, 0x800000, v0
3780; GFX1100-GISEL-NEXT:    v_cndmask_b32_e64 v0, 0, 0xc1b17218, vcc_lo
3781; GFX1100-GISEL-NEXT:    s_waitcnt_depctr 0xfff
3782; GFX1100-GISEL-NEXT:    v_fmac_f32_e32 v0, 0x3f317218, v1
3783; GFX1100-GISEL-NEXT:    s_setpc_b64 s[30:31]
3784;
3785; R600-LABEL: v_log_f32_afn_dynamic:
3786; R600:       ; %bb.0:
3787; R600-NEXT:    CF_END
3788; R600-NEXT:    PAD
3789;
3790; CM-LABEL: v_log_f32_afn_dynamic:
3791; CM:       ; %bb.0:
3792; CM-NEXT:    CF_END
3793; CM-NEXT:    PAD
3794  %result = call afn float @llvm.log.f32(float %in)
3795  ret float %result
3796}
3797
3798define float @v_fabs_log_f32_afn(float %in) {
3799; SI-SDAG-LABEL: v_fabs_log_f32_afn:
3800; SI-SDAG:       ; %bb.0:
3801; SI-SDAG-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
3802; SI-SDAG-NEXT:    s_mov_b32 s4, 0x800000
3803; SI-SDAG-NEXT:    v_cmp_lt_f32_e64 vcc, |v0|, s4
3804; SI-SDAG-NEXT:    v_cndmask_b32_e64 v2, 0, 1, vcc
3805; SI-SDAG-NEXT:    v_lshlrev_b32_e32 v2, 5, v2
3806; SI-SDAG-NEXT:    v_ldexp_f32_e64 v0, |v0|, v2
3807; SI-SDAG-NEXT:    v_log_f32_e32 v0, v0
3808; SI-SDAG-NEXT:    v_mov_b32_e32 v1, 0xc1b17218
3809; SI-SDAG-NEXT:    v_cndmask_b32_e32 v1, 0, v1, vcc
3810; SI-SDAG-NEXT:    s_mov_b32 s4, 0x3f317218
3811; SI-SDAG-NEXT:    v_fma_f32 v0, v0, s4, v1
3812; SI-SDAG-NEXT:    s_setpc_b64 s[30:31]
3813;
3814; SI-GISEL-LABEL: v_fabs_log_f32_afn:
3815; SI-GISEL:       ; %bb.0:
3816; SI-GISEL-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
3817; SI-GISEL-NEXT:    v_log_f32_e64 v2, |v0|
3818; SI-GISEL-NEXT:    v_mov_b32_e32 v1, 0x800000
3819; SI-GISEL-NEXT:    v_mov_b32_e32 v3, 0xc1b17218
3820; SI-GISEL-NEXT:    v_cmp_lt_f32_e64 vcc, |v0|, v1
3821; SI-GISEL-NEXT:    v_cndmask_b32_e32 v0, 0, v3, vcc
3822; SI-GISEL-NEXT:    v_mov_b32_e32 v1, 0x3f317218
3823; SI-GISEL-NEXT:    v_fma_f32 v0, v2, v1, v0
3824; SI-GISEL-NEXT:    s_setpc_b64 s[30:31]
3825;
3826; VI-SDAG-LABEL: v_fabs_log_f32_afn:
3827; VI-SDAG:       ; %bb.0:
3828; VI-SDAG-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
3829; VI-SDAG-NEXT:    s_mov_b32 s4, 0x800000
3830; VI-SDAG-NEXT:    v_cmp_lt_f32_e64 vcc, |v0|, s4
3831; VI-SDAG-NEXT:    v_cndmask_b32_e64 v2, 0, 1, vcc
3832; VI-SDAG-NEXT:    v_lshlrev_b32_e32 v2, 5, v2
3833; VI-SDAG-NEXT:    v_ldexp_f32 v0, |v0|, v2
3834; VI-SDAG-NEXT:    v_log_f32_e32 v0, v0
3835; VI-SDAG-NEXT:    v_mov_b32_e32 v1, 0xc1b17218
3836; VI-SDAG-NEXT:    v_cndmask_b32_e32 v1, 0, v1, vcc
3837; VI-SDAG-NEXT:    v_mul_f32_e32 v0, 0x3f317218, v0
3838; VI-SDAG-NEXT:    v_add_f32_e32 v0, v0, v1
3839; VI-SDAG-NEXT:    s_setpc_b64 s[30:31]
3840;
3841; VI-GISEL-LABEL: v_fabs_log_f32_afn:
3842; VI-GISEL:       ; %bb.0:
3843; VI-GISEL-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
3844; VI-GISEL-NEXT:    v_log_f32_e64 v2, |v0|
3845; VI-GISEL-NEXT:    v_mov_b32_e32 v1, 0x800000
3846; VI-GISEL-NEXT:    v_mov_b32_e32 v3, 0xc1b17218
3847; VI-GISEL-NEXT:    v_cmp_lt_f32_e64 vcc, |v0|, v1
3848; VI-GISEL-NEXT:    v_cndmask_b32_e32 v0, 0, v3, vcc
3849; VI-GISEL-NEXT:    v_mul_f32_e32 v1, 0x3f317218, v2
3850; VI-GISEL-NEXT:    v_add_f32_e32 v0, v1, v0
3851; VI-GISEL-NEXT:    s_setpc_b64 s[30:31]
3852;
3853; GFX900-SDAG-LABEL: v_fabs_log_f32_afn:
3854; GFX900-SDAG:       ; %bb.0:
3855; GFX900-SDAG-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
3856; GFX900-SDAG-NEXT:    s_mov_b32 s4, 0x800000
3857; GFX900-SDAG-NEXT:    v_cmp_lt_f32_e64 vcc, |v0|, s4
3858; GFX900-SDAG-NEXT:    v_cndmask_b32_e64 v2, 0, 1, vcc
3859; GFX900-SDAG-NEXT:    v_lshlrev_b32_e32 v2, 5, v2
3860; GFX900-SDAG-NEXT:    v_ldexp_f32 v0, |v0|, v2
3861; GFX900-SDAG-NEXT:    v_log_f32_e32 v0, v0
3862; GFX900-SDAG-NEXT:    v_mov_b32_e32 v1, 0xc1b17218
3863; GFX900-SDAG-NEXT:    v_cndmask_b32_e32 v1, 0, v1, vcc
3864; GFX900-SDAG-NEXT:    s_mov_b32 s4, 0x3f317218
3865; GFX900-SDAG-NEXT:    v_fma_f32 v0, v0, s4, v1
3866; GFX900-SDAG-NEXT:    s_setpc_b64 s[30:31]
3867;
3868; GFX900-GISEL-LABEL: v_fabs_log_f32_afn:
3869; GFX900-GISEL:       ; %bb.0:
3870; GFX900-GISEL-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
3871; GFX900-GISEL-NEXT:    v_log_f32_e64 v2, |v0|
3872; GFX900-GISEL-NEXT:    v_mov_b32_e32 v1, 0x800000
3873; GFX900-GISEL-NEXT:    v_mov_b32_e32 v3, 0xc1b17218
3874; GFX900-GISEL-NEXT:    v_cmp_lt_f32_e64 vcc, |v0|, v1
3875; GFX900-GISEL-NEXT:    v_cndmask_b32_e32 v0, 0, v3, vcc
3876; GFX900-GISEL-NEXT:    v_mov_b32_e32 v1, 0x3f317218
3877; GFX900-GISEL-NEXT:    v_fma_f32 v0, v2, v1, v0
3878; GFX900-GISEL-NEXT:    s_setpc_b64 s[30:31]
3879;
3880; GFX1100-SDAG-LABEL: v_fabs_log_f32_afn:
3881; GFX1100-SDAG:       ; %bb.0:
3882; GFX1100-SDAG-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
3883; GFX1100-SDAG-NEXT:    v_cmp_gt_f32_e64 s0, 0x800000, |v0|
3884; GFX1100-SDAG-NEXT:    s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
3885; GFX1100-SDAG-NEXT:    v_cndmask_b32_e64 v2, 0, 1, s0
3886; GFX1100-SDAG-NEXT:    v_cndmask_b32_e64 v1, 0, 0xc1b17218, s0
3887; GFX1100-SDAG-NEXT:    v_lshlrev_b32_e32 v2, 5, v2
3888; GFX1100-SDAG-NEXT:    s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
3889; GFX1100-SDAG-NEXT:    v_ldexp_f32 v0, |v0|, v2
3890; GFX1100-SDAG-NEXT:    v_log_f32_e32 v0, v0
3891; GFX1100-SDAG-NEXT:    s_waitcnt_depctr 0xfff
3892; GFX1100-SDAG-NEXT:    v_fmamk_f32 v0, v0, 0x3f317218, v1
3893; GFX1100-SDAG-NEXT:    s_setpc_b64 s[30:31]
3894;
3895; GFX1100-GISEL-LABEL: v_fabs_log_f32_afn:
3896; GFX1100-GISEL:       ; %bb.0:
3897; GFX1100-GISEL-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
3898; GFX1100-GISEL-NEXT:    v_log_f32_e64 v1, |v0|
3899; GFX1100-GISEL-NEXT:    v_cmp_gt_f32_e64 s0, 0x800000, |v0|
3900; GFX1100-GISEL-NEXT:    s_delay_alu instid0(VALU_DEP_1)
3901; GFX1100-GISEL-NEXT:    v_cndmask_b32_e64 v0, 0, 0xc1b17218, s0
3902; GFX1100-GISEL-NEXT:    s_waitcnt_depctr 0xfff
3903; GFX1100-GISEL-NEXT:    v_fmac_f32_e32 v0, 0x3f317218, v1
3904; GFX1100-GISEL-NEXT:    s_setpc_b64 s[30:31]
3905;
3906; R600-LABEL: v_fabs_log_f32_afn:
3907; R600:       ; %bb.0:
3908; R600-NEXT:    CF_END
3909; R600-NEXT:    PAD
3910;
3911; CM-LABEL: v_fabs_log_f32_afn:
3912; CM:       ; %bb.0:
3913; CM-NEXT:    CF_END
3914; CM-NEXT:    PAD
3915  %fabs = call float @llvm.fabs.f32(float %in)
3916  %result = call afn float @llvm.log.f32(float %fabs)
3917  ret float %result
3918}
3919
3920define float @v_log_f32_daz(float %in) #0 {
3921; SI-SDAG-LABEL: v_log_f32_daz:
3922; SI-SDAG:       ; %bb.0:
3923; SI-SDAG-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
3924; SI-SDAG-NEXT:    v_log_f32_e32 v0, v0
3925; SI-SDAG-NEXT:    s_mov_b32 s4, 0x3f317217
3926; SI-SDAG-NEXT:    s_mov_b32 s5, 0x3377d1cf
3927; SI-SDAG-NEXT:    s_mov_b32 s6, 0x7f800000
3928; SI-SDAG-NEXT:    v_mul_f32_e32 v1, 0x3f317217, v0
3929; SI-SDAG-NEXT:    v_fma_f32 v2, v0, s4, -v1
3930; SI-SDAG-NEXT:    v_fma_f32 v2, v0, s5, v2
3931; SI-SDAG-NEXT:    v_add_f32_e32 v1, v1, v2
3932; SI-SDAG-NEXT:    v_cmp_lt_f32_e64 vcc, |v0|, s6
3933; SI-SDAG-NEXT:    v_cndmask_b32_e32 v0, v0, v1, vcc
3934; SI-SDAG-NEXT:    s_setpc_b64 s[30:31]
3935;
3936; SI-GISEL-LABEL: v_log_f32_daz:
3937; SI-GISEL:       ; %bb.0:
3938; SI-GISEL-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
3939; SI-GISEL-NEXT:    v_log_f32_e32 v0, v0
3940; SI-GISEL-NEXT:    v_mov_b32_e32 v1, 0x3f317217
3941; SI-GISEL-NEXT:    v_mov_b32_e32 v2, 0x3377d1cf
3942; SI-GISEL-NEXT:    v_mov_b32_e32 v3, 0x7f800000
3943; SI-GISEL-NEXT:    v_mul_f32_e32 v4, 0x3f317217, v0
3944; SI-GISEL-NEXT:    v_fma_f32 v1, v0, v1, -v4
3945; SI-GISEL-NEXT:    v_fma_f32 v1, v0, v2, v1
3946; SI-GISEL-NEXT:    v_add_f32_e32 v1, v4, v1
3947; SI-GISEL-NEXT:    v_cmp_lt_f32_e64 vcc, |v0|, v3
3948; SI-GISEL-NEXT:    v_cndmask_b32_e32 v0, v0, v1, vcc
3949; SI-GISEL-NEXT:    s_setpc_b64 s[30:31]
3950;
3951; VI-SDAG-LABEL: v_log_f32_daz:
3952; VI-SDAG:       ; %bb.0:
3953; VI-SDAG-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
3954; VI-SDAG-NEXT:    v_log_f32_e32 v0, v0
3955; VI-SDAG-NEXT:    s_mov_b32 s4, 0x7f800000
3956; VI-SDAG-NEXT:    v_and_b32_e32 v1, 0xfffff000, v0
3957; VI-SDAG-NEXT:    v_sub_f32_e32 v3, v0, v1
3958; VI-SDAG-NEXT:    v_mul_f32_e32 v2, 0x3805fdf4, v1
3959; VI-SDAG-NEXT:    v_mul_f32_e32 v4, 0x3805fdf4, v3
3960; VI-SDAG-NEXT:    v_mul_f32_e32 v3, 0x3f317000, v3
3961; VI-SDAG-NEXT:    v_add_f32_e32 v2, v2, v4
3962; VI-SDAG-NEXT:    v_mul_f32_e32 v1, 0x3f317000, v1
3963; VI-SDAG-NEXT:    v_add_f32_e32 v2, v3, v2
3964; VI-SDAG-NEXT:    v_add_f32_e32 v1, v1, v2
3965; VI-SDAG-NEXT:    v_cmp_lt_f32_e64 vcc, |v0|, s4
3966; VI-SDAG-NEXT:    v_cndmask_b32_e32 v0, v0, v1, vcc
3967; VI-SDAG-NEXT:    s_setpc_b64 s[30:31]
3968;
3969; VI-GISEL-LABEL: v_log_f32_daz:
3970; VI-GISEL:       ; %bb.0:
3971; VI-GISEL-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
3972; VI-GISEL-NEXT:    v_log_f32_e32 v0, v0
3973; VI-GISEL-NEXT:    v_and_b32_e32 v1, 0xfffff000, v0
3974; VI-GISEL-NEXT:    v_sub_f32_e32 v2, v0, v1
3975; VI-GISEL-NEXT:    v_mul_f32_e32 v3, 0x3805fdf4, v1
3976; VI-GISEL-NEXT:    v_mul_f32_e32 v4, 0x3805fdf4, v2
3977; VI-GISEL-NEXT:    v_mul_f32_e32 v2, 0x3f317000, v2
3978; VI-GISEL-NEXT:    v_add_f32_e32 v3, v3, v4
3979; VI-GISEL-NEXT:    v_mul_f32_e32 v1, 0x3f317000, v1
3980; VI-GISEL-NEXT:    v_add_f32_e32 v2, v2, v3
3981; VI-GISEL-NEXT:    v_add_f32_e32 v1, v1, v2
3982; VI-GISEL-NEXT:    v_mov_b32_e32 v2, 0x7f800000
3983; VI-GISEL-NEXT:    v_cmp_lt_f32_e64 vcc, |v0|, v2
3984; VI-GISEL-NEXT:    v_cndmask_b32_e32 v0, v0, v1, vcc
3985; VI-GISEL-NEXT:    s_setpc_b64 s[30:31]
3986;
3987; GFX900-SDAG-LABEL: v_log_f32_daz:
3988; GFX900-SDAG:       ; %bb.0:
3989; GFX900-SDAG-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
3990; GFX900-SDAG-NEXT:    v_log_f32_e32 v0, v0
3991; GFX900-SDAG-NEXT:    s_mov_b32 s4, 0x3f317217
3992; GFX900-SDAG-NEXT:    s_mov_b32 s5, 0x3377d1cf
3993; GFX900-SDAG-NEXT:    s_mov_b32 s6, 0x7f800000
3994; GFX900-SDAG-NEXT:    v_mul_f32_e32 v1, 0x3f317217, v0
3995; GFX900-SDAG-NEXT:    v_fma_f32 v2, v0, s4, -v1
3996; GFX900-SDAG-NEXT:    v_fma_f32 v2, v0, s5, v2
3997; GFX900-SDAG-NEXT:    v_add_f32_e32 v1, v1, v2
3998; GFX900-SDAG-NEXT:    v_cmp_lt_f32_e64 vcc, |v0|, s6
3999; GFX900-SDAG-NEXT:    v_cndmask_b32_e32 v0, v0, v1, vcc
4000; GFX900-SDAG-NEXT:    s_setpc_b64 s[30:31]
4001;
4002; GFX900-GISEL-LABEL: v_log_f32_daz:
4003; GFX900-GISEL:       ; %bb.0:
4004; GFX900-GISEL-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
4005; GFX900-GISEL-NEXT:    v_log_f32_e32 v0, v0
4006; GFX900-GISEL-NEXT:    v_mov_b32_e32 v1, 0x3f317217
4007; GFX900-GISEL-NEXT:    v_mov_b32_e32 v2, 0x3377d1cf
4008; GFX900-GISEL-NEXT:    v_mov_b32_e32 v3, 0x7f800000
4009; GFX900-GISEL-NEXT:    v_mul_f32_e32 v4, 0x3f317217, v0
4010; GFX900-GISEL-NEXT:    v_fma_f32 v1, v0, v1, -v4
4011; GFX900-GISEL-NEXT:    v_fma_f32 v1, v0, v2, v1
4012; GFX900-GISEL-NEXT:    v_add_f32_e32 v1, v4, v1
4013; GFX900-GISEL-NEXT:    v_cmp_lt_f32_e64 vcc, |v0|, v3
4014; GFX900-GISEL-NEXT:    v_cndmask_b32_e32 v0, v0, v1, vcc
4015; GFX900-GISEL-NEXT:    s_setpc_b64 s[30:31]
4016;
4017; GFX1100-SDAG-LABEL: v_log_f32_daz:
4018; GFX1100-SDAG:       ; %bb.0:
4019; GFX1100-SDAG-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
4020; GFX1100-SDAG-NEXT:    v_log_f32_e32 v0, v0
4021; GFX1100-SDAG-NEXT:    s_waitcnt_depctr 0xfff
4022; GFX1100-SDAG-NEXT:    v_mul_f32_e32 v1, 0x3f317217, v0
4023; GFX1100-SDAG-NEXT:    v_cmp_gt_f32_e64 vcc_lo, 0x7f800000, |v0|
4024; GFX1100-SDAG-NEXT:    s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
4025; GFX1100-SDAG-NEXT:    v_fma_f32 v2, 0x3f317217, v0, -v1
4026; GFX1100-SDAG-NEXT:    v_fmamk_f32 v2, v0, 0x3377d1cf, v2
4027; GFX1100-SDAG-NEXT:    s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
4028; GFX1100-SDAG-NEXT:    v_add_f32_e32 v1, v1, v2
4029; GFX1100-SDAG-NEXT:    v_cndmask_b32_e32 v0, v0, v1, vcc_lo
4030; GFX1100-SDAG-NEXT:    s_setpc_b64 s[30:31]
4031;
4032; GFX1100-GISEL-LABEL: v_log_f32_daz:
4033; GFX1100-GISEL:       ; %bb.0:
4034; GFX1100-GISEL-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
4035; GFX1100-GISEL-NEXT:    v_log_f32_e32 v0, v0
4036; GFX1100-GISEL-NEXT:    s_waitcnt_depctr 0xfff
4037; GFX1100-GISEL-NEXT:    v_mul_f32_e32 v1, 0x3f317217, v0
4038; GFX1100-GISEL-NEXT:    v_cmp_gt_f32_e64 vcc_lo, 0x7f800000, |v0|
4039; GFX1100-GISEL-NEXT:    s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
4040; GFX1100-GISEL-NEXT:    v_fma_f32 v2, 0x3f317217, v0, -v1
4041; GFX1100-GISEL-NEXT:    v_fmac_f32_e32 v2, 0x3377d1cf, v0
4042; GFX1100-GISEL-NEXT:    s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
4043; GFX1100-GISEL-NEXT:    v_add_f32_e32 v1, v1, v2
4044; GFX1100-GISEL-NEXT:    v_cndmask_b32_e32 v0, v0, v1, vcc_lo
4045; GFX1100-GISEL-NEXT:    s_setpc_b64 s[30:31]
4046;
4047; R600-LABEL: v_log_f32_daz:
4048; R600:       ; %bb.0:
4049; R600-NEXT:    CF_END
4050; R600-NEXT:    PAD
4051;
4052; CM-LABEL: v_log_f32_daz:
4053; CM:       ; %bb.0:
4054; CM-NEXT:    CF_END
4055; CM-NEXT:    PAD
4056  %result = call float @llvm.log.f32(float %in)
4057  ret float %result
4058}
4059
4060define float @v_log_f32_nnan(float %in) {
4061; SI-SDAG-LABEL: v_log_f32_nnan:
4062; SI-SDAG:       ; %bb.0:
4063; SI-SDAG-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
4064; SI-SDAG-NEXT:    s_mov_b32 s4, 0x800000
4065; SI-SDAG-NEXT:    v_cmp_gt_f32_e32 vcc, s4, v0
4066; SI-SDAG-NEXT:    v_cndmask_b32_e64 v1, 0, 1, vcc
4067; SI-SDAG-NEXT:    v_lshlrev_b32_e32 v1, 5, v1
4068; SI-SDAG-NEXT:    v_ldexp_f32_e32 v0, v0, v1
4069; SI-SDAG-NEXT:    v_log_f32_e32 v0, v0
4070; SI-SDAG-NEXT:    s_mov_b32 s4, 0x3f317217
4071; SI-SDAG-NEXT:    v_mul_f32_e32 v1, 0x3f317217, v0
4072; SI-SDAG-NEXT:    v_fma_f32 v2, v0, s4, -v1
4073; SI-SDAG-NEXT:    s_mov_b32 s4, 0x3377d1cf
4074; SI-SDAG-NEXT:    v_fma_f32 v2, v0, s4, v2
4075; SI-SDAG-NEXT:    s_mov_b32 s4, 0x7f800000
4076; SI-SDAG-NEXT:    v_add_f32_e32 v1, v1, v2
4077; SI-SDAG-NEXT:    v_cmp_lt_f32_e64 s[4:5], |v0|, s4
4078; SI-SDAG-NEXT:    v_cndmask_b32_e64 v0, v0, v1, s[4:5]
4079; SI-SDAG-NEXT:    v_mov_b32_e32 v1, 0x41b17218
4080; SI-SDAG-NEXT:    v_cndmask_b32_e32 v1, 0, v1, vcc
4081; SI-SDAG-NEXT:    v_sub_f32_e32 v0, v0, v1
4082; SI-SDAG-NEXT:    s_setpc_b64 s[30:31]
4083;
4084; SI-GISEL-LABEL: v_log_f32_nnan:
4085; SI-GISEL:       ; %bb.0:
4086; SI-GISEL-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
4087; SI-GISEL-NEXT:    v_mov_b32_e32 v1, 0x800000
4088; SI-GISEL-NEXT:    v_cmp_lt_f32_e32 vcc, v0, v1
4089; SI-GISEL-NEXT:    v_cndmask_b32_e64 v1, 0, 1, vcc
4090; SI-GISEL-NEXT:    v_lshlrev_b32_e32 v1, 5, v1
4091; SI-GISEL-NEXT:    v_ldexp_f32_e32 v0, v0, v1
4092; SI-GISEL-NEXT:    v_log_f32_e32 v0, v0
4093; SI-GISEL-NEXT:    v_mov_b32_e32 v1, 0x3f317217
4094; SI-GISEL-NEXT:    v_mov_b32_e32 v3, 0x3377d1cf
4095; SI-GISEL-NEXT:    v_mul_f32_e32 v2, 0x3f317217, v0
4096; SI-GISEL-NEXT:    v_fma_f32 v1, v0, v1, -v2
4097; SI-GISEL-NEXT:    v_fma_f32 v1, v0, v3, v1
4098; SI-GISEL-NEXT:    v_add_f32_e32 v1, v2, v1
4099; SI-GISEL-NEXT:    v_mov_b32_e32 v2, 0x7f800000
4100; SI-GISEL-NEXT:    v_cmp_lt_f32_e64 s[4:5], |v0|, v2
4101; SI-GISEL-NEXT:    v_cndmask_b32_e64 v0, v0, v1, s[4:5]
4102; SI-GISEL-NEXT:    v_mov_b32_e32 v1, 0x41b17218
4103; SI-GISEL-NEXT:    v_cndmask_b32_e32 v1, 0, v1, vcc
4104; SI-GISEL-NEXT:    v_sub_f32_e32 v0, v0, v1
4105; SI-GISEL-NEXT:    s_setpc_b64 s[30:31]
4106;
4107; VI-SDAG-LABEL: v_log_f32_nnan:
4108; VI-SDAG:       ; %bb.0:
4109; VI-SDAG-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
4110; VI-SDAG-NEXT:    s_mov_b32 s4, 0x800000
4111; VI-SDAG-NEXT:    v_cmp_gt_f32_e32 vcc, s4, v0
4112; VI-SDAG-NEXT:    v_cndmask_b32_e64 v1, 0, 1, vcc
4113; VI-SDAG-NEXT:    v_lshlrev_b32_e32 v1, 5, v1
4114; VI-SDAG-NEXT:    v_ldexp_f32 v0, v0, v1
4115; VI-SDAG-NEXT:    v_log_f32_e32 v0, v0
4116; VI-SDAG-NEXT:    s_mov_b32 s4, 0x7f800000
4117; VI-SDAG-NEXT:    v_and_b32_e32 v1, 0xfffff000, v0
4118; VI-SDAG-NEXT:    v_sub_f32_e32 v2, v0, v1
4119; VI-SDAG-NEXT:    v_mul_f32_e32 v3, 0x3f317000, v2
4120; VI-SDAG-NEXT:    v_mul_f32_e32 v2, 0x3805fdf4, v2
4121; VI-SDAG-NEXT:    v_mul_f32_e32 v4, 0x3805fdf4, v1
4122; VI-SDAG-NEXT:    v_add_f32_e32 v2, v4, v2
4123; VI-SDAG-NEXT:    v_add_f32_e32 v2, v3, v2
4124; VI-SDAG-NEXT:    v_mul_f32_e32 v1, 0x3f317000, v1
4125; VI-SDAG-NEXT:    v_add_f32_e32 v1, v1, v2
4126; VI-SDAG-NEXT:    v_cmp_lt_f32_e64 s[4:5], |v0|, s4
4127; VI-SDAG-NEXT:    v_cndmask_b32_e64 v0, v0, v1, s[4:5]
4128; VI-SDAG-NEXT:    v_mov_b32_e32 v1, 0x41b17218
4129; VI-SDAG-NEXT:    v_cndmask_b32_e32 v1, 0, v1, vcc
4130; VI-SDAG-NEXT:    v_sub_f32_e32 v0, v0, v1
4131; VI-SDAG-NEXT:    s_setpc_b64 s[30:31]
4132;
4133; VI-GISEL-LABEL: v_log_f32_nnan:
4134; VI-GISEL:       ; %bb.0:
4135; VI-GISEL-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
4136; VI-GISEL-NEXT:    v_mov_b32_e32 v1, 0x800000
4137; VI-GISEL-NEXT:    v_cmp_lt_f32_e32 vcc, v0, v1
4138; VI-GISEL-NEXT:    v_cndmask_b32_e64 v1, 0, 1, vcc
4139; VI-GISEL-NEXT:    v_lshlrev_b32_e32 v1, 5, v1
4140; VI-GISEL-NEXT:    v_ldexp_f32 v0, v0, v1
4141; VI-GISEL-NEXT:    v_log_f32_e32 v0, v0
4142; VI-GISEL-NEXT:    v_and_b32_e32 v1, 0xfffff000, v0
4143; VI-GISEL-NEXT:    v_sub_f32_e32 v2, v0, v1
4144; VI-GISEL-NEXT:    v_mul_f32_e32 v3, 0x3805fdf4, v1
4145; VI-GISEL-NEXT:    v_mul_f32_e32 v4, 0x3805fdf4, v2
4146; VI-GISEL-NEXT:    v_add_f32_e32 v3, v3, v4
4147; VI-GISEL-NEXT:    v_mul_f32_e32 v2, 0x3f317000, v2
4148; VI-GISEL-NEXT:    v_add_f32_e32 v2, v2, v3
4149; VI-GISEL-NEXT:    v_mul_f32_e32 v1, 0x3f317000, v1
4150; VI-GISEL-NEXT:    v_add_f32_e32 v1, v1, v2
4151; VI-GISEL-NEXT:    v_mov_b32_e32 v2, 0x7f800000
4152; VI-GISEL-NEXT:    v_cmp_lt_f32_e64 s[4:5], |v0|, v2
4153; VI-GISEL-NEXT:    v_cndmask_b32_e64 v0, v0, v1, s[4:5]
4154; VI-GISEL-NEXT:    v_mov_b32_e32 v1, 0x41b17218
4155; VI-GISEL-NEXT:    v_cndmask_b32_e32 v1, 0, v1, vcc
4156; VI-GISEL-NEXT:    v_sub_f32_e32 v0, v0, v1
4157; VI-GISEL-NEXT:    s_setpc_b64 s[30:31]
4158;
4159; GFX900-SDAG-LABEL: v_log_f32_nnan:
4160; GFX900-SDAG:       ; %bb.0:
4161; GFX900-SDAG-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
4162; GFX900-SDAG-NEXT:    s_mov_b32 s4, 0x800000
4163; GFX900-SDAG-NEXT:    v_cmp_gt_f32_e32 vcc, s4, v0
4164; GFX900-SDAG-NEXT:    v_cndmask_b32_e64 v1, 0, 1, vcc
4165; GFX900-SDAG-NEXT:    v_lshlrev_b32_e32 v1, 5, v1
4166; GFX900-SDAG-NEXT:    v_ldexp_f32 v0, v0, v1
4167; GFX900-SDAG-NEXT:    v_log_f32_e32 v0, v0
4168; GFX900-SDAG-NEXT:    s_mov_b32 s4, 0x3f317217
4169; GFX900-SDAG-NEXT:    v_mul_f32_e32 v1, 0x3f317217, v0
4170; GFX900-SDAG-NEXT:    v_fma_f32 v2, v0, s4, -v1
4171; GFX900-SDAG-NEXT:    s_mov_b32 s4, 0x3377d1cf
4172; GFX900-SDAG-NEXT:    v_fma_f32 v2, v0, s4, v2
4173; GFX900-SDAG-NEXT:    s_mov_b32 s4, 0x7f800000
4174; GFX900-SDAG-NEXT:    v_add_f32_e32 v1, v1, v2
4175; GFX900-SDAG-NEXT:    v_cmp_lt_f32_e64 s[4:5], |v0|, s4
4176; GFX900-SDAG-NEXT:    v_cndmask_b32_e64 v0, v0, v1, s[4:5]
4177; GFX900-SDAG-NEXT:    v_mov_b32_e32 v1, 0x41b17218
4178; GFX900-SDAG-NEXT:    v_cndmask_b32_e32 v1, 0, v1, vcc
4179; GFX900-SDAG-NEXT:    v_sub_f32_e32 v0, v0, v1
4180; GFX900-SDAG-NEXT:    s_setpc_b64 s[30:31]
4181;
4182; GFX900-GISEL-LABEL: v_log_f32_nnan:
4183; GFX900-GISEL:       ; %bb.0:
4184; GFX900-GISEL-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
4185; GFX900-GISEL-NEXT:    v_mov_b32_e32 v1, 0x800000
4186; GFX900-GISEL-NEXT:    v_cmp_lt_f32_e32 vcc, v0, v1
4187; GFX900-GISEL-NEXT:    v_cndmask_b32_e64 v1, 0, 1, vcc
4188; GFX900-GISEL-NEXT:    v_lshlrev_b32_e32 v1, 5, v1
4189; GFX900-GISEL-NEXT:    v_ldexp_f32 v0, v0, v1
4190; GFX900-GISEL-NEXT:    v_log_f32_e32 v0, v0
4191; GFX900-GISEL-NEXT:    v_mov_b32_e32 v1, 0x3f317217
4192; GFX900-GISEL-NEXT:    v_mov_b32_e32 v3, 0x3377d1cf
4193; GFX900-GISEL-NEXT:    v_mul_f32_e32 v2, 0x3f317217, v0
4194; GFX900-GISEL-NEXT:    v_fma_f32 v1, v0, v1, -v2
4195; GFX900-GISEL-NEXT:    v_fma_f32 v1, v0, v3, v1
4196; GFX900-GISEL-NEXT:    v_add_f32_e32 v1, v2, v1
4197; GFX900-GISEL-NEXT:    v_mov_b32_e32 v2, 0x7f800000
4198; GFX900-GISEL-NEXT:    v_cmp_lt_f32_e64 s[4:5], |v0|, v2
4199; GFX900-GISEL-NEXT:    v_cndmask_b32_e64 v0, v0, v1, s[4:5]
4200; GFX900-GISEL-NEXT:    v_mov_b32_e32 v1, 0x41b17218
4201; GFX900-GISEL-NEXT:    v_cndmask_b32_e32 v1, 0, v1, vcc
4202; GFX900-GISEL-NEXT:    v_sub_f32_e32 v0, v0, v1
4203; GFX900-GISEL-NEXT:    s_setpc_b64 s[30:31]
4204;
4205; GFX1100-SDAG-LABEL: v_log_f32_nnan:
4206; GFX1100-SDAG:       ; %bb.0:
4207; GFX1100-SDAG-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
4208; GFX1100-SDAG-NEXT:    v_cmp_gt_f32_e32 vcc_lo, 0x800000, v0
4209; GFX1100-SDAG-NEXT:    v_cndmask_b32_e64 v1, 0, 1, vcc_lo
4210; GFX1100-SDAG-NEXT:    s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
4211; GFX1100-SDAG-NEXT:    v_lshlrev_b32_e32 v1, 5, v1
4212; GFX1100-SDAG-NEXT:    v_ldexp_f32 v0, v0, v1
4213; GFX1100-SDAG-NEXT:    s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_2)
4214; GFX1100-SDAG-NEXT:    v_log_f32_e32 v0, v0
4215; GFX1100-SDAG-NEXT:    s_waitcnt_depctr 0xfff
4216; GFX1100-SDAG-NEXT:    v_mul_f32_e32 v1, 0x3f317217, v0
4217; GFX1100-SDAG-NEXT:    v_cmp_gt_f32_e64 s0, 0x7f800000, |v0|
4218; GFX1100-SDAG-NEXT:    v_fma_f32 v2, 0x3f317217, v0, -v1
4219; GFX1100-SDAG-NEXT:    s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
4220; GFX1100-SDAG-NEXT:    v_fmamk_f32 v2, v0, 0x3377d1cf, v2
4221; GFX1100-SDAG-NEXT:    v_add_f32_e32 v1, v1, v2
4222; GFX1100-SDAG-NEXT:    s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
4223; GFX1100-SDAG-NEXT:    v_cndmask_b32_e64 v0, v0, v1, s0
4224; GFX1100-SDAG-NEXT:    v_cndmask_b32_e64 v1, 0, 0x41b17218, vcc_lo
4225; GFX1100-SDAG-NEXT:    v_sub_f32_e32 v0, v0, v1
4226; GFX1100-SDAG-NEXT:    s_setpc_b64 s[30:31]
4227;
4228; GFX1100-GISEL-LABEL: v_log_f32_nnan:
4229; GFX1100-GISEL:       ; %bb.0:
4230; GFX1100-GISEL-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
4231; GFX1100-GISEL-NEXT:    v_cmp_gt_f32_e32 vcc_lo, 0x800000, v0
4232; GFX1100-GISEL-NEXT:    v_cndmask_b32_e64 v1, 0, 1, vcc_lo
4233; GFX1100-GISEL-NEXT:    s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
4234; GFX1100-GISEL-NEXT:    v_lshlrev_b32_e32 v1, 5, v1
4235; GFX1100-GISEL-NEXT:    v_ldexp_f32 v0, v0, v1
4236; GFX1100-GISEL-NEXT:    s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_2)
4237; GFX1100-GISEL-NEXT:    v_log_f32_e32 v0, v0
4238; GFX1100-GISEL-NEXT:    s_waitcnt_depctr 0xfff
4239; GFX1100-GISEL-NEXT:    v_mul_f32_e32 v1, 0x3f317217, v0
4240; GFX1100-GISEL-NEXT:    v_cmp_gt_f32_e64 s0, 0x7f800000, |v0|
4241; GFX1100-GISEL-NEXT:    v_fma_f32 v2, 0x3f317217, v0, -v1
4242; GFX1100-GISEL-NEXT:    s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
4243; GFX1100-GISEL-NEXT:    v_fmac_f32_e32 v2, 0x3377d1cf, v0
4244; GFX1100-GISEL-NEXT:    v_add_f32_e32 v1, v1, v2
4245; GFX1100-GISEL-NEXT:    s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
4246; GFX1100-GISEL-NEXT:    v_cndmask_b32_e64 v0, v0, v1, s0
4247; GFX1100-GISEL-NEXT:    v_cndmask_b32_e64 v1, 0, 0x41b17218, vcc_lo
4248; GFX1100-GISEL-NEXT:    v_sub_f32_e32 v0, v0, v1
4249; GFX1100-GISEL-NEXT:    s_setpc_b64 s[30:31]
4250;
4251; R600-LABEL: v_log_f32_nnan:
4252; R600:       ; %bb.0:
4253; R600-NEXT:    CF_END
4254; R600-NEXT:    PAD
4255;
4256; CM-LABEL: v_log_f32_nnan:
4257; CM:       ; %bb.0:
4258; CM-NEXT:    CF_END
4259; CM-NEXT:    PAD
4260  %result = call nnan float @llvm.log.f32(float %in)
4261  ret float %result
4262}
4263
4264define float @v_log_f32_nnan_daz(float %in) #0 {
4265; SI-SDAG-LABEL: v_log_f32_nnan_daz:
4266; SI-SDAG:       ; %bb.0:
4267; SI-SDAG-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
4268; SI-SDAG-NEXT:    v_log_f32_e32 v0, v0
4269; SI-SDAG-NEXT:    s_mov_b32 s4, 0x3f317217
4270; SI-SDAG-NEXT:    s_mov_b32 s5, 0x3377d1cf
4271; SI-SDAG-NEXT:    s_mov_b32 s6, 0x7f800000
4272; SI-SDAG-NEXT:    v_mul_f32_e32 v1, 0x3f317217, v0
4273; SI-SDAG-NEXT:    v_fma_f32 v2, v0, s4, -v1
4274; SI-SDAG-NEXT:    v_fma_f32 v2, v0, s5, v2
4275; SI-SDAG-NEXT:    v_add_f32_e32 v1, v1, v2
4276; SI-SDAG-NEXT:    v_cmp_lt_f32_e64 vcc, |v0|, s6
4277; SI-SDAG-NEXT:    v_cndmask_b32_e32 v0, v0, v1, vcc
4278; SI-SDAG-NEXT:    s_setpc_b64 s[30:31]
4279;
4280; SI-GISEL-LABEL: v_log_f32_nnan_daz:
4281; SI-GISEL:       ; %bb.0:
4282; SI-GISEL-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
4283; SI-GISEL-NEXT:    v_log_f32_e32 v0, v0
4284; SI-GISEL-NEXT:    v_mov_b32_e32 v1, 0x3f317217
4285; SI-GISEL-NEXT:    v_mov_b32_e32 v2, 0x3377d1cf
4286; SI-GISEL-NEXT:    v_mov_b32_e32 v3, 0x7f800000
4287; SI-GISEL-NEXT:    v_mul_f32_e32 v4, 0x3f317217, v0
4288; SI-GISEL-NEXT:    v_fma_f32 v1, v0, v1, -v4
4289; SI-GISEL-NEXT:    v_fma_f32 v1, v0, v2, v1
4290; SI-GISEL-NEXT:    v_add_f32_e32 v1, v4, v1
4291; SI-GISEL-NEXT:    v_cmp_lt_f32_e64 vcc, |v0|, v3
4292; SI-GISEL-NEXT:    v_cndmask_b32_e32 v0, v0, v1, vcc
4293; SI-GISEL-NEXT:    s_setpc_b64 s[30:31]
4294;
4295; VI-SDAG-LABEL: v_log_f32_nnan_daz:
4296; VI-SDAG:       ; %bb.0:
4297; VI-SDAG-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
4298; VI-SDAG-NEXT:    v_log_f32_e32 v0, v0
4299; VI-SDAG-NEXT:    s_mov_b32 s4, 0x7f800000
4300; VI-SDAG-NEXT:    v_and_b32_e32 v1, 0xfffff000, v0
4301; VI-SDAG-NEXT:    v_sub_f32_e32 v3, v0, v1
4302; VI-SDAG-NEXT:    v_mul_f32_e32 v2, 0x3805fdf4, v1
4303; VI-SDAG-NEXT:    v_mul_f32_e32 v4, 0x3805fdf4, v3
4304; VI-SDAG-NEXT:    v_mul_f32_e32 v3, 0x3f317000, v3
4305; VI-SDAG-NEXT:    v_add_f32_e32 v2, v2, v4
4306; VI-SDAG-NEXT:    v_mul_f32_e32 v1, 0x3f317000, v1
4307; VI-SDAG-NEXT:    v_add_f32_e32 v2, v3, v2
4308; VI-SDAG-NEXT:    v_add_f32_e32 v1, v1, v2
4309; VI-SDAG-NEXT:    v_cmp_lt_f32_e64 vcc, |v0|, s4
4310; VI-SDAG-NEXT:    v_cndmask_b32_e32 v0, v0, v1, vcc
4311; VI-SDAG-NEXT:    s_setpc_b64 s[30:31]
4312;
4313; VI-GISEL-LABEL: v_log_f32_nnan_daz:
4314; VI-GISEL:       ; %bb.0:
4315; VI-GISEL-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
4316; VI-GISEL-NEXT:    v_log_f32_e32 v0, v0
4317; VI-GISEL-NEXT:    v_and_b32_e32 v1, 0xfffff000, v0
4318; VI-GISEL-NEXT:    v_sub_f32_e32 v2, v0, v1
4319; VI-GISEL-NEXT:    v_mul_f32_e32 v3, 0x3805fdf4, v1
4320; VI-GISEL-NEXT:    v_mul_f32_e32 v4, 0x3805fdf4, v2
4321; VI-GISEL-NEXT:    v_mul_f32_e32 v2, 0x3f317000, v2
4322; VI-GISEL-NEXT:    v_add_f32_e32 v3, v3, v4
4323; VI-GISEL-NEXT:    v_mul_f32_e32 v1, 0x3f317000, v1
4324; VI-GISEL-NEXT:    v_add_f32_e32 v2, v2, v3
4325; VI-GISEL-NEXT:    v_add_f32_e32 v1, v1, v2
4326; VI-GISEL-NEXT:    v_mov_b32_e32 v2, 0x7f800000
4327; VI-GISEL-NEXT:    v_cmp_lt_f32_e64 vcc, |v0|, v2
4328; VI-GISEL-NEXT:    v_cndmask_b32_e32 v0, v0, v1, vcc
4329; VI-GISEL-NEXT:    s_setpc_b64 s[30:31]
4330;
4331; GFX900-SDAG-LABEL: v_log_f32_nnan_daz:
4332; GFX900-SDAG:       ; %bb.0:
4333; GFX900-SDAG-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
4334; GFX900-SDAG-NEXT:    v_log_f32_e32 v0, v0
4335; GFX900-SDAG-NEXT:    s_mov_b32 s4, 0x3f317217
4336; GFX900-SDAG-NEXT:    s_mov_b32 s5, 0x3377d1cf
4337; GFX900-SDAG-NEXT:    s_mov_b32 s6, 0x7f800000
4338; GFX900-SDAG-NEXT:    v_mul_f32_e32 v1, 0x3f317217, v0
4339; GFX900-SDAG-NEXT:    v_fma_f32 v2, v0, s4, -v1
4340; GFX900-SDAG-NEXT:    v_fma_f32 v2, v0, s5, v2
4341; GFX900-SDAG-NEXT:    v_add_f32_e32 v1, v1, v2
4342; GFX900-SDAG-NEXT:    v_cmp_lt_f32_e64 vcc, |v0|, s6
4343; GFX900-SDAG-NEXT:    v_cndmask_b32_e32 v0, v0, v1, vcc
4344; GFX900-SDAG-NEXT:    s_setpc_b64 s[30:31]
4345;
4346; GFX900-GISEL-LABEL: v_log_f32_nnan_daz:
4347; GFX900-GISEL:       ; %bb.0:
4348; GFX900-GISEL-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
4349; GFX900-GISEL-NEXT:    v_log_f32_e32 v0, v0
4350; GFX900-GISEL-NEXT:    v_mov_b32_e32 v1, 0x3f317217
4351; GFX900-GISEL-NEXT:    v_mov_b32_e32 v2, 0x3377d1cf
4352; GFX900-GISEL-NEXT:    v_mov_b32_e32 v3, 0x7f800000
4353; GFX900-GISEL-NEXT:    v_mul_f32_e32 v4, 0x3f317217, v0
4354; GFX900-GISEL-NEXT:    v_fma_f32 v1, v0, v1, -v4
4355; GFX900-GISEL-NEXT:    v_fma_f32 v1, v0, v2, v1
4356; GFX900-GISEL-NEXT:    v_add_f32_e32 v1, v4, v1
4357; GFX900-GISEL-NEXT:    v_cmp_lt_f32_e64 vcc, |v0|, v3
4358; GFX900-GISEL-NEXT:    v_cndmask_b32_e32 v0, v0, v1, vcc
4359; GFX900-GISEL-NEXT:    s_setpc_b64 s[30:31]
4360;
4361; GFX1100-SDAG-LABEL: v_log_f32_nnan_daz:
4362; GFX1100-SDAG:       ; %bb.0:
4363; GFX1100-SDAG-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
4364; GFX1100-SDAG-NEXT:    v_log_f32_e32 v0, v0
4365; GFX1100-SDAG-NEXT:    s_waitcnt_depctr 0xfff
4366; GFX1100-SDAG-NEXT:    v_mul_f32_e32 v1, 0x3f317217, v0
4367; GFX1100-SDAG-NEXT:    v_cmp_gt_f32_e64 vcc_lo, 0x7f800000, |v0|
4368; GFX1100-SDAG-NEXT:    s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
4369; GFX1100-SDAG-NEXT:    v_fma_f32 v2, 0x3f317217, v0, -v1
4370; GFX1100-SDAG-NEXT:    v_fmamk_f32 v2, v0, 0x3377d1cf, v2
4371; GFX1100-SDAG-NEXT:    s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
4372; GFX1100-SDAG-NEXT:    v_add_f32_e32 v1, v1, v2
4373; GFX1100-SDAG-NEXT:    v_cndmask_b32_e32 v0, v0, v1, vcc_lo
4374; GFX1100-SDAG-NEXT:    s_setpc_b64 s[30:31]
4375;
4376; GFX1100-GISEL-LABEL: v_log_f32_nnan_daz:
4377; GFX1100-GISEL:       ; %bb.0:
4378; GFX1100-GISEL-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
4379; GFX1100-GISEL-NEXT:    v_log_f32_e32 v0, v0
4380; GFX1100-GISEL-NEXT:    s_waitcnt_depctr 0xfff
4381; GFX1100-GISEL-NEXT:    v_mul_f32_e32 v1, 0x3f317217, v0
4382; GFX1100-GISEL-NEXT:    v_cmp_gt_f32_e64 vcc_lo, 0x7f800000, |v0|
4383; GFX1100-GISEL-NEXT:    s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
4384; GFX1100-GISEL-NEXT:    v_fma_f32 v2, 0x3f317217, v0, -v1
4385; GFX1100-GISEL-NEXT:    v_fmac_f32_e32 v2, 0x3377d1cf, v0
4386; GFX1100-GISEL-NEXT:    s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
4387; GFX1100-GISEL-NEXT:    v_add_f32_e32 v1, v1, v2
4388; GFX1100-GISEL-NEXT:    v_cndmask_b32_e32 v0, v0, v1, vcc_lo
4389; GFX1100-GISEL-NEXT:    s_setpc_b64 s[30:31]
4390;
4391; R600-LABEL: v_log_f32_nnan_daz:
4392; R600:       ; %bb.0:
4393; R600-NEXT:    CF_END
4394; R600-NEXT:    PAD
4395;
4396; CM-LABEL: v_log_f32_nnan_daz:
4397; CM:       ; %bb.0:
4398; CM-NEXT:    CF_END
4399; CM-NEXT:    PAD
4400  %result = call nnan float @llvm.log.f32(float %in)
4401  ret float %result
4402}
4403
4404define float @v_log_f32_nnan_dynamic(float %in) #1 {
4405; SI-SDAG-LABEL: v_log_f32_nnan_dynamic:
4406; SI-SDAG:       ; %bb.0:
4407; SI-SDAG-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
4408; SI-SDAG-NEXT:    s_mov_b32 s4, 0x800000
4409; SI-SDAG-NEXT:    v_cmp_gt_f32_e32 vcc, s4, v0
4410; SI-SDAG-NEXT:    v_cndmask_b32_e64 v1, 0, 1, vcc
4411; SI-SDAG-NEXT:    v_lshlrev_b32_e32 v1, 5, v1
4412; SI-SDAG-NEXT:    v_ldexp_f32_e32 v0, v0, v1
4413; SI-SDAG-NEXT:    v_log_f32_e32 v0, v0
4414; SI-SDAG-NEXT:    s_mov_b32 s4, 0x3f317217
4415; SI-SDAG-NEXT:    v_mul_f32_e32 v1, 0x3f317217, v0
4416; SI-SDAG-NEXT:    v_fma_f32 v2, v0, s4, -v1
4417; SI-SDAG-NEXT:    s_mov_b32 s4, 0x3377d1cf
4418; SI-SDAG-NEXT:    v_fma_f32 v2, v0, s4, v2
4419; SI-SDAG-NEXT:    s_mov_b32 s4, 0x7f800000
4420; SI-SDAG-NEXT:    v_add_f32_e32 v1, v1, v2
4421; SI-SDAG-NEXT:    v_cmp_lt_f32_e64 s[4:5], |v0|, s4
4422; SI-SDAG-NEXT:    v_cndmask_b32_e64 v0, v0, v1, s[4:5]
4423; SI-SDAG-NEXT:    v_mov_b32_e32 v1, 0x41b17218
4424; SI-SDAG-NEXT:    v_cndmask_b32_e32 v1, 0, v1, vcc
4425; SI-SDAG-NEXT:    v_sub_f32_e32 v0, v0, v1
4426; SI-SDAG-NEXT:    s_setpc_b64 s[30:31]
4427;
4428; SI-GISEL-LABEL: v_log_f32_nnan_dynamic:
4429; SI-GISEL:       ; %bb.0:
4430; SI-GISEL-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
4431; SI-GISEL-NEXT:    v_mov_b32_e32 v1, 0x800000
4432; SI-GISEL-NEXT:    v_cmp_lt_f32_e32 vcc, v0, v1
4433; SI-GISEL-NEXT:    v_cndmask_b32_e64 v1, 0, 1, vcc
4434; SI-GISEL-NEXT:    v_lshlrev_b32_e32 v1, 5, v1
4435; SI-GISEL-NEXT:    v_ldexp_f32_e32 v0, v0, v1
4436; SI-GISEL-NEXT:    v_log_f32_e32 v0, v0
4437; SI-GISEL-NEXT:    v_mov_b32_e32 v1, 0x3f317217
4438; SI-GISEL-NEXT:    v_mov_b32_e32 v3, 0x3377d1cf
4439; SI-GISEL-NEXT:    v_mul_f32_e32 v2, 0x3f317217, v0
4440; SI-GISEL-NEXT:    v_fma_f32 v1, v0, v1, -v2
4441; SI-GISEL-NEXT:    v_fma_f32 v1, v0, v3, v1
4442; SI-GISEL-NEXT:    v_add_f32_e32 v1, v2, v1
4443; SI-GISEL-NEXT:    v_mov_b32_e32 v2, 0x7f800000
4444; SI-GISEL-NEXT:    v_cmp_lt_f32_e64 s[4:5], |v0|, v2
4445; SI-GISEL-NEXT:    v_cndmask_b32_e64 v0, v0, v1, s[4:5]
4446; SI-GISEL-NEXT:    v_mov_b32_e32 v1, 0x41b17218
4447; SI-GISEL-NEXT:    v_cndmask_b32_e32 v1, 0, v1, vcc
4448; SI-GISEL-NEXT:    v_sub_f32_e32 v0, v0, v1
4449; SI-GISEL-NEXT:    s_setpc_b64 s[30:31]
4450;
4451; VI-SDAG-LABEL: v_log_f32_nnan_dynamic:
4452; VI-SDAG:       ; %bb.0:
4453; VI-SDAG-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
4454; VI-SDAG-NEXT:    s_mov_b32 s4, 0x800000
4455; VI-SDAG-NEXT:    v_cmp_gt_f32_e32 vcc, s4, v0
4456; VI-SDAG-NEXT:    v_cndmask_b32_e64 v1, 0, 1, vcc
4457; VI-SDAG-NEXT:    v_lshlrev_b32_e32 v1, 5, v1
4458; VI-SDAG-NEXT:    v_ldexp_f32 v0, v0, v1
4459; VI-SDAG-NEXT:    v_log_f32_e32 v0, v0
4460; VI-SDAG-NEXT:    s_mov_b32 s4, 0x7f800000
4461; VI-SDAG-NEXT:    v_and_b32_e32 v1, 0xfffff000, v0
4462; VI-SDAG-NEXT:    v_sub_f32_e32 v2, v0, v1
4463; VI-SDAG-NEXT:    v_mul_f32_e32 v3, 0x3f317000, v2
4464; VI-SDAG-NEXT:    v_mul_f32_e32 v2, 0x3805fdf4, v2
4465; VI-SDAG-NEXT:    v_mul_f32_e32 v4, 0x3805fdf4, v1
4466; VI-SDAG-NEXT:    v_add_f32_e32 v2, v4, v2
4467; VI-SDAG-NEXT:    v_add_f32_e32 v2, v3, v2
4468; VI-SDAG-NEXT:    v_mul_f32_e32 v1, 0x3f317000, v1
4469; VI-SDAG-NEXT:    v_add_f32_e32 v1, v1, v2
4470; VI-SDAG-NEXT:    v_cmp_lt_f32_e64 s[4:5], |v0|, s4
4471; VI-SDAG-NEXT:    v_cndmask_b32_e64 v0, v0, v1, s[4:5]
4472; VI-SDAG-NEXT:    v_mov_b32_e32 v1, 0x41b17218
4473; VI-SDAG-NEXT:    v_cndmask_b32_e32 v1, 0, v1, vcc
4474; VI-SDAG-NEXT:    v_sub_f32_e32 v0, v0, v1
4475; VI-SDAG-NEXT:    s_setpc_b64 s[30:31]
4476;
4477; VI-GISEL-LABEL: v_log_f32_nnan_dynamic:
4478; VI-GISEL:       ; %bb.0:
4479; VI-GISEL-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
4480; VI-GISEL-NEXT:    v_mov_b32_e32 v1, 0x800000
4481; VI-GISEL-NEXT:    v_cmp_lt_f32_e32 vcc, v0, v1
4482; VI-GISEL-NEXT:    v_cndmask_b32_e64 v1, 0, 1, vcc
4483; VI-GISEL-NEXT:    v_lshlrev_b32_e32 v1, 5, v1
4484; VI-GISEL-NEXT:    v_ldexp_f32 v0, v0, v1
4485; VI-GISEL-NEXT:    v_log_f32_e32 v0, v0
4486; VI-GISEL-NEXT:    v_and_b32_e32 v1, 0xfffff000, v0
4487; VI-GISEL-NEXT:    v_sub_f32_e32 v2, v0, v1
4488; VI-GISEL-NEXT:    v_mul_f32_e32 v3, 0x3805fdf4, v1
4489; VI-GISEL-NEXT:    v_mul_f32_e32 v4, 0x3805fdf4, v2
4490; VI-GISEL-NEXT:    v_add_f32_e32 v3, v3, v4
4491; VI-GISEL-NEXT:    v_mul_f32_e32 v2, 0x3f317000, v2
4492; VI-GISEL-NEXT:    v_add_f32_e32 v2, v2, v3
4493; VI-GISEL-NEXT:    v_mul_f32_e32 v1, 0x3f317000, v1
4494; VI-GISEL-NEXT:    v_add_f32_e32 v1, v1, v2
4495; VI-GISEL-NEXT:    v_mov_b32_e32 v2, 0x7f800000
4496; VI-GISEL-NEXT:    v_cmp_lt_f32_e64 s[4:5], |v0|, v2
4497; VI-GISEL-NEXT:    v_cndmask_b32_e64 v0, v0, v1, s[4:5]
4498; VI-GISEL-NEXT:    v_mov_b32_e32 v1, 0x41b17218
4499; VI-GISEL-NEXT:    v_cndmask_b32_e32 v1, 0, v1, vcc
4500; VI-GISEL-NEXT:    v_sub_f32_e32 v0, v0, v1
4501; VI-GISEL-NEXT:    s_setpc_b64 s[30:31]
4502;
4503; GFX900-SDAG-LABEL: v_log_f32_nnan_dynamic:
4504; GFX900-SDAG:       ; %bb.0:
4505; GFX900-SDAG-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
4506; GFX900-SDAG-NEXT:    s_mov_b32 s4, 0x800000
4507; GFX900-SDAG-NEXT:    v_cmp_gt_f32_e32 vcc, s4, v0
4508; GFX900-SDAG-NEXT:    v_cndmask_b32_e64 v1, 0, 1, vcc
4509; GFX900-SDAG-NEXT:    v_lshlrev_b32_e32 v1, 5, v1
4510; GFX900-SDAG-NEXT:    v_ldexp_f32 v0, v0, v1
4511; GFX900-SDAG-NEXT:    v_log_f32_e32 v0, v0
4512; GFX900-SDAG-NEXT:    s_mov_b32 s4, 0x3f317217
4513; GFX900-SDAG-NEXT:    v_mul_f32_e32 v1, 0x3f317217, v0
4514; GFX900-SDAG-NEXT:    v_fma_f32 v2, v0, s4, -v1
4515; GFX900-SDAG-NEXT:    s_mov_b32 s4, 0x3377d1cf
4516; GFX900-SDAG-NEXT:    v_fma_f32 v2, v0, s4, v2
4517; GFX900-SDAG-NEXT:    s_mov_b32 s4, 0x7f800000
4518; GFX900-SDAG-NEXT:    v_add_f32_e32 v1, v1, v2
4519; GFX900-SDAG-NEXT:    v_cmp_lt_f32_e64 s[4:5], |v0|, s4
4520; GFX900-SDAG-NEXT:    v_cndmask_b32_e64 v0, v0, v1, s[4:5]
4521; GFX900-SDAG-NEXT:    v_mov_b32_e32 v1, 0x41b17218
4522; GFX900-SDAG-NEXT:    v_cndmask_b32_e32 v1, 0, v1, vcc
4523; GFX900-SDAG-NEXT:    v_sub_f32_e32 v0, v0, v1
4524; GFX900-SDAG-NEXT:    s_setpc_b64 s[30:31]
4525;
4526; GFX900-GISEL-LABEL: v_log_f32_nnan_dynamic:
4527; GFX900-GISEL:       ; %bb.0:
4528; GFX900-GISEL-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
4529; GFX900-GISEL-NEXT:    v_mov_b32_e32 v1, 0x800000
4530; GFX900-GISEL-NEXT:    v_cmp_lt_f32_e32 vcc, v0, v1
4531; GFX900-GISEL-NEXT:    v_cndmask_b32_e64 v1, 0, 1, vcc
4532; GFX900-GISEL-NEXT:    v_lshlrev_b32_e32 v1, 5, v1
4533; GFX900-GISEL-NEXT:    v_ldexp_f32 v0, v0, v1
4534; GFX900-GISEL-NEXT:    v_log_f32_e32 v0, v0
4535; GFX900-GISEL-NEXT:    v_mov_b32_e32 v1, 0x3f317217
4536; GFX900-GISEL-NEXT:    v_mov_b32_e32 v3, 0x3377d1cf
4537; GFX900-GISEL-NEXT:    v_mul_f32_e32 v2, 0x3f317217, v0
4538; GFX900-GISEL-NEXT:    v_fma_f32 v1, v0, v1, -v2
4539; GFX900-GISEL-NEXT:    v_fma_f32 v1, v0, v3, v1
4540; GFX900-GISEL-NEXT:    v_add_f32_e32 v1, v2, v1
4541; GFX900-GISEL-NEXT:    v_mov_b32_e32 v2, 0x7f800000
4542; GFX900-GISEL-NEXT:    v_cmp_lt_f32_e64 s[4:5], |v0|, v2
4543; GFX900-GISEL-NEXT:    v_cndmask_b32_e64 v0, v0, v1, s[4:5]
4544; GFX900-GISEL-NEXT:    v_mov_b32_e32 v1, 0x41b17218
4545; GFX900-GISEL-NEXT:    v_cndmask_b32_e32 v1, 0, v1, vcc
4546; GFX900-GISEL-NEXT:    v_sub_f32_e32 v0, v0, v1
4547; GFX900-GISEL-NEXT:    s_setpc_b64 s[30:31]
4548;
4549; GFX1100-SDAG-LABEL: v_log_f32_nnan_dynamic:
4550; GFX1100-SDAG:       ; %bb.0:
4551; GFX1100-SDAG-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
4552; GFX1100-SDAG-NEXT:    v_cmp_gt_f32_e32 vcc_lo, 0x800000, v0
4553; GFX1100-SDAG-NEXT:    v_cndmask_b32_e64 v1, 0, 1, vcc_lo
4554; GFX1100-SDAG-NEXT:    s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
4555; GFX1100-SDAG-NEXT:    v_lshlrev_b32_e32 v1, 5, v1
4556; GFX1100-SDAG-NEXT:    v_ldexp_f32 v0, v0, v1
4557; GFX1100-SDAG-NEXT:    s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_2)
4558; GFX1100-SDAG-NEXT:    v_log_f32_e32 v0, v0
4559; GFX1100-SDAG-NEXT:    s_waitcnt_depctr 0xfff
4560; GFX1100-SDAG-NEXT:    v_mul_f32_e32 v1, 0x3f317217, v0
4561; GFX1100-SDAG-NEXT:    v_cmp_gt_f32_e64 s0, 0x7f800000, |v0|
4562; GFX1100-SDAG-NEXT:    v_fma_f32 v2, 0x3f317217, v0, -v1
4563; GFX1100-SDAG-NEXT:    s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
4564; GFX1100-SDAG-NEXT:    v_fmamk_f32 v2, v0, 0x3377d1cf, v2
4565; GFX1100-SDAG-NEXT:    v_add_f32_e32 v1, v1, v2
4566; GFX1100-SDAG-NEXT:    s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
4567; GFX1100-SDAG-NEXT:    v_cndmask_b32_e64 v0, v0, v1, s0
4568; GFX1100-SDAG-NEXT:    v_cndmask_b32_e64 v1, 0, 0x41b17218, vcc_lo
4569; GFX1100-SDAG-NEXT:    v_sub_f32_e32 v0, v0, v1
4570; GFX1100-SDAG-NEXT:    s_setpc_b64 s[30:31]
4571;
4572; GFX1100-GISEL-LABEL: v_log_f32_nnan_dynamic:
4573; GFX1100-GISEL:       ; %bb.0:
4574; GFX1100-GISEL-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
4575; GFX1100-GISEL-NEXT:    v_cmp_gt_f32_e32 vcc_lo, 0x800000, v0
4576; GFX1100-GISEL-NEXT:    v_cndmask_b32_e64 v1, 0, 1, vcc_lo
4577; GFX1100-GISEL-NEXT:    s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
4578; GFX1100-GISEL-NEXT:    v_lshlrev_b32_e32 v1, 5, v1
4579; GFX1100-GISEL-NEXT:    v_ldexp_f32 v0, v0, v1
4580; GFX1100-GISEL-NEXT:    s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_2)
4581; GFX1100-GISEL-NEXT:    v_log_f32_e32 v0, v0
4582; GFX1100-GISEL-NEXT:    s_waitcnt_depctr 0xfff
4583; GFX1100-GISEL-NEXT:    v_mul_f32_e32 v1, 0x3f317217, v0
4584; GFX1100-GISEL-NEXT:    v_cmp_gt_f32_e64 s0, 0x7f800000, |v0|
4585; GFX1100-GISEL-NEXT:    v_fma_f32 v2, 0x3f317217, v0, -v1
4586; GFX1100-GISEL-NEXT:    s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
4587; GFX1100-GISEL-NEXT:    v_fmac_f32_e32 v2, 0x3377d1cf, v0
4588; GFX1100-GISEL-NEXT:    v_add_f32_e32 v1, v1, v2
4589; GFX1100-GISEL-NEXT:    s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
4590; GFX1100-GISEL-NEXT:    v_cndmask_b32_e64 v0, v0, v1, s0
4591; GFX1100-GISEL-NEXT:    v_cndmask_b32_e64 v1, 0, 0x41b17218, vcc_lo
4592; GFX1100-GISEL-NEXT:    v_sub_f32_e32 v0, v0, v1
4593; GFX1100-GISEL-NEXT:    s_setpc_b64 s[30:31]
4594;
4595; R600-LABEL: v_log_f32_nnan_dynamic:
4596; R600:       ; %bb.0:
4597; R600-NEXT:    CF_END
4598; R600-NEXT:    PAD
4599;
4600; CM-LABEL: v_log_f32_nnan_dynamic:
4601; CM:       ; %bb.0:
4602; CM-NEXT:    CF_END
4603; CM-NEXT:    PAD
4604  %result = call nnan float @llvm.log.f32(float %in)
4605  ret float %result
4606}
4607
4608define float @v_log_f32_ninf_daz(float %in) #0 {
4609; SI-SDAG-LABEL: v_log_f32_ninf_daz:
4610; SI-SDAG:       ; %bb.0:
4611; SI-SDAG-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
4612; SI-SDAG-NEXT:    v_log_f32_e32 v0, v0
4613; SI-SDAG-NEXT:    s_mov_b32 s4, 0x3f317217
4614; SI-SDAG-NEXT:    s_mov_b32 s5, 0x3377d1cf
4615; SI-SDAG-NEXT:    s_mov_b32 s6, 0x7f800000
4616; SI-SDAG-NEXT:    v_mul_f32_e32 v1, 0x3f317217, v0
4617; SI-SDAG-NEXT:    v_fma_f32 v2, v0, s4, -v1
4618; SI-SDAG-NEXT:    v_fma_f32 v2, v0, s5, v2
4619; SI-SDAG-NEXT:    v_add_f32_e32 v1, v1, v2
4620; SI-SDAG-NEXT:    v_cmp_lt_f32_e64 vcc, |v0|, s6
4621; SI-SDAG-NEXT:    v_cndmask_b32_e32 v0, v0, v1, vcc
4622; SI-SDAG-NEXT:    s_setpc_b64 s[30:31]
4623;
4624; SI-GISEL-LABEL: v_log_f32_ninf_daz:
4625; SI-GISEL:       ; %bb.0:
4626; SI-GISEL-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
4627; SI-GISEL-NEXT:    v_log_f32_e32 v0, v0
4628; SI-GISEL-NEXT:    v_mov_b32_e32 v1, 0x3f317217
4629; SI-GISEL-NEXT:    v_mov_b32_e32 v2, 0x3377d1cf
4630; SI-GISEL-NEXT:    v_mov_b32_e32 v3, 0x7f800000
4631; SI-GISEL-NEXT:    v_mul_f32_e32 v4, 0x3f317217, v0
4632; SI-GISEL-NEXT:    v_fma_f32 v1, v0, v1, -v4
4633; SI-GISEL-NEXT:    v_fma_f32 v1, v0, v2, v1
4634; SI-GISEL-NEXT:    v_add_f32_e32 v1, v4, v1
4635; SI-GISEL-NEXT:    v_cmp_lt_f32_e64 vcc, |v0|, v3
4636; SI-GISEL-NEXT:    v_cndmask_b32_e32 v0, v0, v1, vcc
4637; SI-GISEL-NEXT:    s_setpc_b64 s[30:31]
4638;
4639; VI-SDAG-LABEL: v_log_f32_ninf_daz:
4640; VI-SDAG:       ; %bb.0:
4641; VI-SDAG-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
4642; VI-SDAG-NEXT:    v_log_f32_e32 v0, v0
4643; VI-SDAG-NEXT:    s_mov_b32 s4, 0x7f800000
4644; VI-SDAG-NEXT:    v_and_b32_e32 v1, 0xfffff000, v0
4645; VI-SDAG-NEXT:    v_sub_f32_e32 v3, v0, v1
4646; VI-SDAG-NEXT:    v_mul_f32_e32 v2, 0x3805fdf4, v1
4647; VI-SDAG-NEXT:    v_mul_f32_e32 v4, 0x3805fdf4, v3
4648; VI-SDAG-NEXT:    v_mul_f32_e32 v3, 0x3f317000, v3
4649; VI-SDAG-NEXT:    v_add_f32_e32 v2, v2, v4
4650; VI-SDAG-NEXT:    v_mul_f32_e32 v1, 0x3f317000, v1
4651; VI-SDAG-NEXT:    v_add_f32_e32 v2, v3, v2
4652; VI-SDAG-NEXT:    v_add_f32_e32 v1, v1, v2
4653; VI-SDAG-NEXT:    v_cmp_lt_f32_e64 vcc, |v0|, s4
4654; VI-SDAG-NEXT:    v_cndmask_b32_e32 v0, v0, v1, vcc
4655; VI-SDAG-NEXT:    s_setpc_b64 s[30:31]
4656;
4657; VI-GISEL-LABEL: v_log_f32_ninf_daz:
4658; VI-GISEL:       ; %bb.0:
4659; VI-GISEL-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
4660; VI-GISEL-NEXT:    v_log_f32_e32 v0, v0
4661; VI-GISEL-NEXT:    v_and_b32_e32 v1, 0xfffff000, v0
4662; VI-GISEL-NEXT:    v_sub_f32_e32 v2, v0, v1
4663; VI-GISEL-NEXT:    v_mul_f32_e32 v3, 0x3805fdf4, v1
4664; VI-GISEL-NEXT:    v_mul_f32_e32 v4, 0x3805fdf4, v2
4665; VI-GISEL-NEXT:    v_mul_f32_e32 v2, 0x3f317000, v2
4666; VI-GISEL-NEXT:    v_add_f32_e32 v3, v3, v4
4667; VI-GISEL-NEXT:    v_mul_f32_e32 v1, 0x3f317000, v1
4668; VI-GISEL-NEXT:    v_add_f32_e32 v2, v2, v3
4669; VI-GISEL-NEXT:    v_add_f32_e32 v1, v1, v2
4670; VI-GISEL-NEXT:    v_mov_b32_e32 v2, 0x7f800000
4671; VI-GISEL-NEXT:    v_cmp_lt_f32_e64 vcc, |v0|, v2
4672; VI-GISEL-NEXT:    v_cndmask_b32_e32 v0, v0, v1, vcc
4673; VI-GISEL-NEXT:    s_setpc_b64 s[30:31]
4674;
4675; GFX900-SDAG-LABEL: v_log_f32_ninf_daz:
4676; GFX900-SDAG:       ; %bb.0:
4677; GFX900-SDAG-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
4678; GFX900-SDAG-NEXT:    v_log_f32_e32 v0, v0
4679; GFX900-SDAG-NEXT:    s_mov_b32 s4, 0x3f317217
4680; GFX900-SDAG-NEXT:    s_mov_b32 s5, 0x3377d1cf
4681; GFX900-SDAG-NEXT:    s_mov_b32 s6, 0x7f800000
4682; GFX900-SDAG-NEXT:    v_mul_f32_e32 v1, 0x3f317217, v0
4683; GFX900-SDAG-NEXT:    v_fma_f32 v2, v0, s4, -v1
4684; GFX900-SDAG-NEXT:    v_fma_f32 v2, v0, s5, v2
4685; GFX900-SDAG-NEXT:    v_add_f32_e32 v1, v1, v2
4686; GFX900-SDAG-NEXT:    v_cmp_lt_f32_e64 vcc, |v0|, s6
4687; GFX900-SDAG-NEXT:    v_cndmask_b32_e32 v0, v0, v1, vcc
4688; GFX900-SDAG-NEXT:    s_setpc_b64 s[30:31]
4689;
4690; GFX900-GISEL-LABEL: v_log_f32_ninf_daz:
4691; GFX900-GISEL:       ; %bb.0:
4692; GFX900-GISEL-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
4693; GFX900-GISEL-NEXT:    v_log_f32_e32 v0, v0
4694; GFX900-GISEL-NEXT:    v_mov_b32_e32 v1, 0x3f317217
4695; GFX900-GISEL-NEXT:    v_mov_b32_e32 v2, 0x3377d1cf
4696; GFX900-GISEL-NEXT:    v_mov_b32_e32 v3, 0x7f800000
4697; GFX900-GISEL-NEXT:    v_mul_f32_e32 v4, 0x3f317217, v0
4698; GFX900-GISEL-NEXT:    v_fma_f32 v1, v0, v1, -v4
4699; GFX900-GISEL-NEXT:    v_fma_f32 v1, v0, v2, v1
4700; GFX900-GISEL-NEXT:    v_add_f32_e32 v1, v4, v1
4701; GFX900-GISEL-NEXT:    v_cmp_lt_f32_e64 vcc, |v0|, v3
4702; GFX900-GISEL-NEXT:    v_cndmask_b32_e32 v0, v0, v1, vcc
4703; GFX900-GISEL-NEXT:    s_setpc_b64 s[30:31]
4704;
4705; GFX1100-SDAG-LABEL: v_log_f32_ninf_daz:
4706; GFX1100-SDAG:       ; %bb.0:
4707; GFX1100-SDAG-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
4708; GFX1100-SDAG-NEXT:    v_log_f32_e32 v0, v0
4709; GFX1100-SDAG-NEXT:    s_waitcnt_depctr 0xfff
4710; GFX1100-SDAG-NEXT:    v_mul_f32_e32 v1, 0x3f317217, v0
4711; GFX1100-SDAG-NEXT:    v_cmp_gt_f32_e64 vcc_lo, 0x7f800000, |v0|
4712; GFX1100-SDAG-NEXT:    s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
4713; GFX1100-SDAG-NEXT:    v_fma_f32 v2, 0x3f317217, v0, -v1
4714; GFX1100-SDAG-NEXT:    v_fmamk_f32 v2, v0, 0x3377d1cf, v2
4715; GFX1100-SDAG-NEXT:    s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
4716; GFX1100-SDAG-NEXT:    v_add_f32_e32 v1, v1, v2
4717; GFX1100-SDAG-NEXT:    v_cndmask_b32_e32 v0, v0, v1, vcc_lo
4718; GFX1100-SDAG-NEXT:    s_setpc_b64 s[30:31]
4719;
4720; GFX1100-GISEL-LABEL: v_log_f32_ninf_daz:
4721; GFX1100-GISEL:       ; %bb.0:
4722; GFX1100-GISEL-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
4723; GFX1100-GISEL-NEXT:    v_log_f32_e32 v0, v0
4724; GFX1100-GISEL-NEXT:    s_waitcnt_depctr 0xfff
4725; GFX1100-GISEL-NEXT:    v_mul_f32_e32 v1, 0x3f317217, v0
4726; GFX1100-GISEL-NEXT:    v_cmp_gt_f32_e64 vcc_lo, 0x7f800000, |v0|
4727; GFX1100-GISEL-NEXT:    s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
4728; GFX1100-GISEL-NEXT:    v_fma_f32 v2, 0x3f317217, v0, -v1
4729; GFX1100-GISEL-NEXT:    v_fmac_f32_e32 v2, 0x3377d1cf, v0
4730; GFX1100-GISEL-NEXT:    s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
4731; GFX1100-GISEL-NEXT:    v_add_f32_e32 v1, v1, v2
4732; GFX1100-GISEL-NEXT:    v_cndmask_b32_e32 v0, v0, v1, vcc_lo
4733; GFX1100-GISEL-NEXT:    s_setpc_b64 s[30:31]
4734;
4735; R600-LABEL: v_log_f32_ninf_daz:
4736; R600:       ; %bb.0:
4737; R600-NEXT:    CF_END
4738; R600-NEXT:    PAD
4739;
4740; CM-LABEL: v_log_f32_ninf_daz:
4741; CM:       ; %bb.0:
4742; CM-NEXT:    CF_END
4743; CM-NEXT:    PAD
4744  %result = call ninf float @llvm.log.f32(float %in)
4745  ret float %result
4746}
4747
4748define float @v_log_f32_ninf_dynamic(float %in) #1 {
4749; SI-SDAG-LABEL: v_log_f32_ninf_dynamic:
4750; SI-SDAG:       ; %bb.0:
4751; SI-SDAG-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
4752; SI-SDAG-NEXT:    s_mov_b32 s4, 0x800000
4753; SI-SDAG-NEXT:    v_cmp_gt_f32_e32 vcc, s4, v0
4754; SI-SDAG-NEXT:    v_cndmask_b32_e64 v1, 0, 1, vcc
4755; SI-SDAG-NEXT:    v_lshlrev_b32_e32 v1, 5, v1
4756; SI-SDAG-NEXT:    v_ldexp_f32_e32 v0, v0, v1
4757; SI-SDAG-NEXT:    v_log_f32_e32 v0, v0
4758; SI-SDAG-NEXT:    s_mov_b32 s4, 0x3f317217
4759; SI-SDAG-NEXT:    v_mul_f32_e32 v1, 0x3f317217, v0
4760; SI-SDAG-NEXT:    v_fma_f32 v2, v0, s4, -v1
4761; SI-SDAG-NEXT:    s_mov_b32 s4, 0x3377d1cf
4762; SI-SDAG-NEXT:    v_fma_f32 v2, v0, s4, v2
4763; SI-SDAG-NEXT:    s_mov_b32 s4, 0x7f800000
4764; SI-SDAG-NEXT:    v_add_f32_e32 v1, v1, v2
4765; SI-SDAG-NEXT:    v_cmp_lt_f32_e64 s[4:5], |v0|, s4
4766; SI-SDAG-NEXT:    v_cndmask_b32_e64 v0, v0, v1, s[4:5]
4767; SI-SDAG-NEXT:    v_mov_b32_e32 v1, 0x41b17218
4768; SI-SDAG-NEXT:    v_cndmask_b32_e32 v1, 0, v1, vcc
4769; SI-SDAG-NEXT:    v_sub_f32_e32 v0, v0, v1
4770; SI-SDAG-NEXT:    s_setpc_b64 s[30:31]
4771;
4772; SI-GISEL-LABEL: v_log_f32_ninf_dynamic:
4773; SI-GISEL:       ; %bb.0:
4774; SI-GISEL-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
4775; SI-GISEL-NEXT:    v_mov_b32_e32 v1, 0x800000
4776; SI-GISEL-NEXT:    v_cmp_lt_f32_e32 vcc, v0, v1
4777; SI-GISEL-NEXT:    v_cndmask_b32_e64 v1, 0, 1, vcc
4778; SI-GISEL-NEXT:    v_lshlrev_b32_e32 v1, 5, v1
4779; SI-GISEL-NEXT:    v_ldexp_f32_e32 v0, v0, v1
4780; SI-GISEL-NEXT:    v_log_f32_e32 v0, v0
4781; SI-GISEL-NEXT:    v_mov_b32_e32 v1, 0x3f317217
4782; SI-GISEL-NEXT:    v_mov_b32_e32 v3, 0x3377d1cf
4783; SI-GISEL-NEXT:    v_mul_f32_e32 v2, 0x3f317217, v0
4784; SI-GISEL-NEXT:    v_fma_f32 v1, v0, v1, -v2
4785; SI-GISEL-NEXT:    v_fma_f32 v1, v0, v3, v1
4786; SI-GISEL-NEXT:    v_add_f32_e32 v1, v2, v1
4787; SI-GISEL-NEXT:    v_mov_b32_e32 v2, 0x7f800000
4788; SI-GISEL-NEXT:    v_cmp_lt_f32_e64 s[4:5], |v0|, v2
4789; SI-GISEL-NEXT:    v_cndmask_b32_e64 v0, v0, v1, s[4:5]
4790; SI-GISEL-NEXT:    v_mov_b32_e32 v1, 0x41b17218
4791; SI-GISEL-NEXT:    v_cndmask_b32_e32 v1, 0, v1, vcc
4792; SI-GISEL-NEXT:    v_sub_f32_e32 v0, v0, v1
4793; SI-GISEL-NEXT:    s_setpc_b64 s[30:31]
4794;
4795; VI-SDAG-LABEL: v_log_f32_ninf_dynamic:
4796; VI-SDAG:       ; %bb.0:
4797; VI-SDAG-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
4798; VI-SDAG-NEXT:    s_mov_b32 s4, 0x800000
4799; VI-SDAG-NEXT:    v_cmp_gt_f32_e32 vcc, s4, v0
4800; VI-SDAG-NEXT:    v_cndmask_b32_e64 v1, 0, 1, vcc
4801; VI-SDAG-NEXT:    v_lshlrev_b32_e32 v1, 5, v1
4802; VI-SDAG-NEXT:    v_ldexp_f32 v0, v0, v1
4803; VI-SDAG-NEXT:    v_log_f32_e32 v0, v0
4804; VI-SDAG-NEXT:    s_mov_b32 s4, 0x7f800000
4805; VI-SDAG-NEXT:    v_and_b32_e32 v1, 0xfffff000, v0
4806; VI-SDAG-NEXT:    v_sub_f32_e32 v2, v0, v1
4807; VI-SDAG-NEXT:    v_mul_f32_e32 v3, 0x3f317000, v2
4808; VI-SDAG-NEXT:    v_mul_f32_e32 v2, 0x3805fdf4, v2
4809; VI-SDAG-NEXT:    v_mul_f32_e32 v4, 0x3805fdf4, v1
4810; VI-SDAG-NEXT:    v_add_f32_e32 v2, v4, v2
4811; VI-SDAG-NEXT:    v_add_f32_e32 v2, v3, v2
4812; VI-SDAG-NEXT:    v_mul_f32_e32 v1, 0x3f317000, v1
4813; VI-SDAG-NEXT:    v_add_f32_e32 v1, v1, v2
4814; VI-SDAG-NEXT:    v_cmp_lt_f32_e64 s[4:5], |v0|, s4
4815; VI-SDAG-NEXT:    v_cndmask_b32_e64 v0, v0, v1, s[4:5]
4816; VI-SDAG-NEXT:    v_mov_b32_e32 v1, 0x41b17218
4817; VI-SDAG-NEXT:    v_cndmask_b32_e32 v1, 0, v1, vcc
4818; VI-SDAG-NEXT:    v_sub_f32_e32 v0, v0, v1
4819; VI-SDAG-NEXT:    s_setpc_b64 s[30:31]
4820;
4821; VI-GISEL-LABEL: v_log_f32_ninf_dynamic:
4822; VI-GISEL:       ; %bb.0:
4823; VI-GISEL-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
4824; VI-GISEL-NEXT:    v_mov_b32_e32 v1, 0x800000
4825; VI-GISEL-NEXT:    v_cmp_lt_f32_e32 vcc, v0, v1
4826; VI-GISEL-NEXT:    v_cndmask_b32_e64 v1, 0, 1, vcc
4827; VI-GISEL-NEXT:    v_lshlrev_b32_e32 v1, 5, v1
4828; VI-GISEL-NEXT:    v_ldexp_f32 v0, v0, v1
4829; VI-GISEL-NEXT:    v_log_f32_e32 v0, v0
4830; VI-GISEL-NEXT:    v_and_b32_e32 v1, 0xfffff000, v0
4831; VI-GISEL-NEXT:    v_sub_f32_e32 v2, v0, v1
4832; VI-GISEL-NEXT:    v_mul_f32_e32 v3, 0x3805fdf4, v1
4833; VI-GISEL-NEXT:    v_mul_f32_e32 v4, 0x3805fdf4, v2
4834; VI-GISEL-NEXT:    v_add_f32_e32 v3, v3, v4
4835; VI-GISEL-NEXT:    v_mul_f32_e32 v2, 0x3f317000, v2
4836; VI-GISEL-NEXT:    v_add_f32_e32 v2, v2, v3
4837; VI-GISEL-NEXT:    v_mul_f32_e32 v1, 0x3f317000, v1
4838; VI-GISEL-NEXT:    v_add_f32_e32 v1, v1, v2
4839; VI-GISEL-NEXT:    v_mov_b32_e32 v2, 0x7f800000
4840; VI-GISEL-NEXT:    v_cmp_lt_f32_e64 s[4:5], |v0|, v2
4841; VI-GISEL-NEXT:    v_cndmask_b32_e64 v0, v0, v1, s[4:5]
4842; VI-GISEL-NEXT:    v_mov_b32_e32 v1, 0x41b17218
4843; VI-GISEL-NEXT:    v_cndmask_b32_e32 v1, 0, v1, vcc
4844; VI-GISEL-NEXT:    v_sub_f32_e32 v0, v0, v1
4845; VI-GISEL-NEXT:    s_setpc_b64 s[30:31]
4846;
4847; GFX900-SDAG-LABEL: v_log_f32_ninf_dynamic:
4848; GFX900-SDAG:       ; %bb.0:
4849; GFX900-SDAG-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
4850; GFX900-SDAG-NEXT:    s_mov_b32 s4, 0x800000
4851; GFX900-SDAG-NEXT:    v_cmp_gt_f32_e32 vcc, s4, v0
4852; GFX900-SDAG-NEXT:    v_cndmask_b32_e64 v1, 0, 1, vcc
4853; GFX900-SDAG-NEXT:    v_lshlrev_b32_e32 v1, 5, v1
4854; GFX900-SDAG-NEXT:    v_ldexp_f32 v0, v0, v1
4855; GFX900-SDAG-NEXT:    v_log_f32_e32 v0, v0
4856; GFX900-SDAG-NEXT:    s_mov_b32 s4, 0x3f317217
4857; GFX900-SDAG-NEXT:    v_mul_f32_e32 v1, 0x3f317217, v0
4858; GFX900-SDAG-NEXT:    v_fma_f32 v2, v0, s4, -v1
4859; GFX900-SDAG-NEXT:    s_mov_b32 s4, 0x3377d1cf
4860; GFX900-SDAG-NEXT:    v_fma_f32 v2, v0, s4, v2
4861; GFX900-SDAG-NEXT:    s_mov_b32 s4, 0x7f800000
4862; GFX900-SDAG-NEXT:    v_add_f32_e32 v1, v1, v2
4863; GFX900-SDAG-NEXT:    v_cmp_lt_f32_e64 s[4:5], |v0|, s4
4864; GFX900-SDAG-NEXT:    v_cndmask_b32_e64 v0, v0, v1, s[4:5]
4865; GFX900-SDAG-NEXT:    v_mov_b32_e32 v1, 0x41b17218
4866; GFX900-SDAG-NEXT:    v_cndmask_b32_e32 v1, 0, v1, vcc
4867; GFX900-SDAG-NEXT:    v_sub_f32_e32 v0, v0, v1
4868; GFX900-SDAG-NEXT:    s_setpc_b64 s[30:31]
4869;
4870; GFX900-GISEL-LABEL: v_log_f32_ninf_dynamic:
4871; GFX900-GISEL:       ; %bb.0:
4872; GFX900-GISEL-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
4873; GFX900-GISEL-NEXT:    v_mov_b32_e32 v1, 0x800000
4874; GFX900-GISEL-NEXT:    v_cmp_lt_f32_e32 vcc, v0, v1
4875; GFX900-GISEL-NEXT:    v_cndmask_b32_e64 v1, 0, 1, vcc
4876; GFX900-GISEL-NEXT:    v_lshlrev_b32_e32 v1, 5, v1
4877; GFX900-GISEL-NEXT:    v_ldexp_f32 v0, v0, v1
4878; GFX900-GISEL-NEXT:    v_log_f32_e32 v0, v0
4879; GFX900-GISEL-NEXT:    v_mov_b32_e32 v1, 0x3f317217
4880; GFX900-GISEL-NEXT:    v_mov_b32_e32 v3, 0x3377d1cf
4881; GFX900-GISEL-NEXT:    v_mul_f32_e32 v2, 0x3f317217, v0
4882; GFX900-GISEL-NEXT:    v_fma_f32 v1, v0, v1, -v2
4883; GFX900-GISEL-NEXT:    v_fma_f32 v1, v0, v3, v1
4884; GFX900-GISEL-NEXT:    v_add_f32_e32 v1, v2, v1
4885; GFX900-GISEL-NEXT:    v_mov_b32_e32 v2, 0x7f800000
4886; GFX900-GISEL-NEXT:    v_cmp_lt_f32_e64 s[4:5], |v0|, v2
4887; GFX900-GISEL-NEXT:    v_cndmask_b32_e64 v0, v0, v1, s[4:5]
4888; GFX900-GISEL-NEXT:    v_mov_b32_e32 v1, 0x41b17218
4889; GFX900-GISEL-NEXT:    v_cndmask_b32_e32 v1, 0, v1, vcc
4890; GFX900-GISEL-NEXT:    v_sub_f32_e32 v0, v0, v1
4891; GFX900-GISEL-NEXT:    s_setpc_b64 s[30:31]
4892;
4893; GFX1100-SDAG-LABEL: v_log_f32_ninf_dynamic:
4894; GFX1100-SDAG:       ; %bb.0:
4895; GFX1100-SDAG-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
4896; GFX1100-SDAG-NEXT:    v_cmp_gt_f32_e32 vcc_lo, 0x800000, v0
4897; GFX1100-SDAG-NEXT:    v_cndmask_b32_e64 v1, 0, 1, vcc_lo
4898; GFX1100-SDAG-NEXT:    s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
4899; GFX1100-SDAG-NEXT:    v_lshlrev_b32_e32 v1, 5, v1
4900; GFX1100-SDAG-NEXT:    v_ldexp_f32 v0, v0, v1
4901; GFX1100-SDAG-NEXT:    s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_2)
4902; GFX1100-SDAG-NEXT:    v_log_f32_e32 v0, v0
4903; GFX1100-SDAG-NEXT:    s_waitcnt_depctr 0xfff
4904; GFX1100-SDAG-NEXT:    v_mul_f32_e32 v1, 0x3f317217, v0
4905; GFX1100-SDAG-NEXT:    v_cmp_gt_f32_e64 s0, 0x7f800000, |v0|
4906; GFX1100-SDAG-NEXT:    v_fma_f32 v2, 0x3f317217, v0, -v1
4907; GFX1100-SDAG-NEXT:    s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
4908; GFX1100-SDAG-NEXT:    v_fmamk_f32 v2, v0, 0x3377d1cf, v2
4909; GFX1100-SDAG-NEXT:    v_add_f32_e32 v1, v1, v2
4910; GFX1100-SDAG-NEXT:    s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
4911; GFX1100-SDAG-NEXT:    v_cndmask_b32_e64 v0, v0, v1, s0
4912; GFX1100-SDAG-NEXT:    v_cndmask_b32_e64 v1, 0, 0x41b17218, vcc_lo
4913; GFX1100-SDAG-NEXT:    v_sub_f32_e32 v0, v0, v1
4914; GFX1100-SDAG-NEXT:    s_setpc_b64 s[30:31]
4915;
4916; GFX1100-GISEL-LABEL: v_log_f32_ninf_dynamic:
4917; GFX1100-GISEL:       ; %bb.0:
4918; GFX1100-GISEL-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
4919; GFX1100-GISEL-NEXT:    v_cmp_gt_f32_e32 vcc_lo, 0x800000, v0
4920; GFX1100-GISEL-NEXT:    v_cndmask_b32_e64 v1, 0, 1, vcc_lo
4921; GFX1100-GISEL-NEXT:    s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
4922; GFX1100-GISEL-NEXT:    v_lshlrev_b32_e32 v1, 5, v1
4923; GFX1100-GISEL-NEXT:    v_ldexp_f32 v0, v0, v1
4924; GFX1100-GISEL-NEXT:    s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_2)
4925; GFX1100-GISEL-NEXT:    v_log_f32_e32 v0, v0
4926; GFX1100-GISEL-NEXT:    s_waitcnt_depctr 0xfff
4927; GFX1100-GISEL-NEXT:    v_mul_f32_e32 v1, 0x3f317217, v0
4928; GFX1100-GISEL-NEXT:    v_cmp_gt_f32_e64 s0, 0x7f800000, |v0|
4929; GFX1100-GISEL-NEXT:    v_fma_f32 v2, 0x3f317217, v0, -v1
4930; GFX1100-GISEL-NEXT:    s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
4931; GFX1100-GISEL-NEXT:    v_fmac_f32_e32 v2, 0x3377d1cf, v0
4932; GFX1100-GISEL-NEXT:    v_add_f32_e32 v1, v1, v2
4933; GFX1100-GISEL-NEXT:    s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
4934; GFX1100-GISEL-NEXT:    v_cndmask_b32_e64 v0, v0, v1, s0
4935; GFX1100-GISEL-NEXT:    v_cndmask_b32_e64 v1, 0, 0x41b17218, vcc_lo
4936; GFX1100-GISEL-NEXT:    v_sub_f32_e32 v0, v0, v1
4937; GFX1100-GISEL-NEXT:    s_setpc_b64 s[30:31]
4938;
4939; R600-LABEL: v_log_f32_ninf_dynamic:
4940; R600:       ; %bb.0:
4941; R600-NEXT:    CF_END
4942; R600-NEXT:    PAD
4943;
4944; CM-LABEL: v_log_f32_ninf_dynamic:
4945; CM:       ; %bb.0:
4946; CM-NEXT:    CF_END
4947; CM-NEXT:    PAD
4948  %result = call ninf float @llvm.log.f32(float %in)
4949  ret float %result
4950}
4951
4952define float @v_log_f32_nnan_ninf(float %in) {
4953; SI-SDAG-LABEL: v_log_f32_nnan_ninf:
4954; SI-SDAG:       ; %bb.0:
4955; SI-SDAG-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
4956; SI-SDAG-NEXT:    s_mov_b32 s4, 0x800000
4957; SI-SDAG-NEXT:    v_cmp_gt_f32_e32 vcc, s4, v0
4958; SI-SDAG-NEXT:    v_cndmask_b32_e64 v1, 0, 1, vcc
4959; SI-SDAG-NEXT:    v_lshlrev_b32_e32 v1, 5, v1
4960; SI-SDAG-NEXT:    v_ldexp_f32_e32 v0, v0, v1
4961; SI-SDAG-NEXT:    v_log_f32_e32 v0, v0
4962; SI-SDAG-NEXT:    s_mov_b32 s4, 0x3f317217
4963; SI-SDAG-NEXT:    v_mul_f32_e32 v1, 0x3f317217, v0
4964; SI-SDAG-NEXT:    v_fma_f32 v2, v0, s4, -v1
4965; SI-SDAG-NEXT:    s_mov_b32 s4, 0x3377d1cf
4966; SI-SDAG-NEXT:    v_fma_f32 v0, v0, s4, v2
4967; SI-SDAG-NEXT:    v_add_f32_e32 v0, v1, v0
4968; SI-SDAG-NEXT:    v_mov_b32_e32 v1, 0x41b17218
4969; SI-SDAG-NEXT:    v_cndmask_b32_e32 v1, 0, v1, vcc
4970; SI-SDAG-NEXT:    v_sub_f32_e32 v0, v0, v1
4971; SI-SDAG-NEXT:    s_setpc_b64 s[30:31]
4972;
4973; SI-GISEL-LABEL: v_log_f32_nnan_ninf:
4974; SI-GISEL:       ; %bb.0:
4975; SI-GISEL-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
4976; SI-GISEL-NEXT:    v_mov_b32_e32 v1, 0x800000
4977; SI-GISEL-NEXT:    v_cmp_lt_f32_e32 vcc, v0, v1
4978; SI-GISEL-NEXT:    v_cndmask_b32_e64 v1, 0, 1, vcc
4979; SI-GISEL-NEXT:    v_lshlrev_b32_e32 v1, 5, v1
4980; SI-GISEL-NEXT:    v_ldexp_f32_e32 v0, v0, v1
4981; SI-GISEL-NEXT:    v_log_f32_e32 v0, v0
4982; SI-GISEL-NEXT:    v_mov_b32_e32 v1, 0x3f317217
4983; SI-GISEL-NEXT:    v_mov_b32_e32 v3, 0x3377d1cf
4984; SI-GISEL-NEXT:    v_mul_f32_e32 v2, 0x3f317217, v0
4985; SI-GISEL-NEXT:    v_fma_f32 v1, v0, v1, -v2
4986; SI-GISEL-NEXT:    v_fma_f32 v0, v0, v3, v1
4987; SI-GISEL-NEXT:    v_mov_b32_e32 v1, 0x41b17218
4988; SI-GISEL-NEXT:    v_add_f32_e32 v0, v2, v0
4989; SI-GISEL-NEXT:    v_cndmask_b32_e32 v1, 0, v1, vcc
4990; SI-GISEL-NEXT:    v_sub_f32_e32 v0, v0, v1
4991; SI-GISEL-NEXT:    s_setpc_b64 s[30:31]
4992;
4993; VI-SDAG-LABEL: v_log_f32_nnan_ninf:
4994; VI-SDAG:       ; %bb.0:
4995; VI-SDAG-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
4996; VI-SDAG-NEXT:    s_mov_b32 s4, 0x800000
4997; VI-SDAG-NEXT:    v_cmp_gt_f32_e32 vcc, s4, v0
4998; VI-SDAG-NEXT:    v_cndmask_b32_e64 v1, 0, 1, vcc
4999; VI-SDAG-NEXT:    v_lshlrev_b32_e32 v1, 5, v1
5000; VI-SDAG-NEXT:    v_ldexp_f32 v0, v0, v1
5001; VI-SDAG-NEXT:    v_log_f32_e32 v0, v0
5002; VI-SDAG-NEXT:    v_and_b32_e32 v1, 0xfffff000, v0
5003; VI-SDAG-NEXT:    v_sub_f32_e32 v0, v0, v1
5004; VI-SDAG-NEXT:    v_mul_f32_e32 v2, 0x3f317000, v0
5005; VI-SDAG-NEXT:    v_mul_f32_e32 v0, 0x3805fdf4, v0
5006; VI-SDAG-NEXT:    v_mul_f32_e32 v3, 0x3805fdf4, v1
5007; VI-SDAG-NEXT:    v_add_f32_e32 v0, v3, v0
5008; VI-SDAG-NEXT:    v_add_f32_e32 v0, v2, v0
5009; VI-SDAG-NEXT:    v_mul_f32_e32 v1, 0x3f317000, v1
5010; VI-SDAG-NEXT:    v_add_f32_e32 v0, v1, v0
5011; VI-SDAG-NEXT:    v_mov_b32_e32 v1, 0x41b17218
5012; VI-SDAG-NEXT:    v_cndmask_b32_e32 v1, 0, v1, vcc
5013; VI-SDAG-NEXT:    v_sub_f32_e32 v0, v0, v1
5014; VI-SDAG-NEXT:    s_setpc_b64 s[30:31]
5015;
5016; VI-GISEL-LABEL: v_log_f32_nnan_ninf:
5017; VI-GISEL:       ; %bb.0:
5018; VI-GISEL-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
5019; VI-GISEL-NEXT:    v_mov_b32_e32 v1, 0x800000
5020; VI-GISEL-NEXT:    v_cmp_lt_f32_e32 vcc, v0, v1
5021; VI-GISEL-NEXT:    v_cndmask_b32_e64 v1, 0, 1, vcc
5022; VI-GISEL-NEXT:    v_lshlrev_b32_e32 v1, 5, v1
5023; VI-GISEL-NEXT:    v_ldexp_f32 v0, v0, v1
5024; VI-GISEL-NEXT:    v_log_f32_e32 v0, v0
5025; VI-GISEL-NEXT:    v_and_b32_e32 v1, 0xfffff000, v0
5026; VI-GISEL-NEXT:    v_sub_f32_e32 v0, v0, v1
5027; VI-GISEL-NEXT:    v_mul_f32_e32 v2, 0x3805fdf4, v1
5028; VI-GISEL-NEXT:    v_mul_f32_e32 v3, 0x3805fdf4, v0
5029; VI-GISEL-NEXT:    v_add_f32_e32 v2, v2, v3
5030; VI-GISEL-NEXT:    v_mul_f32_e32 v0, 0x3f317000, v0
5031; VI-GISEL-NEXT:    v_add_f32_e32 v0, v0, v2
5032; VI-GISEL-NEXT:    v_mul_f32_e32 v1, 0x3f317000, v1
5033; VI-GISEL-NEXT:    v_add_f32_e32 v0, v1, v0
5034; VI-GISEL-NEXT:    v_mov_b32_e32 v1, 0x41b17218
5035; VI-GISEL-NEXT:    v_cndmask_b32_e32 v1, 0, v1, vcc
5036; VI-GISEL-NEXT:    v_sub_f32_e32 v0, v0, v1
5037; VI-GISEL-NEXT:    s_setpc_b64 s[30:31]
5038;
5039; GFX900-SDAG-LABEL: v_log_f32_nnan_ninf:
5040; GFX900-SDAG:       ; %bb.0:
5041; GFX900-SDAG-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
5042; GFX900-SDAG-NEXT:    s_mov_b32 s4, 0x800000
5043; GFX900-SDAG-NEXT:    v_cmp_gt_f32_e32 vcc, s4, v0
5044; GFX900-SDAG-NEXT:    v_cndmask_b32_e64 v1, 0, 1, vcc
5045; GFX900-SDAG-NEXT:    v_lshlrev_b32_e32 v1, 5, v1
5046; GFX900-SDAG-NEXT:    v_ldexp_f32 v0, v0, v1
5047; GFX900-SDAG-NEXT:    v_log_f32_e32 v0, v0
5048; GFX900-SDAG-NEXT:    s_mov_b32 s4, 0x3f317217
5049; GFX900-SDAG-NEXT:    v_mul_f32_e32 v1, 0x3f317217, v0
5050; GFX900-SDAG-NEXT:    v_fma_f32 v2, v0, s4, -v1
5051; GFX900-SDAG-NEXT:    s_mov_b32 s4, 0x3377d1cf
5052; GFX900-SDAG-NEXT:    v_fma_f32 v0, v0, s4, v2
5053; GFX900-SDAG-NEXT:    v_add_f32_e32 v0, v1, v0
5054; GFX900-SDAG-NEXT:    v_mov_b32_e32 v1, 0x41b17218
5055; GFX900-SDAG-NEXT:    v_cndmask_b32_e32 v1, 0, v1, vcc
5056; GFX900-SDAG-NEXT:    v_sub_f32_e32 v0, v0, v1
5057; GFX900-SDAG-NEXT:    s_setpc_b64 s[30:31]
5058;
5059; GFX900-GISEL-LABEL: v_log_f32_nnan_ninf:
5060; GFX900-GISEL:       ; %bb.0:
5061; GFX900-GISEL-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
5062; GFX900-GISEL-NEXT:    v_mov_b32_e32 v1, 0x800000
5063; GFX900-GISEL-NEXT:    v_cmp_lt_f32_e32 vcc, v0, v1
5064; GFX900-GISEL-NEXT:    v_cndmask_b32_e64 v1, 0, 1, vcc
5065; GFX900-GISEL-NEXT:    v_lshlrev_b32_e32 v1, 5, v1
5066; GFX900-GISEL-NEXT:    v_ldexp_f32 v0, v0, v1
5067; GFX900-GISEL-NEXT:    v_log_f32_e32 v0, v0
5068; GFX900-GISEL-NEXT:    v_mov_b32_e32 v1, 0x3f317217
5069; GFX900-GISEL-NEXT:    v_mov_b32_e32 v3, 0x3377d1cf
5070; GFX900-GISEL-NEXT:    v_mul_f32_e32 v2, 0x3f317217, v0
5071; GFX900-GISEL-NEXT:    v_fma_f32 v1, v0, v1, -v2
5072; GFX900-GISEL-NEXT:    v_fma_f32 v0, v0, v3, v1
5073; GFX900-GISEL-NEXT:    v_mov_b32_e32 v1, 0x41b17218
5074; GFX900-GISEL-NEXT:    v_add_f32_e32 v0, v2, v0
5075; GFX900-GISEL-NEXT:    v_cndmask_b32_e32 v1, 0, v1, vcc
5076; GFX900-GISEL-NEXT:    v_sub_f32_e32 v0, v0, v1
5077; GFX900-GISEL-NEXT:    s_setpc_b64 s[30:31]
5078;
5079; GFX1100-SDAG-LABEL: v_log_f32_nnan_ninf:
5080; GFX1100-SDAG:       ; %bb.0:
5081; GFX1100-SDAG-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
5082; GFX1100-SDAG-NEXT:    v_cmp_gt_f32_e32 vcc_lo, 0x800000, v0
5083; GFX1100-SDAG-NEXT:    v_cndmask_b32_e64 v1, 0, 1, vcc_lo
5084; GFX1100-SDAG-NEXT:    s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
5085; GFX1100-SDAG-NEXT:    v_lshlrev_b32_e32 v1, 5, v1
5086; GFX1100-SDAG-NEXT:    v_ldexp_f32 v0, v0, v1
5087; GFX1100-SDAG-NEXT:    s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)
5088; GFX1100-SDAG-NEXT:    v_log_f32_e32 v0, v0
5089; GFX1100-SDAG-NEXT:    s_waitcnt_depctr 0xfff
5090; GFX1100-SDAG-NEXT:    v_mul_f32_e32 v1, 0x3f317217, v0
5091; GFX1100-SDAG-NEXT:    v_fma_f32 v2, 0x3f317217, v0, -v1
5092; GFX1100-SDAG-NEXT:    s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
5093; GFX1100-SDAG-NEXT:    v_fmamk_f32 v0, v0, 0x3377d1cf, v2
5094; GFX1100-SDAG-NEXT:    v_add_f32_e32 v0, v1, v0
5095; GFX1100-SDAG-NEXT:    v_cndmask_b32_e64 v1, 0, 0x41b17218, vcc_lo
5096; GFX1100-SDAG-NEXT:    s_delay_alu instid0(VALU_DEP_1)
5097; GFX1100-SDAG-NEXT:    v_sub_f32_e32 v0, v0, v1
5098; GFX1100-SDAG-NEXT:    s_setpc_b64 s[30:31]
5099;
5100; GFX1100-GISEL-LABEL: v_log_f32_nnan_ninf:
5101; GFX1100-GISEL:       ; %bb.0:
5102; GFX1100-GISEL-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
5103; GFX1100-GISEL-NEXT:    v_cmp_gt_f32_e32 vcc_lo, 0x800000, v0
5104; GFX1100-GISEL-NEXT:    v_cndmask_b32_e64 v1, 0, 1, vcc_lo
5105; GFX1100-GISEL-NEXT:    s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
5106; GFX1100-GISEL-NEXT:    v_lshlrev_b32_e32 v1, 5, v1
5107; GFX1100-GISEL-NEXT:    v_ldexp_f32 v0, v0, v1
5108; GFX1100-GISEL-NEXT:    s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)
5109; GFX1100-GISEL-NEXT:    v_log_f32_e32 v0, v0
5110; GFX1100-GISEL-NEXT:    s_waitcnt_depctr 0xfff
5111; GFX1100-GISEL-NEXT:    v_mul_f32_e32 v1, 0x3f317217, v0
5112; GFX1100-GISEL-NEXT:    v_fma_f32 v2, 0x3f317217, v0, -v1
5113; GFX1100-GISEL-NEXT:    s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
5114; GFX1100-GISEL-NEXT:    v_fmac_f32_e32 v2, 0x3377d1cf, v0
5115; GFX1100-GISEL-NEXT:    v_add_f32_e32 v0, v1, v2
5116; GFX1100-GISEL-NEXT:    v_cndmask_b32_e64 v1, 0, 0x41b17218, vcc_lo
5117; GFX1100-GISEL-NEXT:    s_delay_alu instid0(VALU_DEP_1)
5118; GFX1100-GISEL-NEXT:    v_sub_f32_e32 v0, v0, v1
5119; GFX1100-GISEL-NEXT:    s_setpc_b64 s[30:31]
5120;
5121; R600-LABEL: v_log_f32_nnan_ninf:
5122; R600:       ; %bb.0:
5123; R600-NEXT:    CF_END
5124; R600-NEXT:    PAD
5125;
5126; CM-LABEL: v_log_f32_nnan_ninf:
5127; CM:       ; %bb.0:
5128; CM-NEXT:    CF_END
5129; CM-NEXT:    PAD
5130  %result = call nnan ninf float @llvm.log.f32(float %in)
5131  ret float %result
5132}
5133
5134define float @v_log_f32_nnan_ninf_daz(float %in) #0 {
5135; SI-SDAG-LABEL: v_log_f32_nnan_ninf_daz:
5136; SI-SDAG:       ; %bb.0:
5137; SI-SDAG-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
5138; SI-SDAG-NEXT:    v_log_f32_e32 v0, v0
5139; SI-SDAG-NEXT:    s_mov_b32 s4, 0x3f317217
5140; SI-SDAG-NEXT:    v_mul_f32_e32 v1, 0x3f317217, v0
5141; SI-SDAG-NEXT:    v_fma_f32 v2, v0, s4, -v1
5142; SI-SDAG-NEXT:    s_mov_b32 s4, 0x3377d1cf
5143; SI-SDAG-NEXT:    v_fma_f32 v0, v0, s4, v2
5144; SI-SDAG-NEXT:    v_add_f32_e32 v0, v1, v0
5145; SI-SDAG-NEXT:    s_setpc_b64 s[30:31]
5146;
5147; SI-GISEL-LABEL: v_log_f32_nnan_ninf_daz:
5148; SI-GISEL:       ; %bb.0:
5149; SI-GISEL-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
5150; SI-GISEL-NEXT:    v_log_f32_e32 v0, v0
5151; SI-GISEL-NEXT:    v_mov_b32_e32 v1, 0x3f317217
5152; SI-GISEL-NEXT:    v_mov_b32_e32 v3, 0x3377d1cf
5153; SI-GISEL-NEXT:    v_mul_f32_e32 v2, 0x3f317217, v0
5154; SI-GISEL-NEXT:    v_fma_f32 v1, v0, v1, -v2
5155; SI-GISEL-NEXT:    v_fma_f32 v0, v0, v3, v1
5156; SI-GISEL-NEXT:    v_add_f32_e32 v0, v2, v0
5157; SI-GISEL-NEXT:    s_setpc_b64 s[30:31]
5158;
5159; VI-LABEL: v_log_f32_nnan_ninf_daz:
5160; VI:       ; %bb.0:
5161; VI-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
5162; VI-NEXT:    v_log_f32_e32 v0, v0
5163; VI-NEXT:    v_and_b32_e32 v1, 0xfffff000, v0
5164; VI-NEXT:    v_sub_f32_e32 v0, v0, v1
5165; VI-NEXT:    v_mul_f32_e32 v2, 0x3805fdf4, v1
5166; VI-NEXT:    v_mul_f32_e32 v3, 0x3805fdf4, v0
5167; VI-NEXT:    v_mul_f32_e32 v0, 0x3f317000, v0
5168; VI-NEXT:    v_add_f32_e32 v2, v2, v3
5169; VI-NEXT:    v_add_f32_e32 v0, v0, v2
5170; VI-NEXT:    v_mul_f32_e32 v1, 0x3f317000, v1
5171; VI-NEXT:    v_add_f32_e32 v0, v1, v0
5172; VI-NEXT:    s_setpc_b64 s[30:31]
5173;
5174; GFX900-SDAG-LABEL: v_log_f32_nnan_ninf_daz:
5175; GFX900-SDAG:       ; %bb.0:
5176; GFX900-SDAG-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
5177; GFX900-SDAG-NEXT:    v_log_f32_e32 v0, v0
5178; GFX900-SDAG-NEXT:    s_mov_b32 s4, 0x3f317217
5179; GFX900-SDAG-NEXT:    v_mul_f32_e32 v1, 0x3f317217, v0
5180; GFX900-SDAG-NEXT:    v_fma_f32 v2, v0, s4, -v1
5181; GFX900-SDAG-NEXT:    s_mov_b32 s4, 0x3377d1cf
5182; GFX900-SDAG-NEXT:    v_fma_f32 v0, v0, s4, v2
5183; GFX900-SDAG-NEXT:    v_add_f32_e32 v0, v1, v0
5184; GFX900-SDAG-NEXT:    s_setpc_b64 s[30:31]
5185;
5186; GFX900-GISEL-LABEL: v_log_f32_nnan_ninf_daz:
5187; GFX900-GISEL:       ; %bb.0:
5188; GFX900-GISEL-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
5189; GFX900-GISEL-NEXT:    v_log_f32_e32 v0, v0
5190; GFX900-GISEL-NEXT:    v_mov_b32_e32 v1, 0x3f317217
5191; GFX900-GISEL-NEXT:    v_mov_b32_e32 v3, 0x3377d1cf
5192; GFX900-GISEL-NEXT:    v_mul_f32_e32 v2, 0x3f317217, v0
5193; GFX900-GISEL-NEXT:    v_fma_f32 v1, v0, v1, -v2
5194; GFX900-GISEL-NEXT:    v_fma_f32 v0, v0, v3, v1
5195; GFX900-GISEL-NEXT:    v_add_f32_e32 v0, v2, v0
5196; GFX900-GISEL-NEXT:    s_setpc_b64 s[30:31]
5197;
5198; GFX1100-SDAG-LABEL: v_log_f32_nnan_ninf_daz:
5199; GFX1100-SDAG:       ; %bb.0:
5200; GFX1100-SDAG-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
5201; GFX1100-SDAG-NEXT:    v_log_f32_e32 v0, v0
5202; GFX1100-SDAG-NEXT:    s_waitcnt_depctr 0xfff
5203; GFX1100-SDAG-NEXT:    v_mul_f32_e32 v1, 0x3f317217, v0
5204; GFX1100-SDAG-NEXT:    s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
5205; GFX1100-SDAG-NEXT:    v_fma_f32 v2, 0x3f317217, v0, -v1
5206; GFX1100-SDAG-NEXT:    v_fmamk_f32 v0, v0, 0x3377d1cf, v2
5207; GFX1100-SDAG-NEXT:    s_delay_alu instid0(VALU_DEP_1)
5208; GFX1100-SDAG-NEXT:    v_add_f32_e32 v0, v1, v0
5209; GFX1100-SDAG-NEXT:    s_setpc_b64 s[30:31]
5210;
5211; GFX1100-GISEL-LABEL: v_log_f32_nnan_ninf_daz:
5212; GFX1100-GISEL:       ; %bb.0:
5213; GFX1100-GISEL-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
5214; GFX1100-GISEL-NEXT:    v_log_f32_e32 v0, v0
5215; GFX1100-GISEL-NEXT:    s_waitcnt_depctr 0xfff
5216; GFX1100-GISEL-NEXT:    v_mul_f32_e32 v1, 0x3f317217, v0
5217; GFX1100-GISEL-NEXT:    s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
5218; GFX1100-GISEL-NEXT:    v_fma_f32 v2, 0x3f317217, v0, -v1
5219; GFX1100-GISEL-NEXT:    v_fmac_f32_e32 v2, 0x3377d1cf, v0
5220; GFX1100-GISEL-NEXT:    s_delay_alu instid0(VALU_DEP_1)
5221; GFX1100-GISEL-NEXT:    v_add_f32_e32 v0, v1, v2
5222; GFX1100-GISEL-NEXT:    s_setpc_b64 s[30:31]
5223;
5224; R600-LABEL: v_log_f32_nnan_ninf_daz:
5225; R600:       ; %bb.0:
5226; R600-NEXT:    CF_END
5227; R600-NEXT:    PAD
5228;
5229; CM-LABEL: v_log_f32_nnan_ninf_daz:
5230; CM:       ; %bb.0:
5231; CM-NEXT:    CF_END
5232; CM-NEXT:    PAD
5233  %result = call nnan ninf float @llvm.log.f32(float %in)
5234  ret float %result
5235}
5236
5237define float @v_log_f32_nnan_ninf_dynamic(float %in) #1 {
5238; SI-SDAG-LABEL: v_log_f32_nnan_ninf_dynamic:
5239; SI-SDAG:       ; %bb.0:
5240; SI-SDAG-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
5241; SI-SDAG-NEXT:    s_mov_b32 s4, 0x800000
5242; SI-SDAG-NEXT:    v_cmp_gt_f32_e32 vcc, s4, v0
5243; SI-SDAG-NEXT:    v_cndmask_b32_e64 v1, 0, 1, vcc
5244; SI-SDAG-NEXT:    v_lshlrev_b32_e32 v1, 5, v1
5245; SI-SDAG-NEXT:    v_ldexp_f32_e32 v0, v0, v1
5246; SI-SDAG-NEXT:    v_log_f32_e32 v0, v0
5247; SI-SDAG-NEXT:    s_mov_b32 s4, 0x3f317217
5248; SI-SDAG-NEXT:    v_mul_f32_e32 v1, 0x3f317217, v0
5249; SI-SDAG-NEXT:    v_fma_f32 v2, v0, s4, -v1
5250; SI-SDAG-NEXT:    s_mov_b32 s4, 0x3377d1cf
5251; SI-SDAG-NEXT:    v_fma_f32 v0, v0, s4, v2
5252; SI-SDAG-NEXT:    v_add_f32_e32 v0, v1, v0
5253; SI-SDAG-NEXT:    v_mov_b32_e32 v1, 0x41b17218
5254; SI-SDAG-NEXT:    v_cndmask_b32_e32 v1, 0, v1, vcc
5255; SI-SDAG-NEXT:    v_sub_f32_e32 v0, v0, v1
5256; SI-SDAG-NEXT:    s_setpc_b64 s[30:31]
5257;
5258; SI-GISEL-LABEL: v_log_f32_nnan_ninf_dynamic:
5259; SI-GISEL:       ; %bb.0:
5260; SI-GISEL-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
5261; SI-GISEL-NEXT:    v_mov_b32_e32 v1, 0x800000
5262; SI-GISEL-NEXT:    v_cmp_lt_f32_e32 vcc, v0, v1
5263; SI-GISEL-NEXT:    v_cndmask_b32_e64 v1, 0, 1, vcc
5264; SI-GISEL-NEXT:    v_lshlrev_b32_e32 v1, 5, v1
5265; SI-GISEL-NEXT:    v_ldexp_f32_e32 v0, v0, v1
5266; SI-GISEL-NEXT:    v_log_f32_e32 v0, v0
5267; SI-GISEL-NEXT:    v_mov_b32_e32 v1, 0x3f317217
5268; SI-GISEL-NEXT:    v_mov_b32_e32 v3, 0x3377d1cf
5269; SI-GISEL-NEXT:    v_mul_f32_e32 v2, 0x3f317217, v0
5270; SI-GISEL-NEXT:    v_fma_f32 v1, v0, v1, -v2
5271; SI-GISEL-NEXT:    v_fma_f32 v0, v0, v3, v1
5272; SI-GISEL-NEXT:    v_mov_b32_e32 v1, 0x41b17218
5273; SI-GISEL-NEXT:    v_add_f32_e32 v0, v2, v0
5274; SI-GISEL-NEXT:    v_cndmask_b32_e32 v1, 0, v1, vcc
5275; SI-GISEL-NEXT:    v_sub_f32_e32 v0, v0, v1
5276; SI-GISEL-NEXT:    s_setpc_b64 s[30:31]
5277;
5278; VI-SDAG-LABEL: v_log_f32_nnan_ninf_dynamic:
5279; VI-SDAG:       ; %bb.0:
5280; VI-SDAG-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
5281; VI-SDAG-NEXT:    s_mov_b32 s4, 0x800000
5282; VI-SDAG-NEXT:    v_cmp_gt_f32_e32 vcc, s4, v0
5283; VI-SDAG-NEXT:    v_cndmask_b32_e64 v1, 0, 1, vcc
5284; VI-SDAG-NEXT:    v_lshlrev_b32_e32 v1, 5, v1
5285; VI-SDAG-NEXT:    v_ldexp_f32 v0, v0, v1
5286; VI-SDAG-NEXT:    v_log_f32_e32 v0, v0
5287; VI-SDAG-NEXT:    v_and_b32_e32 v1, 0xfffff000, v0
5288; VI-SDAG-NEXT:    v_sub_f32_e32 v0, v0, v1
5289; VI-SDAG-NEXT:    v_mul_f32_e32 v2, 0x3f317000, v0
5290; VI-SDAG-NEXT:    v_mul_f32_e32 v0, 0x3805fdf4, v0
5291; VI-SDAG-NEXT:    v_mul_f32_e32 v3, 0x3805fdf4, v1
5292; VI-SDAG-NEXT:    v_add_f32_e32 v0, v3, v0
5293; VI-SDAG-NEXT:    v_add_f32_e32 v0, v2, v0
5294; VI-SDAG-NEXT:    v_mul_f32_e32 v1, 0x3f317000, v1
5295; VI-SDAG-NEXT:    v_add_f32_e32 v0, v1, v0
5296; VI-SDAG-NEXT:    v_mov_b32_e32 v1, 0x41b17218
5297; VI-SDAG-NEXT:    v_cndmask_b32_e32 v1, 0, v1, vcc
5298; VI-SDAG-NEXT:    v_sub_f32_e32 v0, v0, v1
5299; VI-SDAG-NEXT:    s_setpc_b64 s[30:31]
5300;
5301; VI-GISEL-LABEL: v_log_f32_nnan_ninf_dynamic:
5302; VI-GISEL:       ; %bb.0:
5303; VI-GISEL-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
5304; VI-GISEL-NEXT:    v_mov_b32_e32 v1, 0x800000
5305; VI-GISEL-NEXT:    v_cmp_lt_f32_e32 vcc, v0, v1
5306; VI-GISEL-NEXT:    v_cndmask_b32_e64 v1, 0, 1, vcc
5307; VI-GISEL-NEXT:    v_lshlrev_b32_e32 v1, 5, v1
5308; VI-GISEL-NEXT:    v_ldexp_f32 v0, v0, v1
5309; VI-GISEL-NEXT:    v_log_f32_e32 v0, v0
5310; VI-GISEL-NEXT:    v_and_b32_e32 v1, 0xfffff000, v0
5311; VI-GISEL-NEXT:    v_sub_f32_e32 v0, v0, v1
5312; VI-GISEL-NEXT:    v_mul_f32_e32 v2, 0x3805fdf4, v1
5313; VI-GISEL-NEXT:    v_mul_f32_e32 v3, 0x3805fdf4, v0
5314; VI-GISEL-NEXT:    v_add_f32_e32 v2, v2, v3
5315; VI-GISEL-NEXT:    v_mul_f32_e32 v0, 0x3f317000, v0
5316; VI-GISEL-NEXT:    v_add_f32_e32 v0, v0, v2
5317; VI-GISEL-NEXT:    v_mul_f32_e32 v1, 0x3f317000, v1
5318; VI-GISEL-NEXT:    v_add_f32_e32 v0, v1, v0
5319; VI-GISEL-NEXT:    v_mov_b32_e32 v1, 0x41b17218
5320; VI-GISEL-NEXT:    v_cndmask_b32_e32 v1, 0, v1, vcc
5321; VI-GISEL-NEXT:    v_sub_f32_e32 v0, v0, v1
5322; VI-GISEL-NEXT:    s_setpc_b64 s[30:31]
5323;
5324; GFX900-SDAG-LABEL: v_log_f32_nnan_ninf_dynamic:
5325; GFX900-SDAG:       ; %bb.0:
5326; GFX900-SDAG-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
5327; GFX900-SDAG-NEXT:    s_mov_b32 s4, 0x800000
5328; GFX900-SDAG-NEXT:    v_cmp_gt_f32_e32 vcc, s4, v0
5329; GFX900-SDAG-NEXT:    v_cndmask_b32_e64 v1, 0, 1, vcc
5330; GFX900-SDAG-NEXT:    v_lshlrev_b32_e32 v1, 5, v1
5331; GFX900-SDAG-NEXT:    v_ldexp_f32 v0, v0, v1
5332; GFX900-SDAG-NEXT:    v_log_f32_e32 v0, v0
5333; GFX900-SDAG-NEXT:    s_mov_b32 s4, 0x3f317217
5334; GFX900-SDAG-NEXT:    v_mul_f32_e32 v1, 0x3f317217, v0
5335; GFX900-SDAG-NEXT:    v_fma_f32 v2, v0, s4, -v1
5336; GFX900-SDAG-NEXT:    s_mov_b32 s4, 0x3377d1cf
5337; GFX900-SDAG-NEXT:    v_fma_f32 v0, v0, s4, v2
5338; GFX900-SDAG-NEXT:    v_add_f32_e32 v0, v1, v0
5339; GFX900-SDAG-NEXT:    v_mov_b32_e32 v1, 0x41b17218
5340; GFX900-SDAG-NEXT:    v_cndmask_b32_e32 v1, 0, v1, vcc
5341; GFX900-SDAG-NEXT:    v_sub_f32_e32 v0, v0, v1
5342; GFX900-SDAG-NEXT:    s_setpc_b64 s[30:31]
5343;
5344; GFX900-GISEL-LABEL: v_log_f32_nnan_ninf_dynamic:
5345; GFX900-GISEL:       ; %bb.0:
5346; GFX900-GISEL-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
5347; GFX900-GISEL-NEXT:    v_mov_b32_e32 v1, 0x800000
5348; GFX900-GISEL-NEXT:    v_cmp_lt_f32_e32 vcc, v0, v1
5349; GFX900-GISEL-NEXT:    v_cndmask_b32_e64 v1, 0, 1, vcc
5350; GFX900-GISEL-NEXT:    v_lshlrev_b32_e32 v1, 5, v1
5351; GFX900-GISEL-NEXT:    v_ldexp_f32 v0, v0, v1
5352; GFX900-GISEL-NEXT:    v_log_f32_e32 v0, v0
5353; GFX900-GISEL-NEXT:    v_mov_b32_e32 v1, 0x3f317217
5354; GFX900-GISEL-NEXT:    v_mov_b32_e32 v3, 0x3377d1cf
5355; GFX900-GISEL-NEXT:    v_mul_f32_e32 v2, 0x3f317217, v0
5356; GFX900-GISEL-NEXT:    v_fma_f32 v1, v0, v1, -v2
5357; GFX900-GISEL-NEXT:    v_fma_f32 v0, v0, v3, v1
5358; GFX900-GISEL-NEXT:    v_mov_b32_e32 v1, 0x41b17218
5359; GFX900-GISEL-NEXT:    v_add_f32_e32 v0, v2, v0
5360; GFX900-GISEL-NEXT:    v_cndmask_b32_e32 v1, 0, v1, vcc
5361; GFX900-GISEL-NEXT:    v_sub_f32_e32 v0, v0, v1
5362; GFX900-GISEL-NEXT:    s_setpc_b64 s[30:31]
5363;
5364; GFX1100-SDAG-LABEL: v_log_f32_nnan_ninf_dynamic:
5365; GFX1100-SDAG:       ; %bb.0:
5366; GFX1100-SDAG-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
5367; GFX1100-SDAG-NEXT:    v_cmp_gt_f32_e32 vcc_lo, 0x800000, v0
5368; GFX1100-SDAG-NEXT:    v_cndmask_b32_e64 v1, 0, 1, vcc_lo
5369; GFX1100-SDAG-NEXT:    s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
5370; GFX1100-SDAG-NEXT:    v_lshlrev_b32_e32 v1, 5, v1
5371; GFX1100-SDAG-NEXT:    v_ldexp_f32 v0, v0, v1
5372; GFX1100-SDAG-NEXT:    s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)
5373; GFX1100-SDAG-NEXT:    v_log_f32_e32 v0, v0
5374; GFX1100-SDAG-NEXT:    s_waitcnt_depctr 0xfff
5375; GFX1100-SDAG-NEXT:    v_mul_f32_e32 v1, 0x3f317217, v0
5376; GFX1100-SDAG-NEXT:    v_fma_f32 v2, 0x3f317217, v0, -v1
5377; GFX1100-SDAG-NEXT:    s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
5378; GFX1100-SDAG-NEXT:    v_fmamk_f32 v0, v0, 0x3377d1cf, v2
5379; GFX1100-SDAG-NEXT:    v_add_f32_e32 v0, v1, v0
5380; GFX1100-SDAG-NEXT:    v_cndmask_b32_e64 v1, 0, 0x41b17218, vcc_lo
5381; GFX1100-SDAG-NEXT:    s_delay_alu instid0(VALU_DEP_1)
5382; GFX1100-SDAG-NEXT:    v_sub_f32_e32 v0, v0, v1
5383; GFX1100-SDAG-NEXT:    s_setpc_b64 s[30:31]
5384;
5385; GFX1100-GISEL-LABEL: v_log_f32_nnan_ninf_dynamic:
5386; GFX1100-GISEL:       ; %bb.0:
5387; GFX1100-GISEL-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
5388; GFX1100-GISEL-NEXT:    v_cmp_gt_f32_e32 vcc_lo, 0x800000, v0
5389; GFX1100-GISEL-NEXT:    v_cndmask_b32_e64 v1, 0, 1, vcc_lo
5390; GFX1100-GISEL-NEXT:    s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
5391; GFX1100-GISEL-NEXT:    v_lshlrev_b32_e32 v1, 5, v1
5392; GFX1100-GISEL-NEXT:    v_ldexp_f32 v0, v0, v1
5393; GFX1100-GISEL-NEXT:    s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)
5394; GFX1100-GISEL-NEXT:    v_log_f32_e32 v0, v0
5395; GFX1100-GISEL-NEXT:    s_waitcnt_depctr 0xfff
5396; GFX1100-GISEL-NEXT:    v_mul_f32_e32 v1, 0x3f317217, v0
5397; GFX1100-GISEL-NEXT:    v_fma_f32 v2, 0x3f317217, v0, -v1
5398; GFX1100-GISEL-NEXT:    s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
5399; GFX1100-GISEL-NEXT:    v_fmac_f32_e32 v2, 0x3377d1cf, v0
5400; GFX1100-GISEL-NEXT:    v_add_f32_e32 v0, v1, v2
5401; GFX1100-GISEL-NEXT:    v_cndmask_b32_e64 v1, 0, 0x41b17218, vcc_lo
5402; GFX1100-GISEL-NEXT:    s_delay_alu instid0(VALU_DEP_1)
5403; GFX1100-GISEL-NEXT:    v_sub_f32_e32 v0, v0, v1
5404; GFX1100-GISEL-NEXT:    s_setpc_b64 s[30:31]
5405;
5406; R600-LABEL: v_log_f32_nnan_ninf_dynamic:
5407; R600:       ; %bb.0:
5408; R600-NEXT:    CF_END
5409; R600-NEXT:    PAD
5410;
5411; CM-LABEL: v_log_f32_nnan_ninf_dynamic:
5412; CM:       ; %bb.0:
5413; CM-NEXT:    CF_END
5414; CM-NEXT:    PAD
5415  %result = call nnan ninf float @llvm.log.f32(float %in)
5416  ret float %result
5417}
5418
5419define float @v_log_f32_fast_daz(float %in) #0 {
5420; GFX689-LABEL: v_log_f32_fast_daz:
5421; GFX689:       ; %bb.0:
5422; GFX689-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
5423; GFX689-NEXT:    v_log_f32_e32 v0, v0
5424; GFX689-NEXT:    v_mul_f32_e32 v0, 0x3f317218, v0
5425; GFX689-NEXT:    s_setpc_b64 s[30:31]
5426;
5427; GFX1100-LABEL: v_log_f32_fast_daz:
5428; GFX1100:       ; %bb.0:
5429; GFX1100-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
5430; GFX1100-NEXT:    v_log_f32_e32 v0, v0
5431; GFX1100-NEXT:    s_waitcnt_depctr 0xfff
5432; GFX1100-NEXT:    v_mul_f32_e32 v0, 0x3f317218, v0
5433; GFX1100-NEXT:    s_setpc_b64 s[30:31]
5434;
5435; R600-LABEL: v_log_f32_fast_daz:
5436; R600:       ; %bb.0:
5437; R600-NEXT:    CF_END
5438; R600-NEXT:    PAD
5439;
5440; CM-LABEL: v_log_f32_fast_daz:
5441; CM:       ; %bb.0:
5442; CM-NEXT:    CF_END
5443; CM-NEXT:    PAD
5444  %result = call fast float @llvm.log.f32(float %in)
5445  ret float %result
5446}
5447
5448define float @v_log_f32_dynamic_mode(float %in) #1 {
5449; SI-SDAG-LABEL: v_log_f32_dynamic_mode:
5450; SI-SDAG:       ; %bb.0:
5451; SI-SDAG-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
5452; SI-SDAG-NEXT:    s_mov_b32 s4, 0x800000
5453; SI-SDAG-NEXT:    v_cmp_gt_f32_e32 vcc, s4, v0
5454; SI-SDAG-NEXT:    v_cndmask_b32_e64 v1, 0, 1, vcc
5455; SI-SDAG-NEXT:    v_lshlrev_b32_e32 v1, 5, v1
5456; SI-SDAG-NEXT:    v_ldexp_f32_e32 v0, v0, v1
5457; SI-SDAG-NEXT:    v_log_f32_e32 v0, v0
5458; SI-SDAG-NEXT:    s_mov_b32 s4, 0x3f317217
5459; SI-SDAG-NEXT:    v_mul_f32_e32 v1, 0x3f317217, v0
5460; SI-SDAG-NEXT:    v_fma_f32 v2, v0, s4, -v1
5461; SI-SDAG-NEXT:    s_mov_b32 s4, 0x3377d1cf
5462; SI-SDAG-NEXT:    v_fma_f32 v2, v0, s4, v2
5463; SI-SDAG-NEXT:    s_mov_b32 s4, 0x7f800000
5464; SI-SDAG-NEXT:    v_add_f32_e32 v1, v1, v2
5465; SI-SDAG-NEXT:    v_cmp_lt_f32_e64 s[4:5], |v0|, s4
5466; SI-SDAG-NEXT:    v_cndmask_b32_e64 v0, v0, v1, s[4:5]
5467; SI-SDAG-NEXT:    v_mov_b32_e32 v1, 0x41b17218
5468; SI-SDAG-NEXT:    v_cndmask_b32_e32 v1, 0, v1, vcc
5469; SI-SDAG-NEXT:    v_sub_f32_e32 v0, v0, v1
5470; SI-SDAG-NEXT:    s_setpc_b64 s[30:31]
5471;
5472; SI-GISEL-LABEL: v_log_f32_dynamic_mode:
5473; SI-GISEL:       ; %bb.0:
5474; SI-GISEL-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
5475; SI-GISEL-NEXT:    v_mov_b32_e32 v1, 0x800000
5476; SI-GISEL-NEXT:    v_cmp_lt_f32_e32 vcc, v0, v1
5477; SI-GISEL-NEXT:    v_cndmask_b32_e64 v1, 0, 1, vcc
5478; SI-GISEL-NEXT:    v_lshlrev_b32_e32 v1, 5, v1
5479; SI-GISEL-NEXT:    v_ldexp_f32_e32 v0, v0, v1
5480; SI-GISEL-NEXT:    v_log_f32_e32 v0, v0
5481; SI-GISEL-NEXT:    v_mov_b32_e32 v1, 0x3f317217
5482; SI-GISEL-NEXT:    v_mov_b32_e32 v3, 0x3377d1cf
5483; SI-GISEL-NEXT:    v_mul_f32_e32 v2, 0x3f317217, v0
5484; SI-GISEL-NEXT:    v_fma_f32 v1, v0, v1, -v2
5485; SI-GISEL-NEXT:    v_fma_f32 v1, v0, v3, v1
5486; SI-GISEL-NEXT:    v_add_f32_e32 v1, v2, v1
5487; SI-GISEL-NEXT:    v_mov_b32_e32 v2, 0x7f800000
5488; SI-GISEL-NEXT:    v_cmp_lt_f32_e64 s[4:5], |v0|, v2
5489; SI-GISEL-NEXT:    v_cndmask_b32_e64 v0, v0, v1, s[4:5]
5490; SI-GISEL-NEXT:    v_mov_b32_e32 v1, 0x41b17218
5491; SI-GISEL-NEXT:    v_cndmask_b32_e32 v1, 0, v1, vcc
5492; SI-GISEL-NEXT:    v_sub_f32_e32 v0, v0, v1
5493; SI-GISEL-NEXT:    s_setpc_b64 s[30:31]
5494;
5495; VI-SDAG-LABEL: v_log_f32_dynamic_mode:
5496; VI-SDAG:       ; %bb.0:
5497; VI-SDAG-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
5498; VI-SDAG-NEXT:    s_mov_b32 s4, 0x800000
5499; VI-SDAG-NEXT:    v_cmp_gt_f32_e32 vcc, s4, v0
5500; VI-SDAG-NEXT:    v_cndmask_b32_e64 v1, 0, 1, vcc
5501; VI-SDAG-NEXT:    v_lshlrev_b32_e32 v1, 5, v1
5502; VI-SDAG-NEXT:    v_ldexp_f32 v0, v0, v1
5503; VI-SDAG-NEXT:    v_log_f32_e32 v0, v0
5504; VI-SDAG-NEXT:    s_mov_b32 s4, 0x7f800000
5505; VI-SDAG-NEXT:    v_and_b32_e32 v1, 0xfffff000, v0
5506; VI-SDAG-NEXT:    v_sub_f32_e32 v2, v0, v1
5507; VI-SDAG-NEXT:    v_mul_f32_e32 v3, 0x3f317000, v2
5508; VI-SDAG-NEXT:    v_mul_f32_e32 v2, 0x3805fdf4, v2
5509; VI-SDAG-NEXT:    v_mul_f32_e32 v4, 0x3805fdf4, v1
5510; VI-SDAG-NEXT:    v_add_f32_e32 v2, v4, v2
5511; VI-SDAG-NEXT:    v_add_f32_e32 v2, v3, v2
5512; VI-SDAG-NEXT:    v_mul_f32_e32 v1, 0x3f317000, v1
5513; VI-SDAG-NEXT:    v_add_f32_e32 v1, v1, v2
5514; VI-SDAG-NEXT:    v_cmp_lt_f32_e64 s[4:5], |v0|, s4
5515; VI-SDAG-NEXT:    v_cndmask_b32_e64 v0, v0, v1, s[4:5]
5516; VI-SDAG-NEXT:    v_mov_b32_e32 v1, 0x41b17218
5517; VI-SDAG-NEXT:    v_cndmask_b32_e32 v1, 0, v1, vcc
5518; VI-SDAG-NEXT:    v_sub_f32_e32 v0, v0, v1
5519; VI-SDAG-NEXT:    s_setpc_b64 s[30:31]
5520;
5521; VI-GISEL-LABEL: v_log_f32_dynamic_mode:
5522; VI-GISEL:       ; %bb.0:
5523; VI-GISEL-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
5524; VI-GISEL-NEXT:    v_mov_b32_e32 v1, 0x800000
5525; VI-GISEL-NEXT:    v_cmp_lt_f32_e32 vcc, v0, v1
5526; VI-GISEL-NEXT:    v_cndmask_b32_e64 v1, 0, 1, vcc
5527; VI-GISEL-NEXT:    v_lshlrev_b32_e32 v1, 5, v1
5528; VI-GISEL-NEXT:    v_ldexp_f32 v0, v0, v1
5529; VI-GISEL-NEXT:    v_log_f32_e32 v0, v0
5530; VI-GISEL-NEXT:    v_and_b32_e32 v1, 0xfffff000, v0
5531; VI-GISEL-NEXT:    v_sub_f32_e32 v2, v0, v1
5532; VI-GISEL-NEXT:    v_mul_f32_e32 v3, 0x3805fdf4, v1
5533; VI-GISEL-NEXT:    v_mul_f32_e32 v4, 0x3805fdf4, v2
5534; VI-GISEL-NEXT:    v_add_f32_e32 v3, v3, v4
5535; VI-GISEL-NEXT:    v_mul_f32_e32 v2, 0x3f317000, v2
5536; VI-GISEL-NEXT:    v_add_f32_e32 v2, v2, v3
5537; VI-GISEL-NEXT:    v_mul_f32_e32 v1, 0x3f317000, v1
5538; VI-GISEL-NEXT:    v_add_f32_e32 v1, v1, v2
5539; VI-GISEL-NEXT:    v_mov_b32_e32 v2, 0x7f800000
5540; VI-GISEL-NEXT:    v_cmp_lt_f32_e64 s[4:5], |v0|, v2
5541; VI-GISEL-NEXT:    v_cndmask_b32_e64 v0, v0, v1, s[4:5]
5542; VI-GISEL-NEXT:    v_mov_b32_e32 v1, 0x41b17218
5543; VI-GISEL-NEXT:    v_cndmask_b32_e32 v1, 0, v1, vcc
5544; VI-GISEL-NEXT:    v_sub_f32_e32 v0, v0, v1
5545; VI-GISEL-NEXT:    s_setpc_b64 s[30:31]
5546;
5547; GFX900-SDAG-LABEL: v_log_f32_dynamic_mode:
5548; GFX900-SDAG:       ; %bb.0:
5549; GFX900-SDAG-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
5550; GFX900-SDAG-NEXT:    s_mov_b32 s4, 0x800000
5551; GFX900-SDAG-NEXT:    v_cmp_gt_f32_e32 vcc, s4, v0
5552; GFX900-SDAG-NEXT:    v_cndmask_b32_e64 v1, 0, 1, vcc
5553; GFX900-SDAG-NEXT:    v_lshlrev_b32_e32 v1, 5, v1
5554; GFX900-SDAG-NEXT:    v_ldexp_f32 v0, v0, v1
5555; GFX900-SDAG-NEXT:    v_log_f32_e32 v0, v0
5556; GFX900-SDAG-NEXT:    s_mov_b32 s4, 0x3f317217
5557; GFX900-SDAG-NEXT:    v_mul_f32_e32 v1, 0x3f317217, v0
5558; GFX900-SDAG-NEXT:    v_fma_f32 v2, v0, s4, -v1
5559; GFX900-SDAG-NEXT:    s_mov_b32 s4, 0x3377d1cf
5560; GFX900-SDAG-NEXT:    v_fma_f32 v2, v0, s4, v2
5561; GFX900-SDAG-NEXT:    s_mov_b32 s4, 0x7f800000
5562; GFX900-SDAG-NEXT:    v_add_f32_e32 v1, v1, v2
5563; GFX900-SDAG-NEXT:    v_cmp_lt_f32_e64 s[4:5], |v0|, s4
5564; GFX900-SDAG-NEXT:    v_cndmask_b32_e64 v0, v0, v1, s[4:5]
5565; GFX900-SDAG-NEXT:    v_mov_b32_e32 v1, 0x41b17218
5566; GFX900-SDAG-NEXT:    v_cndmask_b32_e32 v1, 0, v1, vcc
5567; GFX900-SDAG-NEXT:    v_sub_f32_e32 v0, v0, v1
5568; GFX900-SDAG-NEXT:    s_setpc_b64 s[30:31]
5569;
5570; GFX900-GISEL-LABEL: v_log_f32_dynamic_mode:
5571; GFX900-GISEL:       ; %bb.0:
5572; GFX900-GISEL-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
5573; GFX900-GISEL-NEXT:    v_mov_b32_e32 v1, 0x800000
5574; GFX900-GISEL-NEXT:    v_cmp_lt_f32_e32 vcc, v0, v1
5575; GFX900-GISEL-NEXT:    v_cndmask_b32_e64 v1, 0, 1, vcc
5576; GFX900-GISEL-NEXT:    v_lshlrev_b32_e32 v1, 5, v1
5577; GFX900-GISEL-NEXT:    v_ldexp_f32 v0, v0, v1
5578; GFX900-GISEL-NEXT:    v_log_f32_e32 v0, v0
5579; GFX900-GISEL-NEXT:    v_mov_b32_e32 v1, 0x3f317217
5580; GFX900-GISEL-NEXT:    v_mov_b32_e32 v3, 0x3377d1cf
5581; GFX900-GISEL-NEXT:    v_mul_f32_e32 v2, 0x3f317217, v0
5582; GFX900-GISEL-NEXT:    v_fma_f32 v1, v0, v1, -v2
5583; GFX900-GISEL-NEXT:    v_fma_f32 v1, v0, v3, v1
5584; GFX900-GISEL-NEXT:    v_add_f32_e32 v1, v2, v1
5585; GFX900-GISEL-NEXT:    v_mov_b32_e32 v2, 0x7f800000
5586; GFX900-GISEL-NEXT:    v_cmp_lt_f32_e64 s[4:5], |v0|, v2
5587; GFX900-GISEL-NEXT:    v_cndmask_b32_e64 v0, v0, v1, s[4:5]
5588; GFX900-GISEL-NEXT:    v_mov_b32_e32 v1, 0x41b17218
5589; GFX900-GISEL-NEXT:    v_cndmask_b32_e32 v1, 0, v1, vcc
5590; GFX900-GISEL-NEXT:    v_sub_f32_e32 v0, v0, v1
5591; GFX900-GISEL-NEXT:    s_setpc_b64 s[30:31]
5592;
5593; GFX1100-SDAG-LABEL: v_log_f32_dynamic_mode:
5594; GFX1100-SDAG:       ; %bb.0:
5595; GFX1100-SDAG-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
5596; GFX1100-SDAG-NEXT:    v_cmp_gt_f32_e32 vcc_lo, 0x800000, v0
5597; GFX1100-SDAG-NEXT:    v_cndmask_b32_e64 v1, 0, 1, vcc_lo
5598; GFX1100-SDAG-NEXT:    s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
5599; GFX1100-SDAG-NEXT:    v_lshlrev_b32_e32 v1, 5, v1
5600; GFX1100-SDAG-NEXT:    v_ldexp_f32 v0, v0, v1
5601; GFX1100-SDAG-NEXT:    s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_2)
5602; GFX1100-SDAG-NEXT:    v_log_f32_e32 v0, v0
5603; GFX1100-SDAG-NEXT:    s_waitcnt_depctr 0xfff
5604; GFX1100-SDAG-NEXT:    v_mul_f32_e32 v1, 0x3f317217, v0
5605; GFX1100-SDAG-NEXT:    v_cmp_gt_f32_e64 s0, 0x7f800000, |v0|
5606; GFX1100-SDAG-NEXT:    v_fma_f32 v2, 0x3f317217, v0, -v1
5607; GFX1100-SDAG-NEXT:    s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
5608; GFX1100-SDAG-NEXT:    v_fmamk_f32 v2, v0, 0x3377d1cf, v2
5609; GFX1100-SDAG-NEXT:    v_add_f32_e32 v1, v1, v2
5610; GFX1100-SDAG-NEXT:    s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
5611; GFX1100-SDAG-NEXT:    v_cndmask_b32_e64 v0, v0, v1, s0
5612; GFX1100-SDAG-NEXT:    v_cndmask_b32_e64 v1, 0, 0x41b17218, vcc_lo
5613; GFX1100-SDAG-NEXT:    v_sub_f32_e32 v0, v0, v1
5614; GFX1100-SDAG-NEXT:    s_setpc_b64 s[30:31]
5615;
5616; GFX1100-GISEL-LABEL: v_log_f32_dynamic_mode:
5617; GFX1100-GISEL:       ; %bb.0:
5618; GFX1100-GISEL-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
5619; GFX1100-GISEL-NEXT:    v_cmp_gt_f32_e32 vcc_lo, 0x800000, v0
5620; GFX1100-GISEL-NEXT:    v_cndmask_b32_e64 v1, 0, 1, vcc_lo
5621; GFX1100-GISEL-NEXT:    s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
5622; GFX1100-GISEL-NEXT:    v_lshlrev_b32_e32 v1, 5, v1
5623; GFX1100-GISEL-NEXT:    v_ldexp_f32 v0, v0, v1
5624; GFX1100-GISEL-NEXT:    s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_2)
5625; GFX1100-GISEL-NEXT:    v_log_f32_e32 v0, v0
5626; GFX1100-GISEL-NEXT:    s_waitcnt_depctr 0xfff
5627; GFX1100-GISEL-NEXT:    v_mul_f32_e32 v1, 0x3f317217, v0
5628; GFX1100-GISEL-NEXT:    v_cmp_gt_f32_e64 s0, 0x7f800000, |v0|
5629; GFX1100-GISEL-NEXT:    v_fma_f32 v2, 0x3f317217, v0, -v1
5630; GFX1100-GISEL-NEXT:    s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
5631; GFX1100-GISEL-NEXT:    v_fmac_f32_e32 v2, 0x3377d1cf, v0
5632; GFX1100-GISEL-NEXT:    v_add_f32_e32 v1, v1, v2
5633; GFX1100-GISEL-NEXT:    s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
5634; GFX1100-GISEL-NEXT:    v_cndmask_b32_e64 v0, v0, v1, s0
5635; GFX1100-GISEL-NEXT:    v_cndmask_b32_e64 v1, 0, 0x41b17218, vcc_lo
5636; GFX1100-GISEL-NEXT:    v_sub_f32_e32 v0, v0, v1
5637; GFX1100-GISEL-NEXT:    s_setpc_b64 s[30:31]
5638;
5639; R600-LABEL: v_log_f32_dynamic_mode:
5640; R600:       ; %bb.0:
5641; R600-NEXT:    CF_END
5642; R600-NEXT:    PAD
5643;
5644; CM-LABEL: v_log_f32_dynamic_mode:
5645; CM:       ; %bb.0:
5646; CM-NEXT:    CF_END
5647; CM-NEXT:    PAD
5648  %result = call float @llvm.log.f32(float %in)
5649  ret float %result
5650}
5651
5652define float @v_log_f32_undef() {
5653; SI-SDAG-LABEL: v_log_f32_undef:
5654; SI-SDAG:       ; %bb.0:
5655; SI-SDAG-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
5656; SI-SDAG-NEXT:    v_log_f32_e32 v0, s4
5657; SI-SDAG-NEXT:    s_mov_b32 s4, 0x3f317217
5658; SI-SDAG-NEXT:    s_mov_b32 s5, 0x3377d1cf
5659; SI-SDAG-NEXT:    s_mov_b32 s6, 0x7f800000
5660; SI-SDAG-NEXT:    v_mul_f32_e32 v1, 0x3f317217, v0
5661; SI-SDAG-NEXT:    v_fma_f32 v2, v0, s4, -v1
5662; SI-SDAG-NEXT:    v_fma_f32 v2, v0, s5, v2
5663; SI-SDAG-NEXT:    v_add_f32_e32 v1, v1, v2
5664; SI-SDAG-NEXT:    v_cmp_lt_f32_e64 vcc, |v0|, s6
5665; SI-SDAG-NEXT:    v_cndmask_b32_e32 v0, v0, v1, vcc
5666; SI-SDAG-NEXT:    s_setpc_b64 s[30:31]
5667;
5668; SI-GISEL-LABEL: v_log_f32_undef:
5669; SI-GISEL:       ; %bb.0:
5670; SI-GISEL-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
5671; SI-GISEL-NEXT:    v_mov_b32_e32 v0, 0x800000
5672; SI-GISEL-NEXT:    v_mov_b32_e32 v1, 0x4f800000
5673; SI-GISEL-NEXT:    v_mul_f32_e32 v1, s4, v1
5674; SI-GISEL-NEXT:    v_cmp_lt_f32_e32 vcc, s4, v0
5675; SI-GISEL-NEXT:    v_cndmask_b32_e32 v0, v0, v1, vcc
5676; SI-GISEL-NEXT:    v_log_f32_e32 v0, v0
5677; SI-GISEL-NEXT:    v_mov_b32_e32 v1, 0x3f317217
5678; SI-GISEL-NEXT:    v_mov_b32_e32 v3, 0x3377d1cf
5679; SI-GISEL-NEXT:    v_mul_f32_e32 v2, 0x3f317217, v0
5680; SI-GISEL-NEXT:    v_fma_f32 v1, v0, v1, -v2
5681; SI-GISEL-NEXT:    v_fma_f32 v1, v0, v3, v1
5682; SI-GISEL-NEXT:    v_add_f32_e32 v1, v2, v1
5683; SI-GISEL-NEXT:    v_mov_b32_e32 v2, 0x7f800000
5684; SI-GISEL-NEXT:    v_cmp_lt_f32_e64 s[4:5], |v0|, v2
5685; SI-GISEL-NEXT:    v_cndmask_b32_e64 v0, v0, v1, s[4:5]
5686; SI-GISEL-NEXT:    v_mov_b32_e32 v1, 0x41b17218
5687; SI-GISEL-NEXT:    v_cndmask_b32_e32 v1, 0, v1, vcc
5688; SI-GISEL-NEXT:    v_sub_f32_e32 v0, v0, v1
5689; SI-GISEL-NEXT:    s_setpc_b64 s[30:31]
5690;
5691; VI-SDAG-LABEL: v_log_f32_undef:
5692; VI-SDAG:       ; %bb.0:
5693; VI-SDAG-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
5694; VI-SDAG-NEXT:    v_log_f32_e32 v0, s4
5695; VI-SDAG-NEXT:    s_mov_b32 s4, 0x7f800000
5696; VI-SDAG-NEXT:    v_and_b32_e32 v1, 0xfffff000, v0
5697; VI-SDAG-NEXT:    v_sub_f32_e32 v3, v0, v1
5698; VI-SDAG-NEXT:    v_mul_f32_e32 v2, 0x3805fdf4, v1
5699; VI-SDAG-NEXT:    v_mul_f32_e32 v4, 0x3805fdf4, v3
5700; VI-SDAG-NEXT:    v_mul_f32_e32 v3, 0x3f317000, v3
5701; VI-SDAG-NEXT:    v_add_f32_e32 v2, v2, v4
5702; VI-SDAG-NEXT:    v_mul_f32_e32 v1, 0x3f317000, v1
5703; VI-SDAG-NEXT:    v_add_f32_e32 v2, v3, v2
5704; VI-SDAG-NEXT:    v_add_f32_e32 v1, v1, v2
5705; VI-SDAG-NEXT:    v_cmp_lt_f32_e64 vcc, |v0|, s4
5706; VI-SDAG-NEXT:    v_cndmask_b32_e32 v0, v0, v1, vcc
5707; VI-SDAG-NEXT:    s_setpc_b64 s[30:31]
5708;
5709; VI-GISEL-LABEL: v_log_f32_undef:
5710; VI-GISEL:       ; %bb.0:
5711; VI-GISEL-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
5712; VI-GISEL-NEXT:    v_mov_b32_e32 v0, 0x800000
5713; VI-GISEL-NEXT:    v_mov_b32_e32 v1, 0x4f800000
5714; VI-GISEL-NEXT:    v_mul_f32_e32 v1, s4, v1
5715; VI-GISEL-NEXT:    v_cmp_lt_f32_e32 vcc, s4, v0
5716; VI-GISEL-NEXT:    v_cndmask_b32_e32 v0, v0, v1, vcc
5717; VI-GISEL-NEXT:    v_log_f32_e32 v0, v0
5718; VI-GISEL-NEXT:    v_and_b32_e32 v1, 0xfffff000, v0
5719; VI-GISEL-NEXT:    v_sub_f32_e32 v2, v0, v1
5720; VI-GISEL-NEXT:    v_mul_f32_e32 v3, 0x3805fdf4, v1
5721; VI-GISEL-NEXT:    v_mul_f32_e32 v4, 0x3805fdf4, v2
5722; VI-GISEL-NEXT:    v_add_f32_e32 v3, v3, v4
5723; VI-GISEL-NEXT:    v_mul_f32_e32 v2, 0x3f317000, v2
5724; VI-GISEL-NEXT:    v_add_f32_e32 v2, v2, v3
5725; VI-GISEL-NEXT:    v_mul_f32_e32 v1, 0x3f317000, v1
5726; VI-GISEL-NEXT:    v_add_f32_e32 v1, v1, v2
5727; VI-GISEL-NEXT:    v_mov_b32_e32 v2, 0x7f800000
5728; VI-GISEL-NEXT:    v_cmp_lt_f32_e64 s[4:5], |v0|, v2
5729; VI-GISEL-NEXT:    v_cndmask_b32_e64 v0, v0, v1, s[4:5]
5730; VI-GISEL-NEXT:    v_mov_b32_e32 v1, 0x41b17218
5731; VI-GISEL-NEXT:    v_cndmask_b32_e32 v1, 0, v1, vcc
5732; VI-GISEL-NEXT:    v_sub_f32_e32 v0, v0, v1
5733; VI-GISEL-NEXT:    s_setpc_b64 s[30:31]
5734;
5735; GFX900-SDAG-LABEL: v_log_f32_undef:
5736; GFX900-SDAG:       ; %bb.0:
5737; GFX900-SDAG-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
5738; GFX900-SDAG-NEXT:    v_log_f32_e32 v0, s4
5739; GFX900-SDAG-NEXT:    s_mov_b32 s4, 0x3f317217
5740; GFX900-SDAG-NEXT:    s_mov_b32 s5, 0x3377d1cf
5741; GFX900-SDAG-NEXT:    s_mov_b32 s6, 0x7f800000
5742; GFX900-SDAG-NEXT:    v_mul_f32_e32 v1, 0x3f317217, v0
5743; GFX900-SDAG-NEXT:    v_fma_f32 v2, v0, s4, -v1
5744; GFX900-SDAG-NEXT:    v_fma_f32 v2, v0, s5, v2
5745; GFX900-SDAG-NEXT:    v_add_f32_e32 v1, v1, v2
5746; GFX900-SDAG-NEXT:    v_cmp_lt_f32_e64 vcc, |v0|, s6
5747; GFX900-SDAG-NEXT:    v_cndmask_b32_e32 v0, v0, v1, vcc
5748; GFX900-SDAG-NEXT:    s_setpc_b64 s[30:31]
5749;
5750; GFX900-GISEL-LABEL: v_log_f32_undef:
5751; GFX900-GISEL:       ; %bb.0:
5752; GFX900-GISEL-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
5753; GFX900-GISEL-NEXT:    v_mov_b32_e32 v0, 0x800000
5754; GFX900-GISEL-NEXT:    v_mov_b32_e32 v1, 0x4f800000
5755; GFX900-GISEL-NEXT:    v_mul_f32_e32 v1, s4, v1
5756; GFX900-GISEL-NEXT:    v_cmp_lt_f32_e32 vcc, s4, v0
5757; GFX900-GISEL-NEXT:    v_cndmask_b32_e32 v0, v0, v1, vcc
5758; GFX900-GISEL-NEXT:    v_log_f32_e32 v0, v0
5759; GFX900-GISEL-NEXT:    v_mov_b32_e32 v1, 0x3f317217
5760; GFX900-GISEL-NEXT:    v_mov_b32_e32 v3, 0x3377d1cf
5761; GFX900-GISEL-NEXT:    v_mul_f32_e32 v2, 0x3f317217, v0
5762; GFX900-GISEL-NEXT:    v_fma_f32 v1, v0, v1, -v2
5763; GFX900-GISEL-NEXT:    v_fma_f32 v1, v0, v3, v1
5764; GFX900-GISEL-NEXT:    v_add_f32_e32 v1, v2, v1
5765; GFX900-GISEL-NEXT:    v_mov_b32_e32 v2, 0x7f800000
5766; GFX900-GISEL-NEXT:    v_cmp_lt_f32_e64 s[4:5], |v0|, v2
5767; GFX900-GISEL-NEXT:    v_cndmask_b32_e64 v0, v0, v1, s[4:5]
5768; GFX900-GISEL-NEXT:    v_mov_b32_e32 v1, 0x41b17218
5769; GFX900-GISEL-NEXT:    v_cndmask_b32_e32 v1, 0, v1, vcc
5770; GFX900-GISEL-NEXT:    v_sub_f32_e32 v0, v0, v1
5771; GFX900-GISEL-NEXT:    s_setpc_b64 s[30:31]
5772;
5773; GFX1100-SDAG-LABEL: v_log_f32_undef:
5774; GFX1100-SDAG:       ; %bb.0:
5775; GFX1100-SDAG-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
5776; GFX1100-SDAG-NEXT:    v_log_f32_e32 v0, s0
5777; GFX1100-SDAG-NEXT:    s_waitcnt_depctr 0xfff
5778; GFX1100-SDAG-NEXT:    v_mul_f32_e32 v1, 0x3f317217, v0
5779; GFX1100-SDAG-NEXT:    v_cmp_gt_f32_e64 vcc_lo, 0x7f800000, |v0|
5780; GFX1100-SDAG-NEXT:    s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
5781; GFX1100-SDAG-NEXT:    v_fma_f32 v2, 0x3f317217, v0, -v1
5782; GFX1100-SDAG-NEXT:    v_fmamk_f32 v2, v0, 0x3377d1cf, v2
5783; GFX1100-SDAG-NEXT:    s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
5784; GFX1100-SDAG-NEXT:    v_add_f32_e32 v1, v1, v2
5785; GFX1100-SDAG-NEXT:    v_cndmask_b32_e32 v0, v0, v1, vcc_lo
5786; GFX1100-SDAG-NEXT:    s_setpc_b64 s[30:31]
5787;
5788; GFX1100-GISEL-LABEL: v_log_f32_undef:
5789; GFX1100-GISEL:       ; %bb.0:
5790; GFX1100-GISEL-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
5791; GFX1100-GISEL-NEXT:    v_mul_f32_e64 v0, 0x4f800000, s0
5792; GFX1100-GISEL-NEXT:    v_cmp_gt_f32_e64 vcc_lo, 0x800000, s0
5793; GFX1100-GISEL-NEXT:    s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
5794; GFX1100-GISEL-NEXT:    v_cndmask_b32_e32 v0, s0, v0, vcc_lo
5795; GFX1100-GISEL-NEXT:    v_log_f32_e32 v0, v0
5796; GFX1100-GISEL-NEXT:    s_waitcnt_depctr 0xfff
5797; GFX1100-GISEL-NEXT:    v_mul_f32_e32 v1, 0x3f317217, v0
5798; GFX1100-GISEL-NEXT:    v_cmp_gt_f32_e64 s0, 0x7f800000, |v0|
5799; GFX1100-GISEL-NEXT:    s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
5800; GFX1100-GISEL-NEXT:    v_fma_f32 v2, 0x3f317217, v0, -v1
5801; GFX1100-GISEL-NEXT:    v_fmac_f32_e32 v2, 0x3377d1cf, v0
5802; GFX1100-GISEL-NEXT:    s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
5803; GFX1100-GISEL-NEXT:    v_add_f32_e32 v1, v1, v2
5804; GFX1100-GISEL-NEXT:    v_cndmask_b32_e64 v0, v0, v1, s0
5805; GFX1100-GISEL-NEXT:    v_cndmask_b32_e64 v1, 0, 0x41b17218, vcc_lo
5806; GFX1100-GISEL-NEXT:    s_delay_alu instid0(VALU_DEP_1)
5807; GFX1100-GISEL-NEXT:    v_sub_f32_e32 v0, v0, v1
5808; GFX1100-GISEL-NEXT:    s_setpc_b64 s[30:31]
5809;
5810; R600-LABEL: v_log_f32_undef:
5811; R600:       ; %bb.0:
5812; R600-NEXT:    CF_END
5813; R600-NEXT:    PAD
5814;
5815; CM-LABEL: v_log_f32_undef:
5816; CM:       ; %bb.0:
5817; CM-NEXT:    CF_END
5818; CM-NEXT:    PAD
5819  %result = call float @llvm.log.f32(float undef)
5820  ret float %result
5821}
5822
5823define float @v_log_f32_0() {
5824; SI-SDAG-LABEL: v_log_f32_0:
5825; SI-SDAG:       ; %bb.0:
5826; SI-SDAG-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
5827; SI-SDAG-NEXT:    v_log_f32_e32 v0, 0
5828; SI-SDAG-NEXT:    s_mov_b32 s4, 0x3f317217
5829; SI-SDAG-NEXT:    s_mov_b32 s5, 0x3377d1cf
5830; SI-SDAG-NEXT:    s_mov_b32 s6, 0x7f800000
5831; SI-SDAG-NEXT:    v_mul_f32_e32 v1, 0x3f317217, v0
5832; SI-SDAG-NEXT:    v_fma_f32 v2, v0, s4, -v1
5833; SI-SDAG-NEXT:    v_fma_f32 v2, v0, s5, v2
5834; SI-SDAG-NEXT:    v_add_f32_e32 v1, v1, v2
5835; SI-SDAG-NEXT:    v_cmp_lt_f32_e64 vcc, |v0|, s6
5836; SI-SDAG-NEXT:    v_cndmask_b32_e32 v0, v0, v1, vcc
5837; SI-SDAG-NEXT:    v_add_f32_e32 v0, 0xc1b17218, v0
5838; SI-SDAG-NEXT:    s_setpc_b64 s[30:31]
5839;
5840; SI-GISEL-LABEL: v_log_f32_0:
5841; SI-GISEL:       ; %bb.0:
5842; SI-GISEL-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
5843; SI-GISEL-NEXT:    v_log_f32_e32 v0, 0
5844; SI-GISEL-NEXT:    v_mov_b32_e32 v1, 0x3f317217
5845; SI-GISEL-NEXT:    v_mov_b32_e32 v2, 0x3377d1cf
5846; SI-GISEL-NEXT:    v_mov_b32_e32 v3, 0x7f800000
5847; SI-GISEL-NEXT:    v_mul_f32_e32 v4, 0x3f317217, v0
5848; SI-GISEL-NEXT:    v_fma_f32 v1, v0, v1, -v4
5849; SI-GISEL-NEXT:    v_fma_f32 v1, v0, v2, v1
5850; SI-GISEL-NEXT:    v_add_f32_e32 v1, v4, v1
5851; SI-GISEL-NEXT:    v_cmp_lt_f32_e64 vcc, |v0|, v3
5852; SI-GISEL-NEXT:    v_cndmask_b32_e32 v0, v0, v1, vcc
5853; SI-GISEL-NEXT:    v_subrev_f32_e32 v0, 0x41b17218, v0
5854; SI-GISEL-NEXT:    s_setpc_b64 s[30:31]
5855;
5856; VI-SDAG-LABEL: v_log_f32_0:
5857; VI-SDAG:       ; %bb.0:
5858; VI-SDAG-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
5859; VI-SDAG-NEXT:    v_log_f32_e32 v0, 0
5860; VI-SDAG-NEXT:    s_mov_b32 s4, 0x7f800000
5861; VI-SDAG-NEXT:    v_and_b32_e32 v1, 0xfffff000, v0
5862; VI-SDAG-NEXT:    v_sub_f32_e32 v3, v0, v1
5863; VI-SDAG-NEXT:    v_mul_f32_e32 v2, 0x3805fdf4, v1
5864; VI-SDAG-NEXT:    v_mul_f32_e32 v4, 0x3805fdf4, v3
5865; VI-SDAG-NEXT:    v_mul_f32_e32 v3, 0x3f317000, v3
5866; VI-SDAG-NEXT:    v_add_f32_e32 v2, v2, v4
5867; VI-SDAG-NEXT:    v_mul_f32_e32 v1, 0x3f317000, v1
5868; VI-SDAG-NEXT:    v_add_f32_e32 v2, v3, v2
5869; VI-SDAG-NEXT:    v_add_f32_e32 v1, v1, v2
5870; VI-SDAG-NEXT:    v_cmp_lt_f32_e64 vcc, |v0|, s4
5871; VI-SDAG-NEXT:    v_cndmask_b32_e32 v0, v0, v1, vcc
5872; VI-SDAG-NEXT:    v_add_f32_e32 v0, 0xc1b17218, v0
5873; VI-SDAG-NEXT:    s_setpc_b64 s[30:31]
5874;
5875; VI-GISEL-LABEL: v_log_f32_0:
5876; VI-GISEL:       ; %bb.0:
5877; VI-GISEL-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
5878; VI-GISEL-NEXT:    v_log_f32_e32 v0, 0
5879; VI-GISEL-NEXT:    v_and_b32_e32 v1, 0xfffff000, v0
5880; VI-GISEL-NEXT:    v_sub_f32_e32 v2, v0, v1
5881; VI-GISEL-NEXT:    v_mul_f32_e32 v3, 0x3805fdf4, v1
5882; VI-GISEL-NEXT:    v_mul_f32_e32 v4, 0x3805fdf4, v2
5883; VI-GISEL-NEXT:    v_mul_f32_e32 v2, 0x3f317000, v2
5884; VI-GISEL-NEXT:    v_add_f32_e32 v3, v3, v4
5885; VI-GISEL-NEXT:    v_mul_f32_e32 v1, 0x3f317000, v1
5886; VI-GISEL-NEXT:    v_add_f32_e32 v2, v2, v3
5887; VI-GISEL-NEXT:    v_add_f32_e32 v1, v1, v2
5888; VI-GISEL-NEXT:    v_mov_b32_e32 v2, 0x7f800000
5889; VI-GISEL-NEXT:    v_cmp_lt_f32_e64 vcc, |v0|, v2
5890; VI-GISEL-NEXT:    v_cndmask_b32_e32 v0, v0, v1, vcc
5891; VI-GISEL-NEXT:    v_subrev_f32_e32 v0, 0x41b17218, v0
5892; VI-GISEL-NEXT:    s_setpc_b64 s[30:31]
5893;
5894; GFX900-SDAG-LABEL: v_log_f32_0:
5895; GFX900-SDAG:       ; %bb.0:
5896; GFX900-SDAG-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
5897; GFX900-SDAG-NEXT:    v_log_f32_e32 v0, 0
5898; GFX900-SDAG-NEXT:    s_mov_b32 s4, 0x3f317217
5899; GFX900-SDAG-NEXT:    s_mov_b32 s5, 0x3377d1cf
5900; GFX900-SDAG-NEXT:    s_mov_b32 s6, 0x7f800000
5901; GFX900-SDAG-NEXT:    v_mul_f32_e32 v1, 0x3f317217, v0
5902; GFX900-SDAG-NEXT:    v_fma_f32 v2, v0, s4, -v1
5903; GFX900-SDAG-NEXT:    v_fma_f32 v2, v0, s5, v2
5904; GFX900-SDAG-NEXT:    v_add_f32_e32 v1, v1, v2
5905; GFX900-SDAG-NEXT:    v_cmp_lt_f32_e64 vcc, |v0|, s6
5906; GFX900-SDAG-NEXT:    v_cndmask_b32_e32 v0, v0, v1, vcc
5907; GFX900-SDAG-NEXT:    v_add_f32_e32 v0, 0xc1b17218, v0
5908; GFX900-SDAG-NEXT:    s_setpc_b64 s[30:31]
5909;
5910; GFX900-GISEL-LABEL: v_log_f32_0:
5911; GFX900-GISEL:       ; %bb.0:
5912; GFX900-GISEL-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
5913; GFX900-GISEL-NEXT:    v_log_f32_e32 v0, 0
5914; GFX900-GISEL-NEXT:    v_mov_b32_e32 v1, 0x3f317217
5915; GFX900-GISEL-NEXT:    v_mov_b32_e32 v2, 0x3377d1cf
5916; GFX900-GISEL-NEXT:    v_mov_b32_e32 v3, 0x7f800000
5917; GFX900-GISEL-NEXT:    v_mul_f32_e32 v4, 0x3f317217, v0
5918; GFX900-GISEL-NEXT:    v_fma_f32 v1, v0, v1, -v4
5919; GFX900-GISEL-NEXT:    v_fma_f32 v1, v0, v2, v1
5920; GFX900-GISEL-NEXT:    v_add_f32_e32 v1, v4, v1
5921; GFX900-GISEL-NEXT:    v_cmp_lt_f32_e64 vcc, |v0|, v3
5922; GFX900-GISEL-NEXT:    v_cndmask_b32_e32 v0, v0, v1, vcc
5923; GFX900-GISEL-NEXT:    v_subrev_f32_e32 v0, 0x41b17218, v0
5924; GFX900-GISEL-NEXT:    s_setpc_b64 s[30:31]
5925;
5926; GFX1100-SDAG-LABEL: v_log_f32_0:
5927; GFX1100-SDAG:       ; %bb.0:
5928; GFX1100-SDAG-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
5929; GFX1100-SDAG-NEXT:    v_log_f32_e32 v0, 0
5930; GFX1100-SDAG-NEXT:    s_waitcnt_depctr 0xfff
5931; GFX1100-SDAG-NEXT:    v_mul_f32_e32 v1, 0x3f317217, v0
5932; GFX1100-SDAG-NEXT:    v_cmp_gt_f32_e64 vcc_lo, 0x7f800000, |v0|
5933; GFX1100-SDAG-NEXT:    s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
5934; GFX1100-SDAG-NEXT:    v_fma_f32 v2, 0x3f317217, v0, -v1
5935; GFX1100-SDAG-NEXT:    v_fmamk_f32 v2, v0, 0x3377d1cf, v2
5936; GFX1100-SDAG-NEXT:    s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
5937; GFX1100-SDAG-NEXT:    v_add_f32_e32 v1, v1, v2
5938; GFX1100-SDAG-NEXT:    v_cndmask_b32_e32 v0, v0, v1, vcc_lo
5939; GFX1100-SDAG-NEXT:    s_delay_alu instid0(VALU_DEP_1)
5940; GFX1100-SDAG-NEXT:    v_add_f32_e32 v0, 0xc1b17218, v0
5941; GFX1100-SDAG-NEXT:    s_setpc_b64 s[30:31]
5942;
5943; GFX1100-GISEL-LABEL: v_log_f32_0:
5944; GFX1100-GISEL:       ; %bb.0:
5945; GFX1100-GISEL-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
5946; GFX1100-GISEL-NEXT:    v_log_f32_e32 v0, 0
5947; GFX1100-GISEL-NEXT:    s_waitcnt_depctr 0xfff
5948; GFX1100-GISEL-NEXT:    v_mul_f32_e32 v1, 0x3f317217, v0
5949; GFX1100-GISEL-NEXT:    v_cmp_gt_f32_e64 vcc_lo, 0x7f800000, |v0|
5950; GFX1100-GISEL-NEXT:    s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
5951; GFX1100-GISEL-NEXT:    v_fma_f32 v2, 0x3f317217, v0, -v1
5952; GFX1100-GISEL-NEXT:    v_fmac_f32_e32 v2, 0x3377d1cf, v0
5953; GFX1100-GISEL-NEXT:    s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
5954; GFX1100-GISEL-NEXT:    v_add_f32_e32 v1, v1, v2
5955; GFX1100-GISEL-NEXT:    v_cndmask_b32_e32 v0, v0, v1, vcc_lo
5956; GFX1100-GISEL-NEXT:    s_delay_alu instid0(VALU_DEP_1)
5957; GFX1100-GISEL-NEXT:    v_subrev_f32_e32 v0, 0x41b17218, v0
5958; GFX1100-GISEL-NEXT:    s_setpc_b64 s[30:31]
5959;
5960; R600-LABEL: v_log_f32_0:
5961; R600:       ; %bb.0:
5962; R600-NEXT:    CF_END
5963; R600-NEXT:    PAD
5964;
5965; CM-LABEL: v_log_f32_0:
5966; CM:       ; %bb.0:
5967; CM-NEXT:    CF_END
5968; CM-NEXT:    PAD
5969  %result = call float @llvm.log.f32(float 0.0)
5970  ret float %result
5971}
5972
5973define float @v_log_f32_from_fpext_f16(i16 %src.i) {
5974; SI-SDAG-LABEL: v_log_f32_from_fpext_f16:
5975; SI-SDAG:       ; %bb.0:
5976; SI-SDAG-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
5977; SI-SDAG-NEXT:    v_cvt_f32_f16_e32 v0, v0
5978; SI-SDAG-NEXT:    s_mov_b32 s4, 0x3f317217
5979; SI-SDAG-NEXT:    s_mov_b32 s5, 0x3377d1cf
5980; SI-SDAG-NEXT:    s_mov_b32 s6, 0x7f800000
5981; SI-SDAG-NEXT:    v_log_f32_e32 v0, v0
5982; SI-SDAG-NEXT:    v_mul_f32_e32 v1, 0x3f317217, v0
5983; SI-SDAG-NEXT:    v_fma_f32 v2, v0, s4, -v1
5984; SI-SDAG-NEXT:    v_fma_f32 v2, v0, s5, v2
5985; SI-SDAG-NEXT:    v_add_f32_e32 v1, v1, v2
5986; SI-SDAG-NEXT:    v_cmp_lt_f32_e64 vcc, |v0|, s6
5987; SI-SDAG-NEXT:    v_cndmask_b32_e32 v0, v0, v1, vcc
5988; SI-SDAG-NEXT:    s_setpc_b64 s[30:31]
5989;
5990; SI-GISEL-LABEL: v_log_f32_from_fpext_f16:
5991; SI-GISEL:       ; %bb.0:
5992; SI-GISEL-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
5993; SI-GISEL-NEXT:    v_cvt_f32_f16_e32 v0, v0
5994; SI-GISEL-NEXT:    v_mov_b32_e32 v1, 0x3f317217
5995; SI-GISEL-NEXT:    v_mov_b32_e32 v2, 0x3377d1cf
5996; SI-GISEL-NEXT:    v_mov_b32_e32 v3, 0x7f800000
5997; SI-GISEL-NEXT:    v_log_f32_e32 v0, v0
5998; SI-GISEL-NEXT:    v_mul_f32_e32 v4, 0x3f317217, v0
5999; SI-GISEL-NEXT:    v_fma_f32 v1, v0, v1, -v4
6000; SI-GISEL-NEXT:    v_fma_f32 v1, v0, v2, v1
6001; SI-GISEL-NEXT:    v_add_f32_e32 v1, v4, v1
6002; SI-GISEL-NEXT:    v_cmp_lt_f32_e64 vcc, |v0|, v3
6003; SI-GISEL-NEXT:    v_cndmask_b32_e32 v0, v0, v1, vcc
6004; SI-GISEL-NEXT:    s_setpc_b64 s[30:31]
6005;
6006; VI-SDAG-LABEL: v_log_f32_from_fpext_f16:
6007; VI-SDAG:       ; %bb.0:
6008; VI-SDAG-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
6009; VI-SDAG-NEXT:    v_cvt_f32_f16_e32 v0, v0
6010; VI-SDAG-NEXT:    s_mov_b32 s4, 0x7f800000
6011; VI-SDAG-NEXT:    v_log_f32_e32 v0, v0
6012; VI-SDAG-NEXT:    v_and_b32_e32 v1, 0xfffff000, v0
6013; VI-SDAG-NEXT:    v_sub_f32_e32 v3, v0, v1
6014; VI-SDAG-NEXT:    v_mul_f32_e32 v2, 0x3805fdf4, v1
6015; VI-SDAG-NEXT:    v_mul_f32_e32 v4, 0x3805fdf4, v3
6016; VI-SDAG-NEXT:    v_mul_f32_e32 v3, 0x3f317000, v3
6017; VI-SDAG-NEXT:    v_add_f32_e32 v2, v2, v4
6018; VI-SDAG-NEXT:    v_mul_f32_e32 v1, 0x3f317000, v1
6019; VI-SDAG-NEXT:    v_add_f32_e32 v2, v3, v2
6020; VI-SDAG-NEXT:    v_add_f32_e32 v1, v1, v2
6021; VI-SDAG-NEXT:    v_cmp_lt_f32_e64 vcc, |v0|, s4
6022; VI-SDAG-NEXT:    v_cndmask_b32_e32 v0, v0, v1, vcc
6023; VI-SDAG-NEXT:    s_setpc_b64 s[30:31]
6024;
6025; VI-GISEL-LABEL: v_log_f32_from_fpext_f16:
6026; VI-GISEL:       ; %bb.0:
6027; VI-GISEL-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
6028; VI-GISEL-NEXT:    v_cvt_f32_f16_e32 v0, v0
6029; VI-GISEL-NEXT:    v_mov_b32_e32 v1, 0x7f800000
6030; VI-GISEL-NEXT:    v_log_f32_e32 v0, v0
6031; VI-GISEL-NEXT:    v_and_b32_e32 v2, 0xfffff000, v0
6032; VI-GISEL-NEXT:    v_sub_f32_e32 v3, v0, v2
6033; VI-GISEL-NEXT:    v_mul_f32_e32 v4, 0x3805fdf4, v2
6034; VI-GISEL-NEXT:    v_mul_f32_e32 v5, 0x3805fdf4, v3
6035; VI-GISEL-NEXT:    v_mul_f32_e32 v3, 0x3f317000, v3
6036; VI-GISEL-NEXT:    v_add_f32_e32 v4, v4, v5
6037; VI-GISEL-NEXT:    v_mul_f32_e32 v2, 0x3f317000, v2
6038; VI-GISEL-NEXT:    v_add_f32_e32 v3, v3, v4
6039; VI-GISEL-NEXT:    v_add_f32_e32 v2, v2, v3
6040; VI-GISEL-NEXT:    v_cmp_lt_f32_e64 vcc, |v0|, v1
6041; VI-GISEL-NEXT:    v_cndmask_b32_e32 v0, v0, v2, vcc
6042; VI-GISEL-NEXT:    s_setpc_b64 s[30:31]
6043;
6044; GFX900-SDAG-LABEL: v_log_f32_from_fpext_f16:
6045; GFX900-SDAG:       ; %bb.0:
6046; GFX900-SDAG-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
6047; GFX900-SDAG-NEXT:    v_cvt_f32_f16_e32 v0, v0
6048; GFX900-SDAG-NEXT:    s_mov_b32 s4, 0x3f317217
6049; GFX900-SDAG-NEXT:    s_mov_b32 s5, 0x3377d1cf
6050; GFX900-SDAG-NEXT:    s_mov_b32 s6, 0x7f800000
6051; GFX900-SDAG-NEXT:    v_log_f32_e32 v0, v0
6052; GFX900-SDAG-NEXT:    v_mul_f32_e32 v1, 0x3f317217, v0
6053; GFX900-SDAG-NEXT:    v_fma_f32 v2, v0, s4, -v1
6054; GFX900-SDAG-NEXT:    v_fma_f32 v2, v0, s5, v2
6055; GFX900-SDAG-NEXT:    v_add_f32_e32 v1, v1, v2
6056; GFX900-SDAG-NEXT:    v_cmp_lt_f32_e64 vcc, |v0|, s6
6057; GFX900-SDAG-NEXT:    v_cndmask_b32_e32 v0, v0, v1, vcc
6058; GFX900-SDAG-NEXT:    s_setpc_b64 s[30:31]
6059;
6060; GFX900-GISEL-LABEL: v_log_f32_from_fpext_f16:
6061; GFX900-GISEL:       ; %bb.0:
6062; GFX900-GISEL-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
6063; GFX900-GISEL-NEXT:    v_cvt_f32_f16_e32 v0, v0
6064; GFX900-GISEL-NEXT:    v_mov_b32_e32 v1, 0x3f317217
6065; GFX900-GISEL-NEXT:    v_mov_b32_e32 v2, 0x3377d1cf
6066; GFX900-GISEL-NEXT:    v_mov_b32_e32 v3, 0x7f800000
6067; GFX900-GISEL-NEXT:    v_log_f32_e32 v0, v0
6068; GFX900-GISEL-NEXT:    v_mul_f32_e32 v4, 0x3f317217, v0
6069; GFX900-GISEL-NEXT:    v_fma_f32 v1, v0, v1, -v4
6070; GFX900-GISEL-NEXT:    v_fma_f32 v1, v0, v2, v1
6071; GFX900-GISEL-NEXT:    v_add_f32_e32 v1, v4, v1
6072; GFX900-GISEL-NEXT:    v_cmp_lt_f32_e64 vcc, |v0|, v3
6073; GFX900-GISEL-NEXT:    v_cndmask_b32_e32 v0, v0, v1, vcc
6074; GFX900-GISEL-NEXT:    s_setpc_b64 s[30:31]
6075;
6076; GFX1100-SDAG-LABEL: v_log_f32_from_fpext_f16:
6077; GFX1100-SDAG:       ; %bb.0:
6078; GFX1100-SDAG-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
6079; GFX1100-SDAG-NEXT:    v_cvt_f32_f16_e32 v0, v0
6080; GFX1100-SDAG-NEXT:    s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_2)
6081; GFX1100-SDAG-NEXT:    v_log_f32_e32 v0, v0
6082; GFX1100-SDAG-NEXT:    s_waitcnt_depctr 0xfff
6083; GFX1100-SDAG-NEXT:    v_mul_f32_e32 v1, 0x3f317217, v0
6084; GFX1100-SDAG-NEXT:    v_cmp_gt_f32_e64 vcc_lo, 0x7f800000, |v0|
6085; GFX1100-SDAG-NEXT:    v_fma_f32 v2, 0x3f317217, v0, -v1
6086; GFX1100-SDAG-NEXT:    s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
6087; GFX1100-SDAG-NEXT:    v_fmamk_f32 v2, v0, 0x3377d1cf, v2
6088; GFX1100-SDAG-NEXT:    v_add_f32_e32 v1, v1, v2
6089; GFX1100-SDAG-NEXT:    s_delay_alu instid0(VALU_DEP_1)
6090; GFX1100-SDAG-NEXT:    v_cndmask_b32_e32 v0, v0, v1, vcc_lo
6091; GFX1100-SDAG-NEXT:    s_setpc_b64 s[30:31]
6092;
6093; GFX1100-GISEL-LABEL: v_log_f32_from_fpext_f16:
6094; GFX1100-GISEL:       ; %bb.0:
6095; GFX1100-GISEL-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
6096; GFX1100-GISEL-NEXT:    v_cvt_f32_f16_e32 v0, v0
6097; GFX1100-GISEL-NEXT:    s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_2)
6098; GFX1100-GISEL-NEXT:    v_log_f32_e32 v0, v0
6099; GFX1100-GISEL-NEXT:    s_waitcnt_depctr 0xfff
6100; GFX1100-GISEL-NEXT:    v_mul_f32_e32 v1, 0x3f317217, v0
6101; GFX1100-GISEL-NEXT:    v_cmp_gt_f32_e64 vcc_lo, 0x7f800000, |v0|
6102; GFX1100-GISEL-NEXT:    v_fma_f32 v2, 0x3f317217, v0, -v1
6103; GFX1100-GISEL-NEXT:    s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
6104; GFX1100-GISEL-NEXT:    v_fmac_f32_e32 v2, 0x3377d1cf, v0
6105; GFX1100-GISEL-NEXT:    v_add_f32_e32 v1, v1, v2
6106; GFX1100-GISEL-NEXT:    s_delay_alu instid0(VALU_DEP_1)
6107; GFX1100-GISEL-NEXT:    v_cndmask_b32_e32 v0, v0, v1, vcc_lo
6108; GFX1100-GISEL-NEXT:    s_setpc_b64 s[30:31]
6109;
6110; R600-LABEL: v_log_f32_from_fpext_f16:
6111; R600:       ; %bb.0:
6112; R600-NEXT:    CF_END
6113; R600-NEXT:    PAD
6114;
6115; CM-LABEL: v_log_f32_from_fpext_f16:
6116; CM:       ; %bb.0:
6117; CM-NEXT:    CF_END
6118; CM-NEXT:    PAD
6119  %src = bitcast i16 %src.i to half
6120  %fpext = fpext half %src to float
6121  %result = call float @llvm.log.f32(float %fpext)
6122  ret float %result
6123}
6124
6125define float @v_log_f32_from_fpext_math_f16(i16 %src0.i, i16 %src1.i) {
6126; SI-SDAG-LABEL: v_log_f32_from_fpext_math_f16:
6127; SI-SDAG:       ; %bb.0:
6128; SI-SDAG-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
6129; SI-SDAG-NEXT:    v_cvt_f32_f16_e32 v0, v0
6130; SI-SDAG-NEXT:    v_cvt_f32_f16_e32 v1, v1
6131; SI-SDAG-NEXT:    s_mov_b32 s4, 0x800000
6132; SI-SDAG-NEXT:    s_mov_b32 s5, 0x3377d1cf
6133; SI-SDAG-NEXT:    v_add_f32_e32 v0, v0, v1
6134; SI-SDAG-NEXT:    v_cmp_gt_f32_e32 vcc, s4, v0
6135; SI-SDAG-NEXT:    v_cndmask_b32_e64 v1, 0, 1, vcc
6136; SI-SDAG-NEXT:    v_lshlrev_b32_e32 v1, 5, v1
6137; SI-SDAG-NEXT:    v_ldexp_f32_e32 v0, v0, v1
6138; SI-SDAG-NEXT:    v_log_f32_e32 v0, v0
6139; SI-SDAG-NEXT:    s_mov_b32 s4, 0x3f317217
6140; SI-SDAG-NEXT:    v_mul_f32_e32 v1, 0x3f317217, v0
6141; SI-SDAG-NEXT:    v_fma_f32 v2, v0, s4, -v1
6142; SI-SDAG-NEXT:    v_fma_f32 v2, v0, s5, v2
6143; SI-SDAG-NEXT:    s_mov_b32 s4, 0x7f800000
6144; SI-SDAG-NEXT:    v_add_f32_e32 v1, v1, v2
6145; SI-SDAG-NEXT:    v_cmp_lt_f32_e64 s[4:5], |v0|, s4
6146; SI-SDAG-NEXT:    v_cndmask_b32_e64 v0, v0, v1, s[4:5]
6147; SI-SDAG-NEXT:    v_mov_b32_e32 v1, 0x41b17218
6148; SI-SDAG-NEXT:    v_cndmask_b32_e32 v1, 0, v1, vcc
6149; SI-SDAG-NEXT:    v_sub_f32_e32 v0, v0, v1
6150; SI-SDAG-NEXT:    s_setpc_b64 s[30:31]
6151;
6152; SI-GISEL-LABEL: v_log_f32_from_fpext_math_f16:
6153; SI-GISEL:       ; %bb.0:
6154; SI-GISEL-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
6155; SI-GISEL-NEXT:    v_cvt_f32_f16_e32 v0, v0
6156; SI-GISEL-NEXT:    v_cvt_f32_f16_e32 v1, v1
6157; SI-GISEL-NEXT:    v_mov_b32_e32 v2, 0x3377d1cf
6158; SI-GISEL-NEXT:    v_mov_b32_e32 v3, 0x7f800000
6159; SI-GISEL-NEXT:    v_add_f32_e32 v0, v0, v1
6160; SI-GISEL-NEXT:    v_cvt_f16_f32_e32 v0, v0
6161; SI-GISEL-NEXT:    v_mov_b32_e32 v1, 0x3f317217
6162; SI-GISEL-NEXT:    v_cvt_f32_f16_e32 v0, v0
6163; SI-GISEL-NEXT:    v_log_f32_e32 v0, v0
6164; SI-GISEL-NEXT:    v_mul_f32_e32 v4, 0x3f317217, v0
6165; SI-GISEL-NEXT:    v_fma_f32 v1, v0, v1, -v4
6166; SI-GISEL-NEXT:    v_fma_f32 v1, v0, v2, v1
6167; SI-GISEL-NEXT:    v_add_f32_e32 v1, v4, v1
6168; SI-GISEL-NEXT:    v_cmp_lt_f32_e64 vcc, |v0|, v3
6169; SI-GISEL-NEXT:    v_cndmask_b32_e32 v0, v0, v1, vcc
6170; SI-GISEL-NEXT:    s_setpc_b64 s[30:31]
6171;
6172; VI-SDAG-LABEL: v_log_f32_from_fpext_math_f16:
6173; VI-SDAG:       ; %bb.0:
6174; VI-SDAG-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
6175; VI-SDAG-NEXT:    v_add_f16_e32 v0, v0, v1
6176; VI-SDAG-NEXT:    v_cvt_f32_f16_e32 v0, v0
6177; VI-SDAG-NEXT:    s_mov_b32 s4, 0x7f800000
6178; VI-SDAG-NEXT:    v_log_f32_e32 v0, v0
6179; VI-SDAG-NEXT:    v_and_b32_e32 v1, 0xfffff000, v0
6180; VI-SDAG-NEXT:    v_sub_f32_e32 v2, v0, v1
6181; VI-SDAG-NEXT:    v_mul_f32_e32 v3, 0x3805fdf4, v1
6182; VI-SDAG-NEXT:    v_mul_f32_e32 v4, 0x3f317000, v2
6183; VI-SDAG-NEXT:    v_mul_f32_e32 v2, 0x3805fdf4, v2
6184; VI-SDAG-NEXT:    v_add_f32_e32 v2, v3, v2
6185; VI-SDAG-NEXT:    v_mul_f32_e32 v1, 0x3f317000, v1
6186; VI-SDAG-NEXT:    v_add_f32_e32 v2, v4, v2
6187; VI-SDAG-NEXT:    v_add_f32_e32 v1, v1, v2
6188; VI-SDAG-NEXT:    v_cmp_lt_f32_e64 vcc, |v0|, s4
6189; VI-SDAG-NEXT:    v_cndmask_b32_e32 v0, v0, v1, vcc
6190; VI-SDAG-NEXT:    s_setpc_b64 s[30:31]
6191;
6192; VI-GISEL-LABEL: v_log_f32_from_fpext_math_f16:
6193; VI-GISEL:       ; %bb.0:
6194; VI-GISEL-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
6195; VI-GISEL-NEXT:    v_add_f16_e32 v0, v0, v1
6196; VI-GISEL-NEXT:    v_cvt_f32_f16_e32 v0, v0
6197; VI-GISEL-NEXT:    v_mov_b32_e32 v1, 0x7f800000
6198; VI-GISEL-NEXT:    v_log_f32_e32 v0, v0
6199; VI-GISEL-NEXT:    v_and_b32_e32 v2, 0xfffff000, v0
6200; VI-GISEL-NEXT:    v_sub_f32_e32 v3, v0, v2
6201; VI-GISEL-NEXT:    v_mul_f32_e32 v4, 0x3805fdf4, v2
6202; VI-GISEL-NEXT:    v_mul_f32_e32 v5, 0x3805fdf4, v3
6203; VI-GISEL-NEXT:    v_mul_f32_e32 v3, 0x3f317000, v3
6204; VI-GISEL-NEXT:    v_add_f32_e32 v4, v4, v5
6205; VI-GISEL-NEXT:    v_mul_f32_e32 v2, 0x3f317000, v2
6206; VI-GISEL-NEXT:    v_add_f32_e32 v3, v3, v4
6207; VI-GISEL-NEXT:    v_add_f32_e32 v2, v2, v3
6208; VI-GISEL-NEXT:    v_cmp_lt_f32_e64 vcc, |v0|, v1
6209; VI-GISEL-NEXT:    v_cndmask_b32_e32 v0, v0, v2, vcc
6210; VI-GISEL-NEXT:    s_setpc_b64 s[30:31]
6211;
6212; GFX900-SDAG-LABEL: v_log_f32_from_fpext_math_f16:
6213; GFX900-SDAG:       ; %bb.0:
6214; GFX900-SDAG-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
6215; GFX900-SDAG-NEXT:    v_add_f16_e32 v0, v0, v1
6216; GFX900-SDAG-NEXT:    v_cvt_f32_f16_e32 v0, v0
6217; GFX900-SDAG-NEXT:    s_mov_b32 s4, 0x3f317217
6218; GFX900-SDAG-NEXT:    s_mov_b32 s5, 0x3377d1cf
6219; GFX900-SDAG-NEXT:    s_mov_b32 s6, 0x7f800000
6220; GFX900-SDAG-NEXT:    v_log_f32_e32 v0, v0
6221; GFX900-SDAG-NEXT:    v_mul_f32_e32 v1, 0x3f317217, v0
6222; GFX900-SDAG-NEXT:    v_fma_f32 v2, v0, s4, -v1
6223; GFX900-SDAG-NEXT:    v_fma_f32 v2, v0, s5, v2
6224; GFX900-SDAG-NEXT:    v_add_f32_e32 v1, v1, v2
6225; GFX900-SDAG-NEXT:    v_cmp_lt_f32_e64 vcc, |v0|, s6
6226; GFX900-SDAG-NEXT:    v_cndmask_b32_e32 v0, v0, v1, vcc
6227; GFX900-SDAG-NEXT:    s_setpc_b64 s[30:31]
6228;
6229; GFX900-GISEL-LABEL: v_log_f32_from_fpext_math_f16:
6230; GFX900-GISEL:       ; %bb.0:
6231; GFX900-GISEL-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
6232; GFX900-GISEL-NEXT:    v_add_f16_e32 v0, v0, v1
6233; GFX900-GISEL-NEXT:    v_cvt_f32_f16_e32 v0, v0
6234; GFX900-GISEL-NEXT:    v_mov_b32_e32 v1, 0x3f317217
6235; GFX900-GISEL-NEXT:    v_mov_b32_e32 v2, 0x3377d1cf
6236; GFX900-GISEL-NEXT:    v_mov_b32_e32 v3, 0x7f800000
6237; GFX900-GISEL-NEXT:    v_log_f32_e32 v0, v0
6238; GFX900-GISEL-NEXT:    v_mul_f32_e32 v4, 0x3f317217, v0
6239; GFX900-GISEL-NEXT:    v_fma_f32 v1, v0, v1, -v4
6240; GFX900-GISEL-NEXT:    v_fma_f32 v1, v0, v2, v1
6241; GFX900-GISEL-NEXT:    v_add_f32_e32 v1, v4, v1
6242; GFX900-GISEL-NEXT:    v_cmp_lt_f32_e64 vcc, |v0|, v3
6243; GFX900-GISEL-NEXT:    v_cndmask_b32_e32 v0, v0, v1, vcc
6244; GFX900-GISEL-NEXT:    s_setpc_b64 s[30:31]
6245;
6246; GFX1100-SDAG-LABEL: v_log_f32_from_fpext_math_f16:
6247; GFX1100-SDAG:       ; %bb.0:
6248; GFX1100-SDAG-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
6249; GFX1100-SDAG-NEXT:    v_add_f16_e32 v0, v0, v1
6250; GFX1100-SDAG-NEXT:    s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
6251; GFX1100-SDAG-NEXT:    v_cvt_f32_f16_e32 v0, v0
6252; GFX1100-SDAG-NEXT:    v_log_f32_e32 v0, v0
6253; GFX1100-SDAG-NEXT:    s_waitcnt_depctr 0xfff
6254; GFX1100-SDAG-NEXT:    v_mul_f32_e32 v1, 0x3f317217, v0
6255; GFX1100-SDAG-NEXT:    v_cmp_gt_f32_e64 vcc_lo, 0x7f800000, |v0|
6256; GFX1100-SDAG-NEXT:    s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
6257; GFX1100-SDAG-NEXT:    v_fma_f32 v2, 0x3f317217, v0, -v1
6258; GFX1100-SDAG-NEXT:    v_fmamk_f32 v2, v0, 0x3377d1cf, v2
6259; GFX1100-SDAG-NEXT:    s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
6260; GFX1100-SDAG-NEXT:    v_add_f32_e32 v1, v1, v2
6261; GFX1100-SDAG-NEXT:    v_cndmask_b32_e32 v0, v0, v1, vcc_lo
6262; GFX1100-SDAG-NEXT:    s_setpc_b64 s[30:31]
6263;
6264; GFX1100-GISEL-LABEL: v_log_f32_from_fpext_math_f16:
6265; GFX1100-GISEL:       ; %bb.0:
6266; GFX1100-GISEL-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
6267; GFX1100-GISEL-NEXT:    v_add_f16_e32 v0, v0, v1
6268; GFX1100-GISEL-NEXT:    s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
6269; GFX1100-GISEL-NEXT:    v_cvt_f32_f16_e32 v0, v0
6270; GFX1100-GISEL-NEXT:    v_log_f32_e32 v0, v0
6271; GFX1100-GISEL-NEXT:    s_waitcnt_depctr 0xfff
6272; GFX1100-GISEL-NEXT:    v_mul_f32_e32 v1, 0x3f317217, v0
6273; GFX1100-GISEL-NEXT:    v_cmp_gt_f32_e64 vcc_lo, 0x7f800000, |v0|
6274; GFX1100-GISEL-NEXT:    s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
6275; GFX1100-GISEL-NEXT:    v_fma_f32 v2, 0x3f317217, v0, -v1
6276; GFX1100-GISEL-NEXT:    v_fmac_f32_e32 v2, 0x3377d1cf, v0
6277; GFX1100-GISEL-NEXT:    s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
6278; GFX1100-GISEL-NEXT:    v_add_f32_e32 v1, v1, v2
6279; GFX1100-GISEL-NEXT:    v_cndmask_b32_e32 v0, v0, v1, vcc_lo
6280; GFX1100-GISEL-NEXT:    s_setpc_b64 s[30:31]
6281;
6282; R600-LABEL: v_log_f32_from_fpext_math_f16:
6283; R600:       ; %bb.0:
6284; R600-NEXT:    CF_END
6285; R600-NEXT:    PAD
6286;
6287; CM-LABEL: v_log_f32_from_fpext_math_f16:
6288; CM:       ; %bb.0:
6289; CM-NEXT:    CF_END
6290; CM-NEXT:    PAD
6291  %src0 = bitcast i16 %src0.i to half
6292  %src1 = bitcast i16 %src1.i to half
6293  %fadd = fadd half %src0, %src1
6294  %fpext = fpext half %fadd to float
6295  %result = call float @llvm.log.f32(float %fpext)
6296  ret float %result
6297}
6298
6299define float @v_log_f32_from_fpext_bf16(bfloat %src) {
6300; SI-LABEL: v_log_f32_from_fpext_bf16:
6301; SI:       ; %bb.0:
6302; SI-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
6303; SI-NEXT:    s_mov_b32 s4, 0x800000
6304; SI-NEXT:    v_cmp_gt_f32_e32 vcc, s4, v0
6305; SI-NEXT:    v_cndmask_b32_e64 v1, 0, 1, vcc
6306; SI-NEXT:    v_lshlrev_b32_e32 v1, 5, v1
6307; SI-NEXT:    v_ldexp_f32_e32 v0, v0, v1
6308; SI-NEXT:    v_log_f32_e32 v0, v0
6309; SI-NEXT:    s_mov_b32 s4, 0x3f317217
6310; SI-NEXT:    v_mul_f32_e32 v1, 0x3f317217, v0
6311; SI-NEXT:    v_fma_f32 v2, v0, s4, -v1
6312; SI-NEXT:    s_mov_b32 s4, 0x3377d1cf
6313; SI-NEXT:    v_fma_f32 v2, v0, s4, v2
6314; SI-NEXT:    s_mov_b32 s4, 0x7f800000
6315; SI-NEXT:    v_add_f32_e32 v1, v1, v2
6316; SI-NEXT:    v_cmp_lt_f32_e64 s[4:5], |v0|, s4
6317; SI-NEXT:    v_cndmask_b32_e64 v0, v0, v1, s[4:5]
6318; SI-NEXT:    v_mov_b32_e32 v1, 0x41b17218
6319; SI-NEXT:    v_cndmask_b32_e32 v1, 0, v1, vcc
6320; SI-NEXT:    v_sub_f32_e32 v0, v0, v1
6321; SI-NEXT:    s_setpc_b64 s[30:31]
6322;
6323; VI-LABEL: v_log_f32_from_fpext_bf16:
6324; VI:       ; %bb.0:
6325; VI-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
6326; VI-NEXT:    v_lshlrev_b32_e32 v0, 16, v0
6327; VI-NEXT:    s_mov_b32 s4, 0x800000
6328; VI-NEXT:    v_cmp_gt_f32_e32 vcc, s4, v0
6329; VI-NEXT:    v_cndmask_b32_e64 v1, 0, 1, vcc
6330; VI-NEXT:    v_lshlrev_b32_e32 v1, 5, v1
6331; VI-NEXT:    v_ldexp_f32 v0, v0, v1
6332; VI-NEXT:    v_log_f32_e32 v0, v0
6333; VI-NEXT:    s_mov_b32 s4, 0x7f800000
6334; VI-NEXT:    v_and_b32_e32 v1, 0xfffff000, v0
6335; VI-NEXT:    v_sub_f32_e32 v2, v0, v1
6336; VI-NEXT:    v_mul_f32_e32 v3, 0x3f317000, v2
6337; VI-NEXT:    v_mul_f32_e32 v2, 0x3805fdf4, v2
6338; VI-NEXT:    v_mul_f32_e32 v4, 0x3805fdf4, v1
6339; VI-NEXT:    v_add_f32_e32 v2, v4, v2
6340; VI-NEXT:    v_add_f32_e32 v2, v3, v2
6341; VI-NEXT:    v_mul_f32_e32 v1, 0x3f317000, v1
6342; VI-NEXT:    v_add_f32_e32 v1, v1, v2
6343; VI-NEXT:    v_cmp_lt_f32_e64 s[4:5], |v0|, s4
6344; VI-NEXT:    v_cndmask_b32_e64 v0, v0, v1, s[4:5]
6345; VI-NEXT:    v_mov_b32_e32 v1, 0x41b17218
6346; VI-NEXT:    v_cndmask_b32_e32 v1, 0, v1, vcc
6347; VI-NEXT:    v_sub_f32_e32 v0, v0, v1
6348; VI-NEXT:    s_setpc_b64 s[30:31]
6349;
6350; GFX900-LABEL: v_log_f32_from_fpext_bf16:
6351; GFX900:       ; %bb.0:
6352; GFX900-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
6353; GFX900-NEXT:    v_lshlrev_b32_e32 v0, 16, v0
6354; GFX900-NEXT:    s_mov_b32 s4, 0x800000
6355; GFX900-NEXT:    v_cmp_gt_f32_e32 vcc, s4, v0
6356; GFX900-NEXT:    v_cndmask_b32_e64 v1, 0, 1, vcc
6357; GFX900-NEXT:    v_lshlrev_b32_e32 v1, 5, v1
6358; GFX900-NEXT:    v_ldexp_f32 v0, v0, v1
6359; GFX900-NEXT:    v_log_f32_e32 v0, v0
6360; GFX900-NEXT:    s_mov_b32 s4, 0x3f317217
6361; GFX900-NEXT:    v_mul_f32_e32 v1, 0x3f317217, v0
6362; GFX900-NEXT:    v_fma_f32 v2, v0, s4, -v1
6363; GFX900-NEXT:    s_mov_b32 s4, 0x3377d1cf
6364; GFX900-NEXT:    v_fma_f32 v2, v0, s4, v2
6365; GFX900-NEXT:    s_mov_b32 s4, 0x7f800000
6366; GFX900-NEXT:    v_add_f32_e32 v1, v1, v2
6367; GFX900-NEXT:    v_cmp_lt_f32_e64 s[4:5], |v0|, s4
6368; GFX900-NEXT:    v_cndmask_b32_e64 v0, v0, v1, s[4:5]
6369; GFX900-NEXT:    v_mov_b32_e32 v1, 0x41b17218
6370; GFX900-NEXT:    v_cndmask_b32_e32 v1, 0, v1, vcc
6371; GFX900-NEXT:    v_sub_f32_e32 v0, v0, v1
6372; GFX900-NEXT:    s_setpc_b64 s[30:31]
6373;
6374; GFX1100-LABEL: v_log_f32_from_fpext_bf16:
6375; GFX1100:       ; %bb.0:
6376; GFX1100-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
6377; GFX1100-NEXT:    v_lshlrev_b32_e32 v0, 16, v0
6378; GFX1100-NEXT:    s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
6379; GFX1100-NEXT:    v_cmp_gt_f32_e32 vcc_lo, 0x800000, v0
6380; GFX1100-NEXT:    v_cndmask_b32_e64 v1, 0, 1, vcc_lo
6381; GFX1100-NEXT:    v_lshlrev_b32_e32 v1, 5, v1
6382; GFX1100-NEXT:    s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
6383; GFX1100-NEXT:    v_ldexp_f32 v0, v0, v1
6384; GFX1100-NEXT:    v_log_f32_e32 v0, v0
6385; GFX1100-NEXT:    s_waitcnt_depctr 0xfff
6386; GFX1100-NEXT:    v_mul_f32_e32 v1, 0x3f317217, v0
6387; GFX1100-NEXT:    v_cmp_gt_f32_e64 s0, 0x7f800000, |v0|
6388; GFX1100-NEXT:    s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
6389; GFX1100-NEXT:    v_fma_f32 v2, 0x3f317217, v0, -v1
6390; GFX1100-NEXT:    v_fmamk_f32 v2, v0, 0x3377d1cf, v2
6391; GFX1100-NEXT:    s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
6392; GFX1100-NEXT:    v_add_f32_e32 v1, v1, v2
6393; GFX1100-NEXT:    v_cndmask_b32_e64 v0, v0, v1, s0
6394; GFX1100-NEXT:    v_cndmask_b32_e64 v1, 0, 0x41b17218, vcc_lo
6395; GFX1100-NEXT:    s_delay_alu instid0(VALU_DEP_1)
6396; GFX1100-NEXT:    v_sub_f32_e32 v0, v0, v1
6397; GFX1100-NEXT:    s_setpc_b64 s[30:31]
6398;
6399; R600-LABEL: v_log_f32_from_fpext_bf16:
6400; R600:       ; %bb.0:
6401; R600-NEXT:    CF_END
6402; R600-NEXT:    PAD
6403;
6404; CM-LABEL: v_log_f32_from_fpext_bf16:
6405; CM:       ; %bb.0:
6406; CM-NEXT:    CF_END
6407; CM-NEXT:    PAD
6408  %fpext = fpext bfloat %src to float
6409  %result = call float @llvm.log.f32(float %fpext)
6410  ret float %result
6411}
6412
6413define half @v_log_f16(half %in) {
6414; SI-SDAG-LABEL: v_log_f16:
6415; SI-SDAG:       ; %bb.0:
6416; SI-SDAG-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
6417; SI-SDAG-NEXT:    v_cvt_f16_f32_e32 v0, v0
6418; SI-SDAG-NEXT:    v_cvt_f32_f16_e32 v0, v0
6419; SI-SDAG-NEXT:    v_log_f32_e32 v0, v0
6420; SI-SDAG-NEXT:    v_mul_f32_e32 v0, 0x3f317218, v0
6421; SI-SDAG-NEXT:    v_cvt_f16_f32_e32 v0, v0
6422; SI-SDAG-NEXT:    v_cvt_f32_f16_e32 v0, v0
6423; SI-SDAG-NEXT:    s_setpc_b64 s[30:31]
6424;
6425; SI-GISEL-LABEL: v_log_f16:
6426; SI-GISEL:       ; %bb.0:
6427; SI-GISEL-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
6428; SI-GISEL-NEXT:    v_cvt_f32_f16_e32 v0, v0
6429; SI-GISEL-NEXT:    v_log_f32_e32 v0, v0
6430; SI-GISEL-NEXT:    v_mul_f32_e32 v0, 0x3f317218, v0
6431; SI-GISEL-NEXT:    v_cvt_f16_f32_e32 v0, v0
6432; SI-GISEL-NEXT:    s_setpc_b64 s[30:31]
6433;
6434; VI-LABEL: v_log_f16:
6435; VI:       ; %bb.0:
6436; VI-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
6437; VI-NEXT:    v_log_f16_e32 v0, v0
6438; VI-NEXT:    v_mul_f16_e32 v0, 0x398c, v0
6439; VI-NEXT:    s_setpc_b64 s[30:31]
6440;
6441; GFX900-LABEL: v_log_f16:
6442; GFX900:       ; %bb.0:
6443; GFX900-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
6444; GFX900-NEXT:    v_log_f16_e32 v0, v0
6445; GFX900-NEXT:    v_mul_f16_e32 v0, 0x398c, v0
6446; GFX900-NEXT:    s_setpc_b64 s[30:31]
6447;
6448; GFX1100-LABEL: v_log_f16:
6449; GFX1100:       ; %bb.0:
6450; GFX1100-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
6451; GFX1100-NEXT:    v_log_f16_e32 v0, v0
6452; GFX1100-NEXT:    s_waitcnt_depctr 0xfff
6453; GFX1100-NEXT:    v_mul_f16_e32 v0, 0x398c, v0
6454; GFX1100-NEXT:    s_setpc_b64 s[30:31]
6455;
6456; R600-LABEL: v_log_f16:
6457; R600:       ; %bb.0:
6458; R600-NEXT:    CF_END
6459; R600-NEXT:    PAD
6460;
6461; CM-LABEL: v_log_f16:
6462; CM:       ; %bb.0:
6463; CM-NEXT:    CF_END
6464; CM-NEXT:    PAD
6465  %result = call half @llvm.log.f16(half %in)
6466  ret half %result
6467}
6468
6469define half @v_log_fabs_f16(half %in) {
6470; SI-SDAG-LABEL: v_log_fabs_f16:
6471; SI-SDAG:       ; %bb.0:
6472; SI-SDAG-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
6473; SI-SDAG-NEXT:    v_cvt_f16_f32_e32 v0, v0
6474; SI-SDAG-NEXT:    v_cvt_f32_f16_e64 v0, |v0|
6475; SI-SDAG-NEXT:    v_log_f32_e32 v0, v0
6476; SI-SDAG-NEXT:    v_mul_f32_e32 v0, 0x3f317218, v0
6477; SI-SDAG-NEXT:    v_cvt_f16_f32_e32 v0, v0
6478; SI-SDAG-NEXT:    v_cvt_f32_f16_e32 v0, v0
6479; SI-SDAG-NEXT:    s_setpc_b64 s[30:31]
6480;
6481; SI-GISEL-LABEL: v_log_fabs_f16:
6482; SI-GISEL:       ; %bb.0:
6483; SI-GISEL-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
6484; SI-GISEL-NEXT:    v_cvt_f32_f16_e64 v0, |v0|
6485; SI-GISEL-NEXT:    v_log_f32_e32 v0, v0
6486; SI-GISEL-NEXT:    v_mul_f32_e32 v0, 0x3f317218, v0
6487; SI-GISEL-NEXT:    v_cvt_f16_f32_e32 v0, v0
6488; SI-GISEL-NEXT:    s_setpc_b64 s[30:31]
6489;
6490; VI-LABEL: v_log_fabs_f16:
6491; VI:       ; %bb.0:
6492; VI-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
6493; VI-NEXT:    v_log_f16_e64 v0, |v0|
6494; VI-NEXT:    v_mul_f16_e32 v0, 0x398c, v0
6495; VI-NEXT:    s_setpc_b64 s[30:31]
6496;
6497; GFX900-LABEL: v_log_fabs_f16:
6498; GFX900:       ; %bb.0:
6499; GFX900-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
6500; GFX900-NEXT:    v_log_f16_e64 v0, |v0|
6501; GFX900-NEXT:    v_mul_f16_e32 v0, 0x398c, v0
6502; GFX900-NEXT:    s_setpc_b64 s[30:31]
6503;
6504; GFX1100-LABEL: v_log_fabs_f16:
6505; GFX1100:       ; %bb.0:
6506; GFX1100-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
6507; GFX1100-NEXT:    v_log_f16_e64 v0, |v0|
6508; GFX1100-NEXT:    s_waitcnt_depctr 0xfff
6509; GFX1100-NEXT:    v_mul_f16_e32 v0, 0x398c, v0
6510; GFX1100-NEXT:    s_setpc_b64 s[30:31]
6511;
6512; R600-LABEL: v_log_fabs_f16:
6513; R600:       ; %bb.0:
6514; R600-NEXT:    CF_END
6515; R600-NEXT:    PAD
6516;
6517; CM-LABEL: v_log_fabs_f16:
6518; CM:       ; %bb.0:
6519; CM-NEXT:    CF_END
6520; CM-NEXT:    PAD
6521  %fabs = call half @llvm.fabs.f16(half %in)
6522  %result = call half @llvm.log.f16(half %fabs)
6523  ret half %result
6524}
6525
6526define half @v_log_fneg_fabs_f16(half %in) {
6527; SI-SDAG-LABEL: v_log_fneg_fabs_f16:
6528; SI-SDAG:       ; %bb.0:
6529; SI-SDAG-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
6530; SI-SDAG-NEXT:    v_cvt_f16_f32_e32 v0, v0
6531; SI-SDAG-NEXT:    v_cvt_f32_f16_e64 v0, -|v0|
6532; SI-SDAG-NEXT:    v_log_f32_e32 v0, v0
6533; SI-SDAG-NEXT:    v_mul_f32_e32 v0, 0x3f317218, v0
6534; SI-SDAG-NEXT:    v_cvt_f16_f32_e32 v0, v0
6535; SI-SDAG-NEXT:    v_cvt_f32_f16_e32 v0, v0
6536; SI-SDAG-NEXT:    s_setpc_b64 s[30:31]
6537;
6538; SI-GISEL-LABEL: v_log_fneg_fabs_f16:
6539; SI-GISEL:       ; %bb.0:
6540; SI-GISEL-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
6541; SI-GISEL-NEXT:    v_cvt_f32_f16_e64 v0, -|v0|
6542; SI-GISEL-NEXT:    v_log_f32_e32 v0, v0
6543; SI-GISEL-NEXT:    v_mul_f32_e32 v0, 0x3f317218, v0
6544; SI-GISEL-NEXT:    v_cvt_f16_f32_e32 v0, v0
6545; SI-GISEL-NEXT:    s_setpc_b64 s[30:31]
6546;
6547; VI-LABEL: v_log_fneg_fabs_f16:
6548; VI:       ; %bb.0:
6549; VI-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
6550; VI-NEXT:    v_log_f16_e64 v0, -|v0|
6551; VI-NEXT:    v_mul_f16_e32 v0, 0x398c, v0
6552; VI-NEXT:    s_setpc_b64 s[30:31]
6553;
6554; GFX900-LABEL: v_log_fneg_fabs_f16:
6555; GFX900:       ; %bb.0:
6556; GFX900-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
6557; GFX900-NEXT:    v_log_f16_e64 v0, -|v0|
6558; GFX900-NEXT:    v_mul_f16_e32 v0, 0x398c, v0
6559; GFX900-NEXT:    s_setpc_b64 s[30:31]
6560;
6561; GFX1100-LABEL: v_log_fneg_fabs_f16:
6562; GFX1100:       ; %bb.0:
6563; GFX1100-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
6564; GFX1100-NEXT:    v_log_f16_e64 v0, -|v0|
6565; GFX1100-NEXT:    s_waitcnt_depctr 0xfff
6566; GFX1100-NEXT:    v_mul_f16_e32 v0, 0x398c, v0
6567; GFX1100-NEXT:    s_setpc_b64 s[30:31]
6568;
6569; R600-LABEL: v_log_fneg_fabs_f16:
6570; R600:       ; %bb.0:
6571; R600-NEXT:    CF_END
6572; R600-NEXT:    PAD
6573;
6574; CM-LABEL: v_log_fneg_fabs_f16:
6575; CM:       ; %bb.0:
6576; CM-NEXT:    CF_END
6577; CM-NEXT:    PAD
6578  %fabs = call half @llvm.fabs.f16(half %in)
6579  %fneg.fabs = fneg half %fabs
6580  %result = call half @llvm.log.f16(half %fneg.fabs)
6581  ret half %result
6582}
6583
6584define half @v_log_fneg_f16(half %in) {
6585; SI-SDAG-LABEL: v_log_fneg_f16:
6586; SI-SDAG:       ; %bb.0:
6587; SI-SDAG-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
6588; SI-SDAG-NEXT:    v_cvt_f16_f32_e64 v0, -v0
6589; SI-SDAG-NEXT:    v_cvt_f32_f16_e32 v0, v0
6590; SI-SDAG-NEXT:    v_log_f32_e32 v0, v0
6591; SI-SDAG-NEXT:    v_mul_f32_e32 v0, 0x3f317218, v0
6592; SI-SDAG-NEXT:    v_cvt_f16_f32_e32 v0, v0
6593; SI-SDAG-NEXT:    v_cvt_f32_f16_e32 v0, v0
6594; SI-SDAG-NEXT:    s_setpc_b64 s[30:31]
6595;
6596; SI-GISEL-LABEL: v_log_fneg_f16:
6597; SI-GISEL:       ; %bb.0:
6598; SI-GISEL-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
6599; SI-GISEL-NEXT:    v_cvt_f32_f16_e64 v0, -v0
6600; SI-GISEL-NEXT:    v_log_f32_e32 v0, v0
6601; SI-GISEL-NEXT:    v_mul_f32_e32 v0, 0x3f317218, v0
6602; SI-GISEL-NEXT:    v_cvt_f16_f32_e32 v0, v0
6603; SI-GISEL-NEXT:    s_setpc_b64 s[30:31]
6604;
6605; VI-LABEL: v_log_fneg_f16:
6606; VI:       ; %bb.0:
6607; VI-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
6608; VI-NEXT:    v_log_f16_e64 v0, -v0
6609; VI-NEXT:    v_mul_f16_e32 v0, 0x398c, v0
6610; VI-NEXT:    s_setpc_b64 s[30:31]
6611;
6612; GFX900-LABEL: v_log_fneg_f16:
6613; GFX900:       ; %bb.0:
6614; GFX900-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
6615; GFX900-NEXT:    v_log_f16_e64 v0, -v0
6616; GFX900-NEXT:    v_mul_f16_e32 v0, 0x398c, v0
6617; GFX900-NEXT:    s_setpc_b64 s[30:31]
6618;
6619; GFX1100-LABEL: v_log_fneg_f16:
6620; GFX1100:       ; %bb.0:
6621; GFX1100-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
6622; GFX1100-NEXT:    v_log_f16_e64 v0, -v0
6623; GFX1100-NEXT:    s_waitcnt_depctr 0xfff
6624; GFX1100-NEXT:    v_mul_f16_e32 v0, 0x398c, v0
6625; GFX1100-NEXT:    s_setpc_b64 s[30:31]
6626;
6627; R600-LABEL: v_log_fneg_f16:
6628; R600:       ; %bb.0:
6629; R600-NEXT:    CF_END
6630; R600-NEXT:    PAD
6631;
6632; CM-LABEL: v_log_fneg_f16:
6633; CM:       ; %bb.0:
6634; CM-NEXT:    CF_END
6635; CM-NEXT:    PAD
6636  %fneg = fneg half %in
6637  %result = call half @llvm.log.f16(half %fneg)
6638  ret half %result
6639}
6640
6641define half @v_log_f16_fast(half %in) {
6642; SI-SDAG-LABEL: v_log_f16_fast:
6643; SI-SDAG:       ; %bb.0:
6644; SI-SDAG-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
6645; SI-SDAG-NEXT:    v_cvt_f16_f32_e32 v0, v0
6646; SI-SDAG-NEXT:    v_cvt_f32_f16_e32 v0, v0
6647; SI-SDAG-NEXT:    v_log_f32_e32 v0, v0
6648; SI-SDAG-NEXT:    v_mul_f32_e32 v0, 0x3f317218, v0
6649; SI-SDAG-NEXT:    v_cvt_f16_f32_e32 v0, v0
6650; SI-SDAG-NEXT:    v_cvt_f32_f16_e32 v0, v0
6651; SI-SDAG-NEXT:    s_setpc_b64 s[30:31]
6652;
6653; SI-GISEL-LABEL: v_log_f16_fast:
6654; SI-GISEL:       ; %bb.0:
6655; SI-GISEL-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
6656; SI-GISEL-NEXT:    v_cvt_f32_f16_e32 v0, v0
6657; SI-GISEL-NEXT:    v_log_f32_e32 v0, v0
6658; SI-GISEL-NEXT:    v_mul_f32_e32 v0, 0x3f317218, v0
6659; SI-GISEL-NEXT:    v_cvt_f16_f32_e32 v0, v0
6660; SI-GISEL-NEXT:    s_setpc_b64 s[30:31]
6661;
6662; VI-LABEL: v_log_f16_fast:
6663; VI:       ; %bb.0:
6664; VI-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
6665; VI-NEXT:    v_log_f16_e32 v0, v0
6666; VI-NEXT:    v_mul_f16_e32 v0, 0x398c, v0
6667; VI-NEXT:    s_setpc_b64 s[30:31]
6668;
6669; GFX900-LABEL: v_log_f16_fast:
6670; GFX900:       ; %bb.0:
6671; GFX900-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
6672; GFX900-NEXT:    v_log_f16_e32 v0, v0
6673; GFX900-NEXT:    v_mul_f16_e32 v0, 0x398c, v0
6674; GFX900-NEXT:    s_setpc_b64 s[30:31]
6675;
6676; GFX1100-LABEL: v_log_f16_fast:
6677; GFX1100:       ; %bb.0:
6678; GFX1100-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
6679; GFX1100-NEXT:    v_log_f16_e32 v0, v0
6680; GFX1100-NEXT:    s_waitcnt_depctr 0xfff
6681; GFX1100-NEXT:    v_mul_f16_e32 v0, 0x398c, v0
6682; GFX1100-NEXT:    s_setpc_b64 s[30:31]
6683;
6684; R600-LABEL: v_log_f16_fast:
6685; R600:       ; %bb.0:
6686; R600-NEXT:    CF_END
6687; R600-NEXT:    PAD
6688;
6689; CM-LABEL: v_log_f16_fast:
6690; CM:       ; %bb.0:
6691; CM-NEXT:    CF_END
6692; CM-NEXT:    PAD
6693  %result = call fast half @llvm.log.f16(half %in)
6694  ret half %result
6695}
6696
6697define <2 x half> @v_log_v2f16(<2 x half> %in) {
6698; SI-SDAG-LABEL: v_log_v2f16:
6699; SI-SDAG:       ; %bb.0:
6700; SI-SDAG-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
6701; SI-SDAG-NEXT:    v_cvt_f16_f32_e32 v0, v0
6702; SI-SDAG-NEXT:    v_cvt_f16_f32_e32 v1, v1
6703; SI-SDAG-NEXT:    v_cvt_f32_f16_e32 v0, v0
6704; SI-SDAG-NEXT:    v_cvt_f32_f16_e32 v1, v1
6705; SI-SDAG-NEXT:    v_log_f32_e32 v0, v0
6706; SI-SDAG-NEXT:    v_log_f32_e32 v1, v1
6707; SI-SDAG-NEXT:    v_mul_f32_e32 v0, 0x3f317218, v0
6708; SI-SDAG-NEXT:    v_mul_f32_e32 v1, 0x3f317218, v1
6709; SI-SDAG-NEXT:    v_cvt_f16_f32_e32 v0, v0
6710; SI-SDAG-NEXT:    v_cvt_f16_f32_e32 v1, v1
6711; SI-SDAG-NEXT:    v_cvt_f32_f16_e32 v0, v0
6712; SI-SDAG-NEXT:    v_cvt_f32_f16_e32 v1, v1
6713; SI-SDAG-NEXT:    s_setpc_b64 s[30:31]
6714;
6715; SI-GISEL-LABEL: v_log_v2f16:
6716; SI-GISEL:       ; %bb.0:
6717; SI-GISEL-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
6718; SI-GISEL-NEXT:    v_cvt_f32_f16_e32 v0, v0
6719; SI-GISEL-NEXT:    v_cvt_f32_f16_e32 v1, v1
6720; SI-GISEL-NEXT:    v_log_f32_e32 v0, v0
6721; SI-GISEL-NEXT:    v_log_f32_e32 v1, v1
6722; SI-GISEL-NEXT:    v_mul_f32_e32 v0, 0x3f317218, v0
6723; SI-GISEL-NEXT:    v_mul_f32_e32 v1, 0x3f317218, v1
6724; SI-GISEL-NEXT:    v_cvt_f16_f32_e32 v0, v0
6725; SI-GISEL-NEXT:    v_cvt_f16_f32_e32 v1, v1
6726; SI-GISEL-NEXT:    s_setpc_b64 s[30:31]
6727;
6728; VI-SDAG-LABEL: v_log_v2f16:
6729; VI-SDAG:       ; %bb.0:
6730; VI-SDAG-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
6731; VI-SDAG-NEXT:    v_log_f16_sdwa v1, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1
6732; VI-SDAG-NEXT:    v_log_f16_e32 v0, v0
6733; VI-SDAG-NEXT:    v_mov_b32_e32 v2, 0x398c
6734; VI-SDAG-NEXT:    v_mul_f16_sdwa v1, v1, v2 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
6735; VI-SDAG-NEXT:    v_mul_f16_e32 v0, 0x398c, v0
6736; VI-SDAG-NEXT:    v_or_b32_e32 v0, v0, v1
6737; VI-SDAG-NEXT:    s_setpc_b64 s[30:31]
6738;
6739; VI-GISEL-LABEL: v_log_v2f16:
6740; VI-GISEL:       ; %bb.0:
6741; VI-GISEL-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
6742; VI-GISEL-NEXT:    v_log_f16_e32 v1, v0
6743; VI-GISEL-NEXT:    v_log_f16_sdwa v0, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1
6744; VI-GISEL-NEXT:    v_mov_b32_e32 v2, 0x398c
6745; VI-GISEL-NEXT:    v_mul_f16_e32 v1, 0x398c, v1
6746; VI-GISEL-NEXT:    v_mul_f16_sdwa v0, v0, v2 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
6747; VI-GISEL-NEXT:    v_or_b32_e32 v0, v1, v0
6748; VI-GISEL-NEXT:    s_setpc_b64 s[30:31]
6749;
6750; GFX900-LABEL: v_log_v2f16:
6751; GFX900:       ; %bb.0:
6752; GFX900-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
6753; GFX900-NEXT:    v_log_f16_e32 v1, v0
6754; GFX900-NEXT:    v_log_f16_sdwa v0, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1
6755; GFX900-NEXT:    v_mul_f16_e32 v1, 0x398c, v1
6756; GFX900-NEXT:    v_mul_f16_e32 v0, 0x398c, v0
6757; GFX900-NEXT:    v_pack_b32_f16 v0, v1, v0
6758; GFX900-NEXT:    s_setpc_b64 s[30:31]
6759;
6760; GFX1100-LABEL: v_log_v2f16:
6761; GFX1100:       ; %bb.0:
6762; GFX1100-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
6763; GFX1100-NEXT:    v_lshrrev_b32_e32 v1, 16, v0
6764; GFX1100-NEXT:    v_log_f16_e32 v0, v0
6765; GFX1100-NEXT:    s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_1)
6766; GFX1100-NEXT:    v_log_f16_e32 v1, v1
6767; GFX1100-NEXT:    s_waitcnt_depctr 0xfff
6768; GFX1100-NEXT:    v_mul_f16_e32 v0, 0x398c, v0
6769; GFX1100-NEXT:    v_mul_f16_e32 v1, 0x398c, v1
6770; GFX1100-NEXT:    v_pack_b32_f16 v0, v0, v1
6771; GFX1100-NEXT:    s_setpc_b64 s[30:31]
6772;
6773; R600-LABEL: v_log_v2f16:
6774; R600:       ; %bb.0:
6775; R600-NEXT:    CF_END
6776; R600-NEXT:    PAD
6777;
6778; CM-LABEL: v_log_v2f16:
6779; CM:       ; %bb.0:
6780; CM-NEXT:    CF_END
6781; CM-NEXT:    PAD
6782  %result = call <2 x half> @llvm.log.v2f16(<2 x half> %in)
6783  ret <2 x half> %result
6784}
6785
6786define <2 x half> @v_log_fabs_v2f16(<2 x half> %in) {
6787; SI-SDAG-LABEL: v_log_fabs_v2f16:
6788; SI-SDAG:       ; %bb.0:
6789; SI-SDAG-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
6790; SI-SDAG-NEXT:    v_cvt_f16_f32_e32 v0, v0
6791; SI-SDAG-NEXT:    v_cvt_f16_f32_e32 v1, v1
6792; SI-SDAG-NEXT:    v_cvt_f32_f16_e64 v0, |v0|
6793; SI-SDAG-NEXT:    v_cvt_f32_f16_e64 v1, |v1|
6794; SI-SDAG-NEXT:    v_log_f32_e32 v0, v0
6795; SI-SDAG-NEXT:    v_log_f32_e32 v1, v1
6796; SI-SDAG-NEXT:    v_mul_f32_e32 v0, 0x3f317218, v0
6797; SI-SDAG-NEXT:    v_mul_f32_e32 v1, 0x3f317218, v1
6798; SI-SDAG-NEXT:    v_cvt_f16_f32_e32 v0, v0
6799; SI-SDAG-NEXT:    v_cvt_f16_f32_e32 v1, v1
6800; SI-SDAG-NEXT:    v_cvt_f32_f16_e32 v0, v0
6801; SI-SDAG-NEXT:    v_cvt_f32_f16_e32 v1, v1
6802; SI-SDAG-NEXT:    s_setpc_b64 s[30:31]
6803;
6804; SI-GISEL-LABEL: v_log_fabs_v2f16:
6805; SI-GISEL:       ; %bb.0:
6806; SI-GISEL-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
6807; SI-GISEL-NEXT:    v_lshlrev_b32_e32 v1, 16, v1
6808; SI-GISEL-NEXT:    v_and_b32_e32 v0, 0xffff, v0
6809; SI-GISEL-NEXT:    v_or_b32_e32 v0, v1, v0
6810; SI-GISEL-NEXT:    v_and_b32_e32 v0, 0x7fff7fff, v0
6811; SI-GISEL-NEXT:    v_cvt_f32_f16_e32 v1, v0
6812; SI-GISEL-NEXT:    v_lshrrev_b32_e32 v0, 16, v0
6813; SI-GISEL-NEXT:    v_cvt_f32_f16_e32 v0, v0
6814; SI-GISEL-NEXT:    v_log_f32_e32 v1, v1
6815; SI-GISEL-NEXT:    v_log_f32_e32 v2, v0
6816; SI-GISEL-NEXT:    v_mul_f32_e32 v0, 0x3f317218, v1
6817; SI-GISEL-NEXT:    v_cvt_f16_f32_e32 v0, v0
6818; SI-GISEL-NEXT:    v_mul_f32_e32 v1, 0x3f317218, v2
6819; SI-GISEL-NEXT:    v_cvt_f16_f32_e32 v1, v1
6820; SI-GISEL-NEXT:    s_setpc_b64 s[30:31]
6821;
6822; VI-SDAG-LABEL: v_log_fabs_v2f16:
6823; VI-SDAG:       ; %bb.0:
6824; VI-SDAG-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
6825; VI-SDAG-NEXT:    v_log_f16_sdwa v1, |v0| dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1
6826; VI-SDAG-NEXT:    v_log_f16_e64 v0, |v0|
6827; VI-SDAG-NEXT:    v_mov_b32_e32 v2, 0x398c
6828; VI-SDAG-NEXT:    v_mul_f16_sdwa v1, v1, v2 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
6829; VI-SDAG-NEXT:    v_mul_f16_e32 v0, 0x398c, v0
6830; VI-SDAG-NEXT:    v_or_b32_e32 v0, v0, v1
6831; VI-SDAG-NEXT:    s_setpc_b64 s[30:31]
6832;
6833; VI-GISEL-LABEL: v_log_fabs_v2f16:
6834; VI-GISEL:       ; %bb.0:
6835; VI-GISEL-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
6836; VI-GISEL-NEXT:    v_and_b32_e32 v0, 0x7fff7fff, v0
6837; VI-GISEL-NEXT:    v_log_f16_e32 v1, v0
6838; VI-GISEL-NEXT:    v_log_f16_sdwa v0, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1
6839; VI-GISEL-NEXT:    v_mov_b32_e32 v2, 0x398c
6840; VI-GISEL-NEXT:    v_mul_f16_e32 v1, 0x398c, v1
6841; VI-GISEL-NEXT:    v_mul_f16_sdwa v0, v0, v2 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
6842; VI-GISEL-NEXT:    v_or_b32_e32 v0, v1, v0
6843; VI-GISEL-NEXT:    s_setpc_b64 s[30:31]
6844;
6845; GFX900-SDAG-LABEL: v_log_fabs_v2f16:
6846; GFX900-SDAG:       ; %bb.0:
6847; GFX900-SDAG-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
6848; GFX900-SDAG-NEXT:    v_log_f16_e64 v1, |v0|
6849; GFX900-SDAG-NEXT:    v_log_f16_sdwa v0, |v0| dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1
6850; GFX900-SDAG-NEXT:    v_mul_f16_e32 v1, 0x398c, v1
6851; GFX900-SDAG-NEXT:    v_mul_f16_e32 v0, 0x398c, v0
6852; GFX900-SDAG-NEXT:    v_pack_b32_f16 v0, v1, v0
6853; GFX900-SDAG-NEXT:    s_setpc_b64 s[30:31]
6854;
6855; GFX900-GISEL-LABEL: v_log_fabs_v2f16:
6856; GFX900-GISEL:       ; %bb.0:
6857; GFX900-GISEL-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
6858; GFX900-GISEL-NEXT:    v_and_b32_e32 v0, 0x7fff7fff, v0
6859; GFX900-GISEL-NEXT:    v_log_f16_e32 v1, v0
6860; GFX900-GISEL-NEXT:    v_log_f16_sdwa v0, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1
6861; GFX900-GISEL-NEXT:    v_mul_f16_e32 v1, 0x398c, v1
6862; GFX900-GISEL-NEXT:    v_mul_f16_e32 v0, 0x398c, v0
6863; GFX900-GISEL-NEXT:    v_pack_b32_f16 v0, v1, v0
6864; GFX900-GISEL-NEXT:    s_setpc_b64 s[30:31]
6865;
6866; GFX1100-SDAG-LABEL: v_log_fabs_v2f16:
6867; GFX1100-SDAG:       ; %bb.0:
6868; GFX1100-SDAG-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
6869; GFX1100-SDAG-NEXT:    v_lshrrev_b32_e32 v1, 16, v0
6870; GFX1100-SDAG-NEXT:    v_log_f16_e64 v0, |v0|
6871; GFX1100-SDAG-NEXT:    s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_1)
6872; GFX1100-SDAG-NEXT:    v_log_f16_e64 v1, |v1|
6873; GFX1100-SDAG-NEXT:    s_waitcnt_depctr 0xfff
6874; GFX1100-SDAG-NEXT:    v_mul_f16_e32 v0, 0x398c, v0
6875; GFX1100-SDAG-NEXT:    v_mul_f16_e32 v1, 0x398c, v1
6876; GFX1100-SDAG-NEXT:    v_pack_b32_f16 v0, v0, v1
6877; GFX1100-SDAG-NEXT:    s_setpc_b64 s[30:31]
6878;
6879; GFX1100-GISEL-LABEL: v_log_fabs_v2f16:
6880; GFX1100-GISEL:       ; %bb.0:
6881; GFX1100-GISEL-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
6882; GFX1100-GISEL-NEXT:    v_and_b32_e32 v0, 0x7fff7fff, v0
6883; GFX1100-GISEL-NEXT:    s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
6884; GFX1100-GISEL-NEXT:    v_lshrrev_b32_e32 v1, 16, v0
6885; GFX1100-GISEL-NEXT:    v_log_f16_e32 v0, v0
6886; GFX1100-GISEL-NEXT:    v_log_f16_e32 v1, v1
6887; GFX1100-GISEL-NEXT:    s_waitcnt_depctr 0xfff
6888; GFX1100-GISEL-NEXT:    v_mul_f16_e32 v0, 0x398c, v0
6889; GFX1100-GISEL-NEXT:    v_mul_f16_e32 v1, 0x398c, v1
6890; GFX1100-GISEL-NEXT:    s_delay_alu instid0(VALU_DEP_1)
6891; GFX1100-GISEL-NEXT:    v_pack_b32_f16 v0, v0, v1
6892; GFX1100-GISEL-NEXT:    s_setpc_b64 s[30:31]
6893;
6894; R600-LABEL: v_log_fabs_v2f16:
6895; R600:       ; %bb.0:
6896; R600-NEXT:    CF_END
6897; R600-NEXT:    PAD
6898;
6899; CM-LABEL: v_log_fabs_v2f16:
6900; CM:       ; %bb.0:
6901; CM-NEXT:    CF_END
6902; CM-NEXT:    PAD
6903  %fabs = call <2 x half> @llvm.fabs.v2f16(<2 x half> %in)
6904  %result = call <2 x half> @llvm.log.v2f16(<2 x half> %fabs)
6905  ret <2 x half> %result
6906}
6907
6908define <2 x half> @v_log_fneg_fabs_v2f16(<2 x half> %in) {
6909; SI-SDAG-LABEL: v_log_fneg_fabs_v2f16:
6910; SI-SDAG:       ; %bb.0:
6911; SI-SDAG-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
6912; SI-SDAG-NEXT:    v_cvt_f16_f32_e32 v1, v1
6913; SI-SDAG-NEXT:    v_cvt_f16_f32_e32 v0, v0
6914; SI-SDAG-NEXT:    v_lshlrev_b32_e32 v1, 16, v1
6915; SI-SDAG-NEXT:    v_or_b32_e32 v0, v0, v1
6916; SI-SDAG-NEXT:    v_or_b32_e32 v0, 0x80008000, v0
6917; SI-SDAG-NEXT:    v_cvt_f32_f16_e32 v1, v0
6918; SI-SDAG-NEXT:    v_lshrrev_b32_e32 v0, 16, v0
6919; SI-SDAG-NEXT:    v_cvt_f32_f16_e32 v0, v0
6920; SI-SDAG-NEXT:    v_log_f32_e32 v1, v1
6921; SI-SDAG-NEXT:    v_log_f32_e32 v0, v0
6922; SI-SDAG-NEXT:    v_mul_f32_e32 v1, 0x3f317218, v1
6923; SI-SDAG-NEXT:    v_cvt_f16_f32_e32 v1, v1
6924; SI-SDAG-NEXT:    v_mul_f32_e32 v0, 0x3f317218, v0
6925; SI-SDAG-NEXT:    v_cvt_f16_f32_e32 v2, v0
6926; SI-SDAG-NEXT:    v_cvt_f32_f16_e32 v0, v1
6927; SI-SDAG-NEXT:    v_cvt_f32_f16_e32 v1, v2
6928; SI-SDAG-NEXT:    s_setpc_b64 s[30:31]
6929;
6930; SI-GISEL-LABEL: v_log_fneg_fabs_v2f16:
6931; SI-GISEL:       ; %bb.0:
6932; SI-GISEL-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
6933; SI-GISEL-NEXT:    v_lshlrev_b32_e32 v1, 16, v1
6934; SI-GISEL-NEXT:    v_and_b32_e32 v0, 0xffff, v0
6935; SI-GISEL-NEXT:    v_or_b32_e32 v0, v1, v0
6936; SI-GISEL-NEXT:    v_or_b32_e32 v0, 0x80008000, v0
6937; SI-GISEL-NEXT:    v_cvt_f32_f16_e32 v1, v0
6938; SI-GISEL-NEXT:    v_lshrrev_b32_e32 v0, 16, v0
6939; SI-GISEL-NEXT:    v_cvt_f32_f16_e32 v0, v0
6940; SI-GISEL-NEXT:    v_log_f32_e32 v1, v1
6941; SI-GISEL-NEXT:    v_log_f32_e32 v2, v0
6942; SI-GISEL-NEXT:    v_mul_f32_e32 v0, 0x3f317218, v1
6943; SI-GISEL-NEXT:    v_cvt_f16_f32_e32 v0, v0
6944; SI-GISEL-NEXT:    v_mul_f32_e32 v1, 0x3f317218, v2
6945; SI-GISEL-NEXT:    v_cvt_f16_f32_e32 v1, v1
6946; SI-GISEL-NEXT:    s_setpc_b64 s[30:31]
6947;
6948; VI-SDAG-LABEL: v_log_fneg_fabs_v2f16:
6949; VI-SDAG:       ; %bb.0:
6950; VI-SDAG-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
6951; VI-SDAG-NEXT:    v_log_f16_sdwa v1, -|v0| dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1
6952; VI-SDAG-NEXT:    v_log_f16_e64 v0, -|v0|
6953; VI-SDAG-NEXT:    v_mov_b32_e32 v2, 0x398c
6954; VI-SDAG-NEXT:    v_mul_f16_sdwa v1, v1, v2 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
6955; VI-SDAG-NEXT:    v_mul_f16_e32 v0, 0x398c, v0
6956; VI-SDAG-NEXT:    v_or_b32_e32 v0, v0, v1
6957; VI-SDAG-NEXT:    s_setpc_b64 s[30:31]
6958;
6959; VI-GISEL-LABEL: v_log_fneg_fabs_v2f16:
6960; VI-GISEL:       ; %bb.0:
6961; VI-GISEL-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
6962; VI-GISEL-NEXT:    v_or_b32_e32 v0, 0x80008000, v0
6963; VI-GISEL-NEXT:    v_log_f16_e32 v1, v0
6964; VI-GISEL-NEXT:    v_log_f16_sdwa v0, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1
6965; VI-GISEL-NEXT:    v_mov_b32_e32 v2, 0x398c
6966; VI-GISEL-NEXT:    v_mul_f16_e32 v1, 0x398c, v1
6967; VI-GISEL-NEXT:    v_mul_f16_sdwa v0, v0, v2 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
6968; VI-GISEL-NEXT:    v_or_b32_e32 v0, v1, v0
6969; VI-GISEL-NEXT:    s_setpc_b64 s[30:31]
6970;
6971; GFX900-SDAG-LABEL: v_log_fneg_fabs_v2f16:
6972; GFX900-SDAG:       ; %bb.0:
6973; GFX900-SDAG-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
6974; GFX900-SDAG-NEXT:    v_log_f16_e64 v1, -|v0|
6975; GFX900-SDAG-NEXT:    v_log_f16_sdwa v0, -|v0| dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1
6976; GFX900-SDAG-NEXT:    v_mul_f16_e32 v1, 0x398c, v1
6977; GFX900-SDAG-NEXT:    v_mul_f16_e32 v0, 0x398c, v0
6978; GFX900-SDAG-NEXT:    v_pack_b32_f16 v0, v1, v0
6979; GFX900-SDAG-NEXT:    s_setpc_b64 s[30:31]
6980;
6981; GFX900-GISEL-LABEL: v_log_fneg_fabs_v2f16:
6982; GFX900-GISEL:       ; %bb.0:
6983; GFX900-GISEL-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
6984; GFX900-GISEL-NEXT:    v_or_b32_e32 v0, 0x80008000, v0
6985; GFX900-GISEL-NEXT:    v_log_f16_e32 v1, v0
6986; GFX900-GISEL-NEXT:    v_log_f16_sdwa v0, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1
6987; GFX900-GISEL-NEXT:    v_mul_f16_e32 v1, 0x398c, v1
6988; GFX900-GISEL-NEXT:    v_mul_f16_e32 v0, 0x398c, v0
6989; GFX900-GISEL-NEXT:    v_pack_b32_f16 v0, v1, v0
6990; GFX900-GISEL-NEXT:    s_setpc_b64 s[30:31]
6991;
6992; GFX1100-SDAG-LABEL: v_log_fneg_fabs_v2f16:
6993; GFX1100-SDAG:       ; %bb.0:
6994; GFX1100-SDAG-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
6995; GFX1100-SDAG-NEXT:    v_lshrrev_b32_e32 v1, 16, v0
6996; GFX1100-SDAG-NEXT:    v_log_f16_e64 v0, -|v0|
6997; GFX1100-SDAG-NEXT:    s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_1)
6998; GFX1100-SDAG-NEXT:    v_log_f16_e64 v1, -|v1|
6999; GFX1100-SDAG-NEXT:    s_waitcnt_depctr 0xfff
7000; GFX1100-SDAG-NEXT:    v_mul_f16_e32 v0, 0x398c, v0
7001; GFX1100-SDAG-NEXT:    v_mul_f16_e32 v1, 0x398c, v1
7002; GFX1100-SDAG-NEXT:    v_pack_b32_f16 v0, v0, v1
7003; GFX1100-SDAG-NEXT:    s_setpc_b64 s[30:31]
7004;
7005; GFX1100-GISEL-LABEL: v_log_fneg_fabs_v2f16:
7006; GFX1100-GISEL:       ; %bb.0:
7007; GFX1100-GISEL-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
7008; GFX1100-GISEL-NEXT:    v_or_b32_e32 v0, 0x80008000, v0
7009; GFX1100-GISEL-NEXT:    s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
7010; GFX1100-GISEL-NEXT:    v_lshrrev_b32_e32 v1, 16, v0
7011; GFX1100-GISEL-NEXT:    v_log_f16_e32 v0, v0
7012; GFX1100-GISEL-NEXT:    v_log_f16_e32 v1, v1
7013; GFX1100-GISEL-NEXT:    s_waitcnt_depctr 0xfff
7014; GFX1100-GISEL-NEXT:    v_mul_f16_e32 v0, 0x398c, v0
7015; GFX1100-GISEL-NEXT:    v_mul_f16_e32 v1, 0x398c, v1
7016; GFX1100-GISEL-NEXT:    s_delay_alu instid0(VALU_DEP_1)
7017; GFX1100-GISEL-NEXT:    v_pack_b32_f16 v0, v0, v1
7018; GFX1100-GISEL-NEXT:    s_setpc_b64 s[30:31]
7019;
7020; R600-LABEL: v_log_fneg_fabs_v2f16:
7021; R600:       ; %bb.0:
7022; R600-NEXT:    CF_END
7023; R600-NEXT:    PAD
7024;
7025; CM-LABEL: v_log_fneg_fabs_v2f16:
7026; CM:       ; %bb.0:
7027; CM-NEXT:    CF_END
7028; CM-NEXT:    PAD
7029  %fabs = call <2 x half> @llvm.fabs.v2f16(<2 x half> %in)
7030  %fneg.fabs = fneg <2 x half> %fabs
7031  %result = call <2 x half> @llvm.log.v2f16(<2 x half> %fneg.fabs)
7032  ret <2 x half> %result
7033}
7034
7035define <2 x half> @v_log_fneg_v2f16(<2 x half> %in) {
7036; SI-SDAG-LABEL: v_log_fneg_v2f16:
7037; SI-SDAG:       ; %bb.0:
7038; SI-SDAG-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
7039; SI-SDAG-NEXT:    v_cvt_f16_f32_e32 v1, v1
7040; SI-SDAG-NEXT:    v_cvt_f16_f32_e32 v0, v0
7041; SI-SDAG-NEXT:    v_lshlrev_b32_e32 v1, 16, v1
7042; SI-SDAG-NEXT:    v_or_b32_e32 v0, v0, v1
7043; SI-SDAG-NEXT:    v_xor_b32_e32 v0, 0x80008000, v0
7044; SI-SDAG-NEXT:    v_cvt_f32_f16_e32 v1, v0
7045; SI-SDAG-NEXT:    v_lshrrev_b32_e32 v0, 16, v0
7046; SI-SDAG-NEXT:    v_cvt_f32_f16_e32 v0, v0
7047; SI-SDAG-NEXT:    v_log_f32_e32 v1, v1
7048; SI-SDAG-NEXT:    v_log_f32_e32 v0, v0
7049; SI-SDAG-NEXT:    v_mul_f32_e32 v1, 0x3f317218, v1
7050; SI-SDAG-NEXT:    v_cvt_f16_f32_e32 v1, v1
7051; SI-SDAG-NEXT:    v_mul_f32_e32 v0, 0x3f317218, v0
7052; SI-SDAG-NEXT:    v_cvt_f16_f32_e32 v2, v0
7053; SI-SDAG-NEXT:    v_cvt_f32_f16_e32 v0, v1
7054; SI-SDAG-NEXT:    v_cvt_f32_f16_e32 v1, v2
7055; SI-SDAG-NEXT:    s_setpc_b64 s[30:31]
7056;
7057; SI-GISEL-LABEL: v_log_fneg_v2f16:
7058; SI-GISEL:       ; %bb.0:
7059; SI-GISEL-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
7060; SI-GISEL-NEXT:    v_lshlrev_b32_e32 v1, 16, v1
7061; SI-GISEL-NEXT:    v_and_b32_e32 v0, 0xffff, v0
7062; SI-GISEL-NEXT:    v_or_b32_e32 v0, v1, v0
7063; SI-GISEL-NEXT:    v_xor_b32_e32 v0, 0x80008000, v0
7064; SI-GISEL-NEXT:    v_cvt_f32_f16_e32 v1, v0
7065; SI-GISEL-NEXT:    v_lshrrev_b32_e32 v0, 16, v0
7066; SI-GISEL-NEXT:    v_cvt_f32_f16_e32 v0, v0
7067; SI-GISEL-NEXT:    v_log_f32_e32 v1, v1
7068; SI-GISEL-NEXT:    v_log_f32_e32 v2, v0
7069; SI-GISEL-NEXT:    v_mul_f32_e32 v0, 0x3f317218, v1
7070; SI-GISEL-NEXT:    v_cvt_f16_f32_e32 v0, v0
7071; SI-GISEL-NEXT:    v_mul_f32_e32 v1, 0x3f317218, v2
7072; SI-GISEL-NEXT:    v_cvt_f16_f32_e32 v1, v1
7073; SI-GISEL-NEXT:    s_setpc_b64 s[30:31]
7074;
7075; VI-SDAG-LABEL: v_log_fneg_v2f16:
7076; VI-SDAG:       ; %bb.0:
7077; VI-SDAG-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
7078; VI-SDAG-NEXT:    v_log_f16_sdwa v1, -v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1
7079; VI-SDAG-NEXT:    v_log_f16_e64 v0, -v0
7080; VI-SDAG-NEXT:    v_mov_b32_e32 v2, 0x398c
7081; VI-SDAG-NEXT:    v_mul_f16_sdwa v1, v1, v2 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
7082; VI-SDAG-NEXT:    v_mul_f16_e32 v0, 0x398c, v0
7083; VI-SDAG-NEXT:    v_or_b32_e32 v0, v0, v1
7084; VI-SDAG-NEXT:    s_setpc_b64 s[30:31]
7085;
7086; VI-GISEL-LABEL: v_log_fneg_v2f16:
7087; VI-GISEL:       ; %bb.0:
7088; VI-GISEL-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
7089; VI-GISEL-NEXT:    v_xor_b32_e32 v0, 0x80008000, v0
7090; VI-GISEL-NEXT:    v_log_f16_e32 v1, v0
7091; VI-GISEL-NEXT:    v_log_f16_sdwa v0, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1
7092; VI-GISEL-NEXT:    v_mov_b32_e32 v2, 0x398c
7093; VI-GISEL-NEXT:    v_mul_f16_e32 v1, 0x398c, v1
7094; VI-GISEL-NEXT:    v_mul_f16_sdwa v0, v0, v2 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
7095; VI-GISEL-NEXT:    v_or_b32_e32 v0, v1, v0
7096; VI-GISEL-NEXT:    s_setpc_b64 s[30:31]
7097;
7098; GFX900-SDAG-LABEL: v_log_fneg_v2f16:
7099; GFX900-SDAG:       ; %bb.0:
7100; GFX900-SDAG-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
7101; GFX900-SDAG-NEXT:    v_log_f16_e64 v1, -v0
7102; GFX900-SDAG-NEXT:    v_log_f16_sdwa v0, -v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1
7103; GFX900-SDAG-NEXT:    v_mul_f16_e32 v1, 0x398c, v1
7104; GFX900-SDAG-NEXT:    v_mul_f16_e32 v0, 0x398c, v0
7105; GFX900-SDAG-NEXT:    v_pack_b32_f16 v0, v1, v0
7106; GFX900-SDAG-NEXT:    s_setpc_b64 s[30:31]
7107;
7108; GFX900-GISEL-LABEL: v_log_fneg_v2f16:
7109; GFX900-GISEL:       ; %bb.0:
7110; GFX900-GISEL-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
7111; GFX900-GISEL-NEXT:    v_xor_b32_e32 v0, 0x80008000, v0
7112; GFX900-GISEL-NEXT:    v_log_f16_e32 v1, v0
7113; GFX900-GISEL-NEXT:    v_log_f16_sdwa v0, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1
7114; GFX900-GISEL-NEXT:    v_mul_f16_e32 v1, 0x398c, v1
7115; GFX900-GISEL-NEXT:    v_mul_f16_e32 v0, 0x398c, v0
7116; GFX900-GISEL-NEXT:    v_pack_b32_f16 v0, v1, v0
7117; GFX900-GISEL-NEXT:    s_setpc_b64 s[30:31]
7118;
7119; GFX1100-SDAG-LABEL: v_log_fneg_v2f16:
7120; GFX1100-SDAG:       ; %bb.0:
7121; GFX1100-SDAG-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
7122; GFX1100-SDAG-NEXT:    v_lshrrev_b32_e32 v1, 16, v0
7123; GFX1100-SDAG-NEXT:    v_log_f16_e64 v0, -v0
7124; GFX1100-SDAG-NEXT:    s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_1)
7125; GFX1100-SDAG-NEXT:    v_log_f16_e64 v1, -v1
7126; GFX1100-SDAG-NEXT:    s_waitcnt_depctr 0xfff
7127; GFX1100-SDAG-NEXT:    v_mul_f16_e32 v0, 0x398c, v0
7128; GFX1100-SDAG-NEXT:    v_mul_f16_e32 v1, 0x398c, v1
7129; GFX1100-SDAG-NEXT:    v_pack_b32_f16 v0, v0, v1
7130; GFX1100-SDAG-NEXT:    s_setpc_b64 s[30:31]
7131;
7132; GFX1100-GISEL-LABEL: v_log_fneg_v2f16:
7133; GFX1100-GISEL:       ; %bb.0:
7134; GFX1100-GISEL-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
7135; GFX1100-GISEL-NEXT:    v_xor_b32_e32 v0, 0x80008000, v0
7136; GFX1100-GISEL-NEXT:    s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
7137; GFX1100-GISEL-NEXT:    v_lshrrev_b32_e32 v1, 16, v0
7138; GFX1100-GISEL-NEXT:    v_log_f16_e32 v0, v0
7139; GFX1100-GISEL-NEXT:    v_log_f16_e32 v1, v1
7140; GFX1100-GISEL-NEXT:    s_waitcnt_depctr 0xfff
7141; GFX1100-GISEL-NEXT:    v_mul_f16_e32 v0, 0x398c, v0
7142; GFX1100-GISEL-NEXT:    v_mul_f16_e32 v1, 0x398c, v1
7143; GFX1100-GISEL-NEXT:    s_delay_alu instid0(VALU_DEP_1)
7144; GFX1100-GISEL-NEXT:    v_pack_b32_f16 v0, v0, v1
7145; GFX1100-GISEL-NEXT:    s_setpc_b64 s[30:31]
7146;
7147; R600-LABEL: v_log_fneg_v2f16:
7148; R600:       ; %bb.0:
7149; R600-NEXT:    CF_END
7150; R600-NEXT:    PAD
7151;
7152; CM-LABEL: v_log_fneg_v2f16:
7153; CM:       ; %bb.0:
7154; CM-NEXT:    CF_END
7155; CM-NEXT:    PAD
7156  %fneg = fneg <2 x half> %in
7157  %result = call <2 x half> @llvm.log.v2f16(<2 x half> %fneg)
7158  ret <2 x half> %result
7159}
7160
7161define <2 x half> @v_log_v2f16_fast(<2 x half> %in) {
7162; SI-SDAG-LABEL: v_log_v2f16_fast:
7163; SI-SDAG:       ; %bb.0:
7164; SI-SDAG-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
7165; SI-SDAG-NEXT:    v_cvt_f16_f32_e32 v0, v0
7166; SI-SDAG-NEXT:    v_cvt_f16_f32_e32 v1, v1
7167; SI-SDAG-NEXT:    v_cvt_f32_f16_e32 v0, v0
7168; SI-SDAG-NEXT:    v_cvt_f32_f16_e32 v1, v1
7169; SI-SDAG-NEXT:    v_log_f32_e32 v0, v0
7170; SI-SDAG-NEXT:    v_log_f32_e32 v1, v1
7171; SI-SDAG-NEXT:    v_mul_f32_e32 v0, 0x3f317218, v0
7172; SI-SDAG-NEXT:    v_mul_f32_e32 v1, 0x3f317218, v1
7173; SI-SDAG-NEXT:    v_cvt_f16_f32_e32 v0, v0
7174; SI-SDAG-NEXT:    v_cvt_f16_f32_e32 v1, v1
7175; SI-SDAG-NEXT:    v_cvt_f32_f16_e32 v0, v0
7176; SI-SDAG-NEXT:    v_cvt_f32_f16_e32 v1, v1
7177; SI-SDAG-NEXT:    s_setpc_b64 s[30:31]
7178;
7179; SI-GISEL-LABEL: v_log_v2f16_fast:
7180; SI-GISEL:       ; %bb.0:
7181; SI-GISEL-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
7182; SI-GISEL-NEXT:    v_cvt_f32_f16_e32 v0, v0
7183; SI-GISEL-NEXT:    v_cvt_f32_f16_e32 v1, v1
7184; SI-GISEL-NEXT:    v_log_f32_e32 v0, v0
7185; SI-GISEL-NEXT:    v_log_f32_e32 v1, v1
7186; SI-GISEL-NEXT:    v_mul_f32_e32 v0, 0x3f317218, v0
7187; SI-GISEL-NEXT:    v_mul_f32_e32 v1, 0x3f317218, v1
7188; SI-GISEL-NEXT:    v_cvt_f16_f32_e32 v0, v0
7189; SI-GISEL-NEXT:    v_cvt_f16_f32_e32 v1, v1
7190; SI-GISEL-NEXT:    s_setpc_b64 s[30:31]
7191;
7192; VI-SDAG-LABEL: v_log_v2f16_fast:
7193; VI-SDAG:       ; %bb.0:
7194; VI-SDAG-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
7195; VI-SDAG-NEXT:    v_log_f16_sdwa v1, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1
7196; VI-SDAG-NEXT:    v_log_f16_e32 v0, v0
7197; VI-SDAG-NEXT:    v_mov_b32_e32 v2, 0x398c
7198; VI-SDAG-NEXT:    v_mul_f16_sdwa v1, v1, v2 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
7199; VI-SDAG-NEXT:    v_mul_f16_e32 v0, 0x398c, v0
7200; VI-SDAG-NEXT:    v_or_b32_e32 v0, v0, v1
7201; VI-SDAG-NEXT:    s_setpc_b64 s[30:31]
7202;
7203; VI-GISEL-LABEL: v_log_v2f16_fast:
7204; VI-GISEL:       ; %bb.0:
7205; VI-GISEL-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
7206; VI-GISEL-NEXT:    v_log_f16_e32 v1, v0
7207; VI-GISEL-NEXT:    v_log_f16_sdwa v0, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1
7208; VI-GISEL-NEXT:    v_mov_b32_e32 v2, 0x398c
7209; VI-GISEL-NEXT:    v_mul_f16_e32 v1, 0x398c, v1
7210; VI-GISEL-NEXT:    v_mul_f16_sdwa v0, v0, v2 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
7211; VI-GISEL-NEXT:    v_or_b32_e32 v0, v1, v0
7212; VI-GISEL-NEXT:    s_setpc_b64 s[30:31]
7213;
7214; GFX900-LABEL: v_log_v2f16_fast:
7215; GFX900:       ; %bb.0:
7216; GFX900-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
7217; GFX900-NEXT:    v_log_f16_e32 v1, v0
7218; GFX900-NEXT:    v_log_f16_sdwa v0, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1
7219; GFX900-NEXT:    v_mul_f16_e32 v1, 0x398c, v1
7220; GFX900-NEXT:    v_mul_f16_e32 v0, 0x398c, v0
7221; GFX900-NEXT:    v_pack_b32_f16 v0, v1, v0
7222; GFX900-NEXT:    s_setpc_b64 s[30:31]
7223;
7224; GFX1100-LABEL: v_log_v2f16_fast:
7225; GFX1100:       ; %bb.0:
7226; GFX1100-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
7227; GFX1100-NEXT:    v_lshrrev_b32_e32 v1, 16, v0
7228; GFX1100-NEXT:    v_log_f16_e32 v0, v0
7229; GFX1100-NEXT:    s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_1)
7230; GFX1100-NEXT:    v_log_f16_e32 v1, v1
7231; GFX1100-NEXT:    s_waitcnt_depctr 0xfff
7232; GFX1100-NEXT:    v_mul_f16_e32 v0, 0x398c, v0
7233; GFX1100-NEXT:    v_mul_f16_e32 v1, 0x398c, v1
7234; GFX1100-NEXT:    v_pack_b32_f16 v0, v0, v1
7235; GFX1100-NEXT:    s_setpc_b64 s[30:31]
7236;
7237; R600-LABEL: v_log_v2f16_fast:
7238; R600:       ; %bb.0:
7239; R600-NEXT:    CF_END
7240; R600-NEXT:    PAD
7241;
7242; CM-LABEL: v_log_v2f16_fast:
7243; CM:       ; %bb.0:
7244; CM-NEXT:    CF_END
7245; CM-NEXT:    PAD
7246  %result = call fast <2 x half> @llvm.log.v2f16(<2 x half> %in)
7247  ret <2 x half> %result
7248}
7249
7250define <3 x half> @v_log_v3f16(<3 x half> %in) {
7251; SI-SDAG-LABEL: v_log_v3f16:
7252; SI-SDAG:       ; %bb.0:
7253; SI-SDAG-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
7254; SI-SDAG-NEXT:    v_cvt_f16_f32_e32 v0, v0
7255; SI-SDAG-NEXT:    v_cvt_f16_f32_e32 v1, v1
7256; SI-SDAG-NEXT:    v_cvt_f16_f32_e32 v2, v2
7257; SI-SDAG-NEXT:    v_cvt_f32_f16_e32 v0, v0
7258; SI-SDAG-NEXT:    v_cvt_f32_f16_e32 v1, v1
7259; SI-SDAG-NEXT:    v_cvt_f32_f16_e32 v2, v2
7260; SI-SDAG-NEXT:    v_log_f32_e32 v0, v0
7261; SI-SDAG-NEXT:    v_log_f32_e32 v1, v1
7262; SI-SDAG-NEXT:    v_log_f32_e32 v2, v2
7263; SI-SDAG-NEXT:    v_mul_f32_e32 v0, 0x3f317218, v0
7264; SI-SDAG-NEXT:    v_mul_f32_e32 v1, 0x3f317218, v1
7265; SI-SDAG-NEXT:    v_mul_f32_e32 v2, 0x3f317218, v2
7266; SI-SDAG-NEXT:    v_cvt_f16_f32_e32 v0, v0
7267; SI-SDAG-NEXT:    v_cvt_f16_f32_e32 v1, v1
7268; SI-SDAG-NEXT:    v_cvt_f16_f32_e32 v2, v2
7269; SI-SDAG-NEXT:    v_cvt_f32_f16_e32 v0, v0
7270; SI-SDAG-NEXT:    v_cvt_f32_f16_e32 v1, v1
7271; SI-SDAG-NEXT:    v_cvt_f32_f16_e32 v2, v2
7272; SI-SDAG-NEXT:    s_setpc_b64 s[30:31]
7273;
7274; SI-GISEL-LABEL: v_log_v3f16:
7275; SI-GISEL:       ; %bb.0:
7276; SI-GISEL-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
7277; SI-GISEL-NEXT:    v_cvt_f32_f16_e32 v0, v0
7278; SI-GISEL-NEXT:    v_cvt_f32_f16_e32 v1, v1
7279; SI-GISEL-NEXT:    v_cvt_f32_f16_e32 v2, v2
7280; SI-GISEL-NEXT:    v_log_f32_e32 v0, v0
7281; SI-GISEL-NEXT:    v_log_f32_e32 v1, v1
7282; SI-GISEL-NEXT:    v_log_f32_e32 v2, v2
7283; SI-GISEL-NEXT:    v_mul_f32_e32 v0, 0x3f317218, v0
7284; SI-GISEL-NEXT:    v_mul_f32_e32 v1, 0x3f317218, v1
7285; SI-GISEL-NEXT:    v_mul_f32_e32 v2, 0x3f317218, v2
7286; SI-GISEL-NEXT:    v_cvt_f16_f32_e32 v0, v0
7287; SI-GISEL-NEXT:    v_cvt_f16_f32_e32 v1, v1
7288; SI-GISEL-NEXT:    v_cvt_f16_f32_e32 v2, v2
7289; SI-GISEL-NEXT:    s_setpc_b64 s[30:31]
7290;
7291; VI-LABEL: v_log_v3f16:
7292; VI:       ; %bb.0:
7293; VI-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
7294; VI-NEXT:    v_log_f16_e32 v2, v0
7295; VI-NEXT:    v_log_f16_sdwa v0, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1
7296; VI-NEXT:    v_log_f16_e32 v1, v1
7297; VI-NEXT:    v_mov_b32_e32 v3, 0x398c
7298; VI-NEXT:    v_mul_f16_e32 v2, 0x398c, v2
7299; VI-NEXT:    v_mul_f16_sdwa v0, v0, v3 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
7300; VI-NEXT:    v_mul_f16_e32 v1, 0x398c, v1
7301; VI-NEXT:    v_or_b32_e32 v0, v2, v0
7302; VI-NEXT:    s_setpc_b64 s[30:31]
7303;
7304; GFX900-LABEL: v_log_v3f16:
7305; GFX900:       ; %bb.0:
7306; GFX900-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
7307; GFX900-NEXT:    v_log_f16_e32 v2, v0
7308; GFX900-NEXT:    v_log_f16_sdwa v0, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1
7309; GFX900-NEXT:    v_log_f16_e32 v1, v1
7310; GFX900-NEXT:    v_mul_f16_e32 v2, 0x398c, v2
7311; GFX900-NEXT:    v_mul_f16_e32 v0, 0x398c, v0
7312; GFX900-NEXT:    v_mul_f16_e32 v1, 0x398c, v1
7313; GFX900-NEXT:    v_pack_b32_f16 v0, v2, v0
7314; GFX900-NEXT:    s_setpc_b64 s[30:31]
7315;
7316; GFX1100-LABEL: v_log_v3f16:
7317; GFX1100:       ; %bb.0:
7318; GFX1100-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
7319; GFX1100-NEXT:    v_lshrrev_b32_e32 v2, 16, v0
7320; GFX1100-NEXT:    v_log_f16_e32 v0, v0
7321; GFX1100-NEXT:    v_log_f16_e32 v1, v1
7322; GFX1100-NEXT:    s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(TRANS32_DEP_3)
7323; GFX1100-NEXT:    v_log_f16_e32 v2, v2
7324; GFX1100-NEXT:    v_mul_f16_e32 v0, 0x398c, v0
7325; GFX1100-NEXT:    s_waitcnt_depctr 0xfff
7326; GFX1100-NEXT:    v_mul_f16_e32 v1, 0x398c, v1
7327; GFX1100-NEXT:    v_mul_f16_e32 v2, 0x398c, v2
7328; GFX1100-NEXT:    s_delay_alu instid0(VALU_DEP_1)
7329; GFX1100-NEXT:    v_pack_b32_f16 v0, v0, v2
7330; GFX1100-NEXT:    s_setpc_b64 s[30:31]
7331;
7332; R600-LABEL: v_log_v3f16:
7333; R600:       ; %bb.0:
7334; R600-NEXT:    CF_END
7335; R600-NEXT:    PAD
7336;
7337; CM-LABEL: v_log_v3f16:
7338; CM:       ; %bb.0:
7339; CM-NEXT:    CF_END
7340; CM-NEXT:    PAD
7341  %result = call <3 x half> @llvm.log.v3f16(<3 x half> %in)
7342  ret <3 x half> %result
7343}
7344
7345define <3 x half> @v_log_v3f16_fast(<3 x half> %in) {
7346; SI-SDAG-LABEL: v_log_v3f16_fast:
7347; SI-SDAG:       ; %bb.0:
7348; SI-SDAG-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
7349; SI-SDAG-NEXT:    v_cvt_f16_f32_e32 v0, v0
7350; SI-SDAG-NEXT:    v_cvt_f16_f32_e32 v1, v1
7351; SI-SDAG-NEXT:    v_cvt_f16_f32_e32 v2, v2
7352; SI-SDAG-NEXT:    v_cvt_f32_f16_e32 v0, v0
7353; SI-SDAG-NEXT:    v_cvt_f32_f16_e32 v1, v1
7354; SI-SDAG-NEXT:    v_cvt_f32_f16_e32 v2, v2
7355; SI-SDAG-NEXT:    v_log_f32_e32 v0, v0
7356; SI-SDAG-NEXT:    v_log_f32_e32 v1, v1
7357; SI-SDAG-NEXT:    v_log_f32_e32 v2, v2
7358; SI-SDAG-NEXT:    v_mul_f32_e32 v0, 0x3f317218, v0
7359; SI-SDAG-NEXT:    v_mul_f32_e32 v1, 0x3f317218, v1
7360; SI-SDAG-NEXT:    v_mul_f32_e32 v2, 0x3f317218, v2
7361; SI-SDAG-NEXT:    v_cvt_f16_f32_e32 v0, v0
7362; SI-SDAG-NEXT:    v_cvt_f16_f32_e32 v1, v1
7363; SI-SDAG-NEXT:    v_cvt_f16_f32_e32 v2, v2
7364; SI-SDAG-NEXT:    v_cvt_f32_f16_e32 v0, v0
7365; SI-SDAG-NEXT:    v_cvt_f32_f16_e32 v1, v1
7366; SI-SDAG-NEXT:    v_cvt_f32_f16_e32 v2, v2
7367; SI-SDAG-NEXT:    s_setpc_b64 s[30:31]
7368;
7369; SI-GISEL-LABEL: v_log_v3f16_fast:
7370; SI-GISEL:       ; %bb.0:
7371; SI-GISEL-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
7372; SI-GISEL-NEXT:    v_cvt_f32_f16_e32 v0, v0
7373; SI-GISEL-NEXT:    v_cvt_f32_f16_e32 v1, v1
7374; SI-GISEL-NEXT:    v_cvt_f32_f16_e32 v2, v2
7375; SI-GISEL-NEXT:    v_log_f32_e32 v0, v0
7376; SI-GISEL-NEXT:    v_log_f32_e32 v1, v1
7377; SI-GISEL-NEXT:    v_log_f32_e32 v2, v2
7378; SI-GISEL-NEXT:    v_mul_f32_e32 v0, 0x3f317218, v0
7379; SI-GISEL-NEXT:    v_mul_f32_e32 v1, 0x3f317218, v1
7380; SI-GISEL-NEXT:    v_mul_f32_e32 v2, 0x3f317218, v2
7381; SI-GISEL-NEXT:    v_cvt_f16_f32_e32 v0, v0
7382; SI-GISEL-NEXT:    v_cvt_f16_f32_e32 v1, v1
7383; SI-GISEL-NEXT:    v_cvt_f16_f32_e32 v2, v2
7384; SI-GISEL-NEXT:    s_setpc_b64 s[30:31]
7385;
7386; VI-LABEL: v_log_v3f16_fast:
7387; VI:       ; %bb.0:
7388; VI-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
7389; VI-NEXT:    v_log_f16_e32 v2, v0
7390; VI-NEXT:    v_log_f16_sdwa v0, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1
7391; VI-NEXT:    v_log_f16_e32 v1, v1
7392; VI-NEXT:    v_mov_b32_e32 v3, 0x398c
7393; VI-NEXT:    v_mul_f16_e32 v2, 0x398c, v2
7394; VI-NEXT:    v_mul_f16_sdwa v0, v0, v3 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
7395; VI-NEXT:    v_mul_f16_e32 v1, 0x398c, v1
7396; VI-NEXT:    v_or_b32_e32 v0, v2, v0
7397; VI-NEXT:    s_setpc_b64 s[30:31]
7398;
7399; GFX900-LABEL: v_log_v3f16_fast:
7400; GFX900:       ; %bb.0:
7401; GFX900-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
7402; GFX900-NEXT:    v_log_f16_e32 v2, v0
7403; GFX900-NEXT:    v_log_f16_sdwa v0, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1
7404; GFX900-NEXT:    v_log_f16_e32 v1, v1
7405; GFX900-NEXT:    v_mul_f16_e32 v2, 0x398c, v2
7406; GFX900-NEXT:    v_mul_f16_e32 v0, 0x398c, v0
7407; GFX900-NEXT:    v_mul_f16_e32 v1, 0x398c, v1
7408; GFX900-NEXT:    v_pack_b32_f16 v0, v2, v0
7409; GFX900-NEXT:    s_setpc_b64 s[30:31]
7410;
7411; GFX1100-LABEL: v_log_v3f16_fast:
7412; GFX1100:       ; %bb.0:
7413; GFX1100-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
7414; GFX1100-NEXT:    v_lshrrev_b32_e32 v2, 16, v0
7415; GFX1100-NEXT:    v_log_f16_e32 v0, v0
7416; GFX1100-NEXT:    v_log_f16_e32 v1, v1
7417; GFX1100-NEXT:    s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(TRANS32_DEP_3)
7418; GFX1100-NEXT:    v_log_f16_e32 v2, v2
7419; GFX1100-NEXT:    v_mul_f16_e32 v0, 0x398c, v0
7420; GFX1100-NEXT:    s_waitcnt_depctr 0xfff
7421; GFX1100-NEXT:    v_mul_f16_e32 v1, 0x398c, v1
7422; GFX1100-NEXT:    v_mul_f16_e32 v2, 0x398c, v2
7423; GFX1100-NEXT:    s_delay_alu instid0(VALU_DEP_1)
7424; GFX1100-NEXT:    v_pack_b32_f16 v0, v0, v2
7425; GFX1100-NEXT:    s_setpc_b64 s[30:31]
7426;
7427; R600-LABEL: v_log_v3f16_fast:
7428; R600:       ; %bb.0:
7429; R600-NEXT:    CF_END
7430; R600-NEXT:    PAD
7431;
7432; CM-LABEL: v_log_v3f16_fast:
7433; CM:       ; %bb.0:
7434; CM-NEXT:    CF_END
7435; CM-NEXT:    PAD
7436  %result = call fast <3 x half> @llvm.log.v3f16(<3 x half> %in)
7437  ret <3 x half> %result
7438}
7439
7440define <4 x half> @v_log_v4f16(<4 x half> %in) {
7441; SI-SDAG-LABEL: v_log_v4f16:
7442; SI-SDAG:       ; %bb.0:
7443; SI-SDAG-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
7444; SI-SDAG-NEXT:    v_cvt_f16_f32_e32 v0, v0
7445; SI-SDAG-NEXT:    v_cvt_f16_f32_e32 v1, v1
7446; SI-SDAG-NEXT:    v_cvt_f16_f32_e32 v3, v3
7447; SI-SDAG-NEXT:    v_cvt_f16_f32_e32 v2, v2
7448; SI-SDAG-NEXT:    v_cvt_f32_f16_e32 v0, v0
7449; SI-SDAG-NEXT:    v_cvt_f32_f16_e32 v1, v1
7450; SI-SDAG-NEXT:    v_cvt_f32_f16_e32 v3, v3
7451; SI-SDAG-NEXT:    v_cvt_f32_f16_e32 v2, v2
7452; SI-SDAG-NEXT:    v_log_f32_e32 v0, v0
7453; SI-SDAG-NEXT:    v_log_f32_e32 v1, v1
7454; SI-SDAG-NEXT:    v_log_f32_e32 v3, v3
7455; SI-SDAG-NEXT:    v_log_f32_e32 v2, v2
7456; SI-SDAG-NEXT:    v_mul_f32_e32 v0, 0x3f317218, v0
7457; SI-SDAG-NEXT:    v_mul_f32_e32 v1, 0x3f317218, v1
7458; SI-SDAG-NEXT:    v_mul_f32_e32 v3, 0x3f317218, v3
7459; SI-SDAG-NEXT:    v_mul_f32_e32 v2, 0x3f317218, v2
7460; SI-SDAG-NEXT:    v_cvt_f16_f32_e32 v0, v0
7461; SI-SDAG-NEXT:    v_cvt_f16_f32_e32 v1, v1
7462; SI-SDAG-NEXT:    v_cvt_f16_f32_e32 v2, v2
7463; SI-SDAG-NEXT:    v_cvt_f16_f32_e32 v3, v3
7464; SI-SDAG-NEXT:    v_cvt_f32_f16_e32 v0, v0
7465; SI-SDAG-NEXT:    v_cvt_f32_f16_e32 v1, v1
7466; SI-SDAG-NEXT:    v_cvt_f32_f16_e32 v2, v2
7467; SI-SDAG-NEXT:    v_cvt_f32_f16_e32 v3, v3
7468; SI-SDAG-NEXT:    s_setpc_b64 s[30:31]
7469;
7470; SI-GISEL-LABEL: v_log_v4f16:
7471; SI-GISEL:       ; %bb.0:
7472; SI-GISEL-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
7473; SI-GISEL-NEXT:    v_cvt_f32_f16_e32 v0, v0
7474; SI-GISEL-NEXT:    v_cvt_f32_f16_e32 v1, v1
7475; SI-GISEL-NEXT:    v_cvt_f32_f16_e32 v2, v2
7476; SI-GISEL-NEXT:    v_cvt_f32_f16_e32 v3, v3
7477; SI-GISEL-NEXT:    v_log_f32_e32 v0, v0
7478; SI-GISEL-NEXT:    v_log_f32_e32 v1, v1
7479; SI-GISEL-NEXT:    v_log_f32_e32 v2, v2
7480; SI-GISEL-NEXT:    v_log_f32_e32 v3, v3
7481; SI-GISEL-NEXT:    v_mul_f32_e32 v0, 0x3f317218, v0
7482; SI-GISEL-NEXT:    v_mul_f32_e32 v1, 0x3f317218, v1
7483; SI-GISEL-NEXT:    v_mul_f32_e32 v2, 0x3f317218, v2
7484; SI-GISEL-NEXT:    v_mul_f32_e32 v3, 0x3f317218, v3
7485; SI-GISEL-NEXT:    v_cvt_f16_f32_e32 v0, v0
7486; SI-GISEL-NEXT:    v_cvt_f16_f32_e32 v1, v1
7487; SI-GISEL-NEXT:    v_cvt_f16_f32_e32 v2, v2
7488; SI-GISEL-NEXT:    v_cvt_f16_f32_e32 v3, v3
7489; SI-GISEL-NEXT:    s_setpc_b64 s[30:31]
7490;
7491; VI-SDAG-LABEL: v_log_v4f16:
7492; VI-SDAG:       ; %bb.0:
7493; VI-SDAG-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
7494; VI-SDAG-NEXT:    v_log_f16_e32 v2, v1
7495; VI-SDAG-NEXT:    v_log_f16_sdwa v1, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1
7496; VI-SDAG-NEXT:    v_log_f16_e32 v3, v0
7497; VI-SDAG-NEXT:    v_log_f16_sdwa v0, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1
7498; VI-SDAG-NEXT:    v_mov_b32_e32 v4, 0x398c
7499; VI-SDAG-NEXT:    v_mul_f16_e32 v2, 0x398c, v2
7500; VI-SDAG-NEXT:    v_mul_f16_sdwa v1, v1, v4 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
7501; VI-SDAG-NEXT:    v_mul_f16_e32 v3, 0x398c, v3
7502; VI-SDAG-NEXT:    v_mul_f16_sdwa v0, v0, v4 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
7503; VI-SDAG-NEXT:    v_or_b32_e32 v0, v3, v0
7504; VI-SDAG-NEXT:    v_or_b32_e32 v1, v2, v1
7505; VI-SDAG-NEXT:    s_setpc_b64 s[30:31]
7506;
7507; VI-GISEL-LABEL: v_log_v4f16:
7508; VI-GISEL:       ; %bb.0:
7509; VI-GISEL-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
7510; VI-GISEL-NEXT:    v_log_f16_e32 v2, v0
7511; VI-GISEL-NEXT:    v_log_f16_sdwa v0, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1
7512; VI-GISEL-NEXT:    v_log_f16_e32 v4, v1
7513; VI-GISEL-NEXT:    v_log_f16_sdwa v1, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1
7514; VI-GISEL-NEXT:    v_mov_b32_e32 v3, 0x398c
7515; VI-GISEL-NEXT:    v_mul_f16_e32 v2, 0x398c, v2
7516; VI-GISEL-NEXT:    v_mul_f16_sdwa v0, v0, v3 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
7517; VI-GISEL-NEXT:    v_mul_f16_e32 v4, 0x398c, v4
7518; VI-GISEL-NEXT:    v_mul_f16_sdwa v1, v1, v3 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
7519; VI-GISEL-NEXT:    v_or_b32_e32 v0, v2, v0
7520; VI-GISEL-NEXT:    v_or_b32_e32 v1, v4, v1
7521; VI-GISEL-NEXT:    s_setpc_b64 s[30:31]
7522;
7523; GFX900-SDAG-LABEL: v_log_v4f16:
7524; GFX900-SDAG:       ; %bb.0:
7525; GFX900-SDAG-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
7526; GFX900-SDAG-NEXT:    v_log_f16_e32 v2, v1
7527; GFX900-SDAG-NEXT:    v_log_f16_sdwa v1, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1
7528; GFX900-SDAG-NEXT:    v_log_f16_e32 v3, v0
7529; GFX900-SDAG-NEXT:    v_log_f16_sdwa v0, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1
7530; GFX900-SDAG-NEXT:    v_mul_f16_e32 v2, 0x398c, v2
7531; GFX900-SDAG-NEXT:    v_mul_f16_e32 v1, 0x398c, v1
7532; GFX900-SDAG-NEXT:    v_mul_f16_e32 v3, 0x398c, v3
7533; GFX900-SDAG-NEXT:    v_mul_f16_e32 v0, 0x398c, v0
7534; GFX900-SDAG-NEXT:    v_pack_b32_f16 v0, v3, v0
7535; GFX900-SDAG-NEXT:    v_pack_b32_f16 v1, v2, v1
7536; GFX900-SDAG-NEXT:    s_setpc_b64 s[30:31]
7537;
7538; GFX900-GISEL-LABEL: v_log_v4f16:
7539; GFX900-GISEL:       ; %bb.0:
7540; GFX900-GISEL-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
7541; GFX900-GISEL-NEXT:    v_log_f16_e32 v2, v0
7542; GFX900-GISEL-NEXT:    v_log_f16_sdwa v0, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1
7543; GFX900-GISEL-NEXT:    v_log_f16_e32 v3, v1
7544; GFX900-GISEL-NEXT:    v_log_f16_sdwa v1, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1
7545; GFX900-GISEL-NEXT:    v_mul_f16_e32 v2, 0x398c, v2
7546; GFX900-GISEL-NEXT:    v_mul_f16_e32 v0, 0x398c, v0
7547; GFX900-GISEL-NEXT:    v_mul_f16_e32 v3, 0x398c, v3
7548; GFX900-GISEL-NEXT:    v_mul_f16_e32 v1, 0x398c, v1
7549; GFX900-GISEL-NEXT:    v_pack_b32_f16 v0, v2, v0
7550; GFX900-GISEL-NEXT:    v_pack_b32_f16 v1, v3, v1
7551; GFX900-GISEL-NEXT:    s_setpc_b64 s[30:31]
7552;
7553; GFX1100-SDAG-LABEL: v_log_v4f16:
7554; GFX1100-SDAG:       ; %bb.0:
7555; GFX1100-SDAG-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
7556; GFX1100-SDAG-NEXT:    v_lshrrev_b32_e32 v2, 16, v0
7557; GFX1100-SDAG-NEXT:    v_lshrrev_b32_e32 v3, 16, v1
7558; GFX1100-SDAG-NEXT:    v_log_f16_e32 v1, v1
7559; GFX1100-SDAG-NEXT:    v_log_f16_e32 v0, v0
7560; GFX1100-SDAG-NEXT:    s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
7561; GFX1100-SDAG-NEXT:    v_log_f16_e32 v2, v2
7562; GFX1100-SDAG-NEXT:    v_log_f16_e32 v3, v3
7563; GFX1100-SDAG-NEXT:    v_mul_f16_e32 v1, 0x398c, v1
7564; GFX1100-SDAG-NEXT:    s_delay_alu instid0(TRANS32_DEP_3) | instskip(SKIP_3) | instid1(VALU_DEP_2)
7565; GFX1100-SDAG-NEXT:    v_mul_f16_e32 v0, 0x398c, v0
7566; GFX1100-SDAG-NEXT:    s_waitcnt_depctr 0xfff
7567; GFX1100-SDAG-NEXT:    v_mul_f16_e32 v2, 0x398c, v2
7568; GFX1100-SDAG-NEXT:    v_mul_f16_e32 v3, 0x398c, v3
7569; GFX1100-SDAG-NEXT:    v_pack_b32_f16 v0, v0, v2
7570; GFX1100-SDAG-NEXT:    s_delay_alu instid0(VALU_DEP_2)
7571; GFX1100-SDAG-NEXT:    v_pack_b32_f16 v1, v1, v3
7572; GFX1100-SDAG-NEXT:    s_setpc_b64 s[30:31]
7573;
7574; GFX1100-GISEL-LABEL: v_log_v4f16:
7575; GFX1100-GISEL:       ; %bb.0:
7576; GFX1100-GISEL-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
7577; GFX1100-GISEL-NEXT:    v_lshrrev_b32_e32 v2, 16, v0
7578; GFX1100-GISEL-NEXT:    v_lshrrev_b32_e32 v3, 16, v1
7579; GFX1100-GISEL-NEXT:    v_log_f16_e32 v0, v0
7580; GFX1100-GISEL-NEXT:    v_log_f16_e32 v1, v1
7581; GFX1100-GISEL-NEXT:    s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
7582; GFX1100-GISEL-NEXT:    v_log_f16_e32 v2, v2
7583; GFX1100-GISEL-NEXT:    v_log_f16_e32 v3, v3
7584; GFX1100-GISEL-NEXT:    v_mul_f16_e32 v0, 0x398c, v0
7585; GFX1100-GISEL-NEXT:    s_delay_alu instid0(TRANS32_DEP_3) | instskip(SKIP_3) | instid1(VALU_DEP_2)
7586; GFX1100-GISEL-NEXT:    v_mul_f16_e32 v1, 0x398c, v1
7587; GFX1100-GISEL-NEXT:    s_waitcnt_depctr 0xfff
7588; GFX1100-GISEL-NEXT:    v_mul_f16_e32 v2, 0x398c, v2
7589; GFX1100-GISEL-NEXT:    v_mul_f16_e32 v3, 0x398c, v3
7590; GFX1100-GISEL-NEXT:    v_pack_b32_f16 v0, v0, v2
7591; GFX1100-GISEL-NEXT:    s_delay_alu instid0(VALU_DEP_2)
7592; GFX1100-GISEL-NEXT:    v_pack_b32_f16 v1, v1, v3
7593; GFX1100-GISEL-NEXT:    s_setpc_b64 s[30:31]
7594;
7595; R600-LABEL: v_log_v4f16:
7596; R600:       ; %bb.0:
7597; R600-NEXT:    CF_END
7598; R600-NEXT:    PAD
7599;
7600; CM-LABEL: v_log_v4f16:
7601; CM:       ; %bb.0:
7602; CM-NEXT:    CF_END
7603; CM-NEXT:    PAD
7604  %result = call <4 x half> @llvm.log.v4f16(<4 x half> %in)
7605  ret <4 x half> %result
7606}
7607
7608define <4 x half> @v_log_v4f16_fast(<4 x half> %in) {
7609; SI-SDAG-LABEL: v_log_v4f16_fast:
7610; SI-SDAG:       ; %bb.0:
7611; SI-SDAG-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
7612; SI-SDAG-NEXT:    v_cvt_f16_f32_e32 v0, v0
7613; SI-SDAG-NEXT:    v_cvt_f16_f32_e32 v1, v1
7614; SI-SDAG-NEXT:    v_cvt_f16_f32_e32 v3, v3
7615; SI-SDAG-NEXT:    v_cvt_f16_f32_e32 v2, v2
7616; SI-SDAG-NEXT:    v_cvt_f32_f16_e32 v0, v0
7617; SI-SDAG-NEXT:    v_cvt_f32_f16_e32 v1, v1
7618; SI-SDAG-NEXT:    v_cvt_f32_f16_e32 v3, v3
7619; SI-SDAG-NEXT:    v_cvt_f32_f16_e32 v2, v2
7620; SI-SDAG-NEXT:    v_log_f32_e32 v0, v0
7621; SI-SDAG-NEXT:    v_log_f32_e32 v1, v1
7622; SI-SDAG-NEXT:    v_log_f32_e32 v3, v3
7623; SI-SDAG-NEXT:    v_log_f32_e32 v2, v2
7624; SI-SDAG-NEXT:    v_mul_f32_e32 v0, 0x3f317218, v0
7625; SI-SDAG-NEXT:    v_mul_f32_e32 v1, 0x3f317218, v1
7626; SI-SDAG-NEXT:    v_mul_f32_e32 v3, 0x3f317218, v3
7627; SI-SDAG-NEXT:    v_mul_f32_e32 v2, 0x3f317218, v2
7628; SI-SDAG-NEXT:    v_cvt_f16_f32_e32 v0, v0
7629; SI-SDAG-NEXT:    v_cvt_f16_f32_e32 v1, v1
7630; SI-SDAG-NEXT:    v_cvt_f16_f32_e32 v2, v2
7631; SI-SDAG-NEXT:    v_cvt_f16_f32_e32 v3, v3
7632; SI-SDAG-NEXT:    v_cvt_f32_f16_e32 v0, v0
7633; SI-SDAG-NEXT:    v_cvt_f32_f16_e32 v1, v1
7634; SI-SDAG-NEXT:    v_cvt_f32_f16_e32 v2, v2
7635; SI-SDAG-NEXT:    v_cvt_f32_f16_e32 v3, v3
7636; SI-SDAG-NEXT:    s_setpc_b64 s[30:31]
7637;
7638; SI-GISEL-LABEL: v_log_v4f16_fast:
7639; SI-GISEL:       ; %bb.0:
7640; SI-GISEL-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
7641; SI-GISEL-NEXT:    v_cvt_f32_f16_e32 v0, v0
7642; SI-GISEL-NEXT:    v_cvt_f32_f16_e32 v1, v1
7643; SI-GISEL-NEXT:    v_cvt_f32_f16_e32 v2, v2
7644; SI-GISEL-NEXT:    v_cvt_f32_f16_e32 v3, v3
7645; SI-GISEL-NEXT:    v_log_f32_e32 v0, v0
7646; SI-GISEL-NEXT:    v_log_f32_e32 v1, v1
7647; SI-GISEL-NEXT:    v_log_f32_e32 v2, v2
7648; SI-GISEL-NEXT:    v_log_f32_e32 v3, v3
7649; SI-GISEL-NEXT:    v_mul_f32_e32 v0, 0x3f317218, v0
7650; SI-GISEL-NEXT:    v_mul_f32_e32 v1, 0x3f317218, v1
7651; SI-GISEL-NEXT:    v_mul_f32_e32 v2, 0x3f317218, v2
7652; SI-GISEL-NEXT:    v_mul_f32_e32 v3, 0x3f317218, v3
7653; SI-GISEL-NEXT:    v_cvt_f16_f32_e32 v0, v0
7654; SI-GISEL-NEXT:    v_cvt_f16_f32_e32 v1, v1
7655; SI-GISEL-NEXT:    v_cvt_f16_f32_e32 v2, v2
7656; SI-GISEL-NEXT:    v_cvt_f16_f32_e32 v3, v3
7657; SI-GISEL-NEXT:    s_setpc_b64 s[30:31]
7658;
7659; VI-SDAG-LABEL: v_log_v4f16_fast:
7660; VI-SDAG:       ; %bb.0:
7661; VI-SDAG-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
7662; VI-SDAG-NEXT:    v_log_f16_e32 v2, v1
7663; VI-SDAG-NEXT:    v_log_f16_sdwa v1, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1
7664; VI-SDAG-NEXT:    v_log_f16_e32 v3, v0
7665; VI-SDAG-NEXT:    v_log_f16_sdwa v0, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1
7666; VI-SDAG-NEXT:    v_mov_b32_e32 v4, 0x398c
7667; VI-SDAG-NEXT:    v_mul_f16_e32 v2, 0x398c, v2
7668; VI-SDAG-NEXT:    v_mul_f16_sdwa v1, v1, v4 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
7669; VI-SDAG-NEXT:    v_mul_f16_e32 v3, 0x398c, v3
7670; VI-SDAG-NEXT:    v_mul_f16_sdwa v0, v0, v4 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
7671; VI-SDAG-NEXT:    v_or_b32_e32 v0, v3, v0
7672; VI-SDAG-NEXT:    v_or_b32_e32 v1, v2, v1
7673; VI-SDAG-NEXT:    s_setpc_b64 s[30:31]
7674;
7675; VI-GISEL-LABEL: v_log_v4f16_fast:
7676; VI-GISEL:       ; %bb.0:
7677; VI-GISEL-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
7678; VI-GISEL-NEXT:    v_log_f16_e32 v2, v0
7679; VI-GISEL-NEXT:    v_log_f16_sdwa v0, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1
7680; VI-GISEL-NEXT:    v_log_f16_e32 v4, v1
7681; VI-GISEL-NEXT:    v_log_f16_sdwa v1, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1
7682; VI-GISEL-NEXT:    v_mov_b32_e32 v3, 0x398c
7683; VI-GISEL-NEXT:    v_mul_f16_e32 v2, 0x398c, v2
7684; VI-GISEL-NEXT:    v_mul_f16_sdwa v0, v0, v3 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
7685; VI-GISEL-NEXT:    v_mul_f16_e32 v4, 0x398c, v4
7686; VI-GISEL-NEXT:    v_mul_f16_sdwa v1, v1, v3 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
7687; VI-GISEL-NEXT:    v_or_b32_e32 v0, v2, v0
7688; VI-GISEL-NEXT:    v_or_b32_e32 v1, v4, v1
7689; VI-GISEL-NEXT:    s_setpc_b64 s[30:31]
7690;
7691; GFX900-SDAG-LABEL: v_log_v4f16_fast:
7692; GFX900-SDAG:       ; %bb.0:
7693; GFX900-SDAG-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
7694; GFX900-SDAG-NEXT:    v_log_f16_e32 v2, v1
7695; GFX900-SDAG-NEXT:    v_log_f16_sdwa v1, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1
7696; GFX900-SDAG-NEXT:    v_log_f16_e32 v3, v0
7697; GFX900-SDAG-NEXT:    v_log_f16_sdwa v0, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1
7698; GFX900-SDAG-NEXT:    v_mul_f16_e32 v2, 0x398c, v2
7699; GFX900-SDAG-NEXT:    v_mul_f16_e32 v1, 0x398c, v1
7700; GFX900-SDAG-NEXT:    v_mul_f16_e32 v3, 0x398c, v3
7701; GFX900-SDAG-NEXT:    v_mul_f16_e32 v0, 0x398c, v0
7702; GFX900-SDAG-NEXT:    v_pack_b32_f16 v0, v3, v0
7703; GFX900-SDAG-NEXT:    v_pack_b32_f16 v1, v2, v1
7704; GFX900-SDAG-NEXT:    s_setpc_b64 s[30:31]
7705;
7706; GFX900-GISEL-LABEL: v_log_v4f16_fast:
7707; GFX900-GISEL:       ; %bb.0:
7708; GFX900-GISEL-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
7709; GFX900-GISEL-NEXT:    v_log_f16_e32 v2, v0
7710; GFX900-GISEL-NEXT:    v_log_f16_sdwa v0, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1
7711; GFX900-GISEL-NEXT:    v_log_f16_e32 v3, v1
7712; GFX900-GISEL-NEXT:    v_log_f16_sdwa v1, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1
7713; GFX900-GISEL-NEXT:    v_mul_f16_e32 v2, 0x398c, v2
7714; GFX900-GISEL-NEXT:    v_mul_f16_e32 v0, 0x398c, v0
7715; GFX900-GISEL-NEXT:    v_mul_f16_e32 v3, 0x398c, v3
7716; GFX900-GISEL-NEXT:    v_mul_f16_e32 v1, 0x398c, v1
7717; GFX900-GISEL-NEXT:    v_pack_b32_f16 v0, v2, v0
7718; GFX900-GISEL-NEXT:    v_pack_b32_f16 v1, v3, v1
7719; GFX900-GISEL-NEXT:    s_setpc_b64 s[30:31]
7720;
7721; GFX1100-SDAG-LABEL: v_log_v4f16_fast:
7722; GFX1100-SDAG:       ; %bb.0:
7723; GFX1100-SDAG-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
7724; GFX1100-SDAG-NEXT:    v_lshrrev_b32_e32 v2, 16, v0
7725; GFX1100-SDAG-NEXT:    v_lshrrev_b32_e32 v3, 16, v1
7726; GFX1100-SDAG-NEXT:    v_log_f16_e32 v1, v1
7727; GFX1100-SDAG-NEXT:    v_log_f16_e32 v0, v0
7728; GFX1100-SDAG-NEXT:    s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
7729; GFX1100-SDAG-NEXT:    v_log_f16_e32 v2, v2
7730; GFX1100-SDAG-NEXT:    v_log_f16_e32 v3, v3
7731; GFX1100-SDAG-NEXT:    v_mul_f16_e32 v1, 0x398c, v1
7732; GFX1100-SDAG-NEXT:    s_delay_alu instid0(TRANS32_DEP_3) | instskip(SKIP_3) | instid1(VALU_DEP_2)
7733; GFX1100-SDAG-NEXT:    v_mul_f16_e32 v0, 0x398c, v0
7734; GFX1100-SDAG-NEXT:    s_waitcnt_depctr 0xfff
7735; GFX1100-SDAG-NEXT:    v_mul_f16_e32 v2, 0x398c, v2
7736; GFX1100-SDAG-NEXT:    v_mul_f16_e32 v3, 0x398c, v3
7737; GFX1100-SDAG-NEXT:    v_pack_b32_f16 v0, v0, v2
7738; GFX1100-SDAG-NEXT:    s_delay_alu instid0(VALU_DEP_2)
7739; GFX1100-SDAG-NEXT:    v_pack_b32_f16 v1, v1, v3
7740; GFX1100-SDAG-NEXT:    s_setpc_b64 s[30:31]
7741;
7742; GFX1100-GISEL-LABEL: v_log_v4f16_fast:
7743; GFX1100-GISEL:       ; %bb.0:
7744; GFX1100-GISEL-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
7745; GFX1100-GISEL-NEXT:    v_lshrrev_b32_e32 v2, 16, v0
7746; GFX1100-GISEL-NEXT:    v_lshrrev_b32_e32 v3, 16, v1
7747; GFX1100-GISEL-NEXT:    v_log_f16_e32 v0, v0
7748; GFX1100-GISEL-NEXT:    v_log_f16_e32 v1, v1
7749; GFX1100-GISEL-NEXT:    s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
7750; GFX1100-GISEL-NEXT:    v_log_f16_e32 v2, v2
7751; GFX1100-GISEL-NEXT:    v_log_f16_e32 v3, v3
7752; GFX1100-GISEL-NEXT:    v_mul_f16_e32 v0, 0x398c, v0
7753; GFX1100-GISEL-NEXT:    s_delay_alu instid0(TRANS32_DEP_3) | instskip(SKIP_3) | instid1(VALU_DEP_2)
7754; GFX1100-GISEL-NEXT:    v_mul_f16_e32 v1, 0x398c, v1
7755; GFX1100-GISEL-NEXT:    s_waitcnt_depctr 0xfff
7756; GFX1100-GISEL-NEXT:    v_mul_f16_e32 v2, 0x398c, v2
7757; GFX1100-GISEL-NEXT:    v_mul_f16_e32 v3, 0x398c, v3
7758; GFX1100-GISEL-NEXT:    v_pack_b32_f16 v0, v0, v2
7759; GFX1100-GISEL-NEXT:    s_delay_alu instid0(VALU_DEP_2)
7760; GFX1100-GISEL-NEXT:    v_pack_b32_f16 v1, v1, v3
7761; GFX1100-GISEL-NEXT:    s_setpc_b64 s[30:31]
7762;
7763; R600-LABEL: v_log_v4f16_fast:
7764; R600:       ; %bb.0:
7765; R600-NEXT:    CF_END
7766; R600-NEXT:    PAD
7767;
7768; CM-LABEL: v_log_v4f16_fast:
7769; CM:       ; %bb.0:
7770; CM-NEXT:    CF_END
7771; CM-NEXT:    PAD
7772  %result = call fast <4 x half> @llvm.log.v4f16(<4 x half> %in)
7773  ret <4 x half> %result
7774}
7775
7776declare float @llvm.fabs.f32(float) #2
7777declare float @llvm.log.f32(float) #2
7778declare <2 x float> @llvm.log.v2f32(<2 x float>) #2
7779declare <3 x float> @llvm.log.v3f32(<3 x float>) #2
7780declare <4 x float> @llvm.log.v4f32(<4 x float>) #2
7781declare half @llvm.fabs.f16(half) #2
7782declare half @llvm.log.f16(half) #2
7783declare <2 x half> @llvm.log.v2f16(<2 x half>) #2
7784declare <3 x half> @llvm.log.v3f16(<3 x half>) #2
7785declare <4 x half> @llvm.log.v4f16(<4 x half>) #2
7786declare <2 x half> @llvm.fabs.v2f16(<2 x half>) #2
7787
7788attributes #0 = { "denormal-fp-math-f32"="ieee,preserve-sign" }
7789attributes #1 = { "denormal-fp-math-f32"="dynamic,dynamic" }
7790attributes #2 = { nocallback nofree nosync nounwind speculatable willreturn memory(none) }
7791;; NOTE: These prefixes are unused and the list is autogenerated. Do not add tests below this line:
7792; GFX689-GISEL: {{.*}}
7793; GFX689-SDAG: {{.*}}
7794