xref: /llvm-project/llvm/test/CodeGen/AMDGPU/llc-pipeline.ll (revision 3630d9ef65b30af7e4ca78e668649bbc48b5be66)
1; UNSUPPORTED: expensive_checks
2; RUN: llc -O0 -mtriple=amdgcn--amdhsa -disable-verify -debug-pass=Structure < %s 2>&1 \
3; RUN:   | FileCheck -match-full-lines -strict-whitespace -check-prefix=GCN-O0 %s
4; RUN: llc -O1 -mtriple=amdgcn--amdhsa -disable-verify -debug-pass=Structure < %s 2>&1 \
5; RUN:   | FileCheck -match-full-lines -strict-whitespace -check-prefix=GCN-O1 %s
6; RUN: llc -O1 -mtriple=amdgcn--amdhsa -disable-verify -amdgpu-scalar-ir-passes -amdgpu-sdwa-peephole \
7; RUN:   -amdgpu-load-store-vectorizer -amdgpu-enable-pre-ra-optimizations -amdgpu-loop-prefetch -debug-pass=Structure < %s 2>&1 \
8; RUN:   | FileCheck -match-full-lines -strict-whitespace -check-prefix=GCN-O1-OPTS %s
9; RUN: llc -O2 -mtriple=amdgcn--amdhsa -disable-verify -debug-pass=Structure < %s 2>&1 \
10; RUN:   | FileCheck -match-full-lines -strict-whitespace -check-prefix=GCN-O2 %s
11; RUN: llc -O3 -mtriple=amdgcn--amdhsa -disable-verify -debug-pass=Structure < %s 2>&1 \
12; RUN:   | FileCheck -match-full-lines -strict-whitespace -check-prefix=GCN-O3 %s
13
14; REQUIRES: asserts
15
16; GCN-O0:Target Library Information
17; GCN-O0-NEXT:Target Pass Configuration
18; GCN-O0-NEXT:Machine Module Information
19; GCN-O0-NEXT:Target Transform Information
20; GCN-O0-NEXT:Assumption Cache Tracker
21; GCN-O0-NEXT:Profile summary info
22; GCN-O0-NEXT:Argument Register Usage Information Storage
23; GCN-O0-NEXT:Create Garbage Collector Module Metadata
24; GCN-O0-NEXT:Register Usage Information Storage
25; GCN-O0-NEXT:Machine Branch Probability Analysis
26; GCN-O0-NEXT:  ModulePass Manager
27; GCN-O0-NEXT:    Pre-ISel Intrinsic Lowering
28; GCN-O0-NEXT:    FunctionPass Manager
29; GCN-O0-NEXT:      Expand large div/rem
30; GCN-O0-NEXT:      Expand large fp convert
31; GCN-O0-NEXT:    AMDGPU Remove Incompatible Functions
32; GCN-O0-NEXT:    AMDGPU Printf lowering
33; GCN-O0-NEXT:    Lower ctors and dtors for AMDGPU
34; GCN-O0-NEXT:    Expand variadic functions
35; GCN-O0-NEXT:    AMDGPU Inline All Functions
36; GCN-O0-NEXT:    Inliner for always_inline functions
37; GCN-O0-NEXT:      FunctionPass Manager
38; GCN-O0-NEXT:        Dominator Tree Construction
39; GCN-O0-NEXT:        Basic Alias Analysis (stateless AA impl)
40; GCN-O0-NEXT:        Function Alias Analysis Results
41; GCN-O0-NEXT:    Lower OpenCL enqueued blocks
42; GCN-O0-NEXT:    AMDGPU Software lowering of LDS
43; GCN-O0-NEXT:    Lower uses of LDS variables from non-kernel functions
44; GCN-O0-NEXT:    FunctionPass Manager
45; GCN-O0-NEXT:      Expand Atomic instructions
46; GCN-O0-NEXT:      Remove unreachable blocks from the CFG
47; GCN-O0-NEXT:      Instrument function entry/exit with calls to e.g. mcount() (post inlining)
48; GCN-O0-NEXT:      Scalarize Masked Memory Intrinsics
49; GCN-O0-NEXT:      Expand reduction intrinsics
50; GCN-O0-NEXT:    CallGraph Construction
51; GCN-O0-NEXT:    Call Graph SCC Pass Manager
52; GCN-O0-NEXT:      AMDGPU Annotate Kernel Features
53; GCN-O0-NEXT:      FunctionPass Manager
54; GCN-O0-NEXT:        AMDGPU Lower Kernel Arguments
55; GCN-O0-NEXT:    Lower buffer fat pointer operations to buffer resources
56; GCN-O0-NEXT:    CallGraph Construction
57; GCN-O0-NEXT:    Call Graph SCC Pass Manager
58; GCN-O0-NEXT:      DummyCGSCCPass
59; GCN-O0-NEXT:      FunctionPass Manager
60; GCN-O0-NEXT:        Lazy Value Information Analysis
61; GCN-O0-NEXT:        Lower SwitchInst's to branches
62; GCN-O0-NEXT:        Lower invoke and unwind, for unwindless code generators
63; GCN-O0-NEXT:        Remove unreachable blocks from the CFG
64; GCN-O0-NEXT:        Post-Dominator Tree Construction
65; GCN-O0-NEXT:        Dominator Tree Construction
66; GCN-O0-NEXT:        Cycle Info Analysis
67; GCN-O0-NEXT:        Uniformity Analysis
68; GCN-O0-NEXT:        Unify divergent function exit nodes
69; GCN-O0-NEXT:        Dominator Tree Construction
70; GCN-O0-NEXT:        Cycle Info Analysis
71; GCN-O0-NEXT:        Convert irreducible control-flow into natural loops
72; GCN-O0-NEXT:        Natural Loop Information
73; GCN-O0-NEXT:        Fixup each natural loop to have a single exit block
74; GCN-O0-NEXT:        Post-Dominator Tree Construction
75; GCN-O0-NEXT:        Dominance Frontier Construction
76; GCN-O0-NEXT:        Detect single entry single exit regions
77; GCN-O0-NEXT:        Region Pass Manager
78; GCN-O0-NEXT:          Structurize control flow
79; GCN-O0-NEXT:        Cycle Info Analysis
80; GCN-O0-NEXT:        Uniformity Analysis
81; GCN-O0-NEXT:        Basic Alias Analysis (stateless AA impl)
82; GCN-O0-NEXT:        Function Alias Analysis Results
83; GCN-O0-NEXT:        Memory SSA
84; GCN-O0-NEXT:        AMDGPU Annotate Uniform Values
85; GCN-O0-NEXT:        Natural Loop Information
86; GCN-O0-NEXT:        SI annotate control flow
87; GCN-O0-NEXT:        Cycle Info Analysis
88; GCN-O0-NEXT:        Uniformity Analysis
89; GCN-O0-NEXT:        AMDGPU Rewrite Undef for PHI
90; GCN-O0-NEXT:        LCSSA Verifier
91; GCN-O0-NEXT:        Loop-Closed SSA Form Pass
92; GCN-O0-NEXT:      DummyCGSCCPass
93; GCN-O0-NEXT:      FunctionPass Manager
94; GCN-O0-NEXT:        Prepare callbr
95; GCN-O0-NEXT:        Safe Stack instrumentation pass
96; GCN-O0-NEXT:        Insert stack protectors
97; GCN-O0-NEXT:        Dominator Tree Construction
98; GCN-O0-NEXT:        Cycle Info Analysis
99; GCN-O0-NEXT:        Uniformity Analysis
100; GCN-O0-NEXT:        Assignment Tracking Analysis
101; GCN-O0-NEXT:        AMDGPU DAG->DAG Pattern Instruction Selection
102; GCN-O0-NEXT:        MachineDominator Tree Construction
103; GCN-O0-NEXT:        SI Fix SGPR copies
104; GCN-O0-NEXT:        MachinePostDominator Tree Construction
105; GCN-O0-NEXT:        SI Lower i1 Copies
106; GCN-O0-NEXT:        Finalize ISel and expand pseudo-instructions
107; GCN-O0-NEXT:        Local Stack Slot Allocation
108; GCN-O0-NEXT:        Register Usage Information Propagation
109; GCN-O0-NEXT:        Eliminate PHI nodes for register allocation
110; GCN-O0-NEXT:        SI Lower control flow pseudo instructions
111; GCN-O0-NEXT:        Two-Address instruction pass
112; GCN-O0-NEXT:        MachineDominator Tree Construction
113; GCN-O0-NEXT:        Slot index numbering
114; GCN-O0-NEXT:        Live Interval Analysis
115; GCN-O0-NEXT:        SI Whole Quad Mode
116; GCN-O0-NEXT:        AMDGPU Pre-RA Long Branch Reg
117; GCN-O0-NEXT:        Fast Register Allocator
118; GCN-O0-NEXT:        SI lower SGPR spill instructions
119; GCN-O0-NEXT:        Slot index numbering
120; GCN-O0-NEXT:        Live Interval Analysis
121; GCN-O0-NEXT:        Virtual Register Map
122; GCN-O0-NEXT:        Live Register Matrix
123; GCN-O0-NEXT:        SI Pre-allocate WWM Registers
124; GCN-O0-NEXT:        Fast Register Allocator
125; GCN-O0-NEXT:        SI Lower WWM Copies
126; GCN-O0-NEXT:        AMDGPU Reserve WWM Registers
127; GCN-O0-NEXT:        Fast Register Allocator
128; GCN-O0-NEXT:        SI Fix VGPR copies
129; GCN-O0-NEXT:        Remove Redundant DEBUG_VALUE analysis
130; GCN-O0-NEXT:        Fixup Statepoint Caller Saved
131; GCN-O0-NEXT:        Lazy Machine Block Frequency Analysis
132; GCN-O0-NEXT:        Machine Optimization Remark Emitter
133; GCN-O0-NEXT:        Prologue/Epilogue Insertion & Frame Finalization
134; GCN-O0-NEXT:        Post-RA pseudo instruction expansion pass
135; GCN-O0-NEXT:        SI post-RA bundler
136; GCN-O0-NEXT:        Insert fentry calls
137; GCN-O0-NEXT:        Insert XRay ops
138; GCN-O0-NEXT:        SI Memory Legalizer
139; GCN-O0-NEXT:        MachineDominator Tree Construction
140; GCN-O0-NEXT:        Machine Natural Loop Construction
141; GCN-O0-NEXT:        MachinePostDominator Tree Construction
142; GCN-O0-NEXT:        SI insert wait instructions
143; GCN-O0-NEXT:        Insert required mode register values
144; GCN-O0-NEXT:        SI Final Branch Preparation
145; GCN-O0-NEXT:        Post RA hazard recognizer
146; GCN-O0-NEXT:        Branch relaxation pass
147; GCN-O0-NEXT:        AMDGPU Preload Kernel Arguments Prolog
148; GCN-O0-NEXT:        Register Usage Information Collector Pass
149; GCN-O0-NEXT:        Remove Loads Into Fake Uses
150; GCN-O0-NEXT:        Live DEBUG_VALUE analysis
151; GCN-O0-NEXT:        Machine Sanitizer Binary Metadata
152; GCN-O0-NEXT:        Lazy Machine Block Frequency Analysis
153; GCN-O0-NEXT:        Machine Optimization Remark Emitter
154; GCN-O0-NEXT:        Stack Frame Layout Analysis
155; GCN-O0-NEXT:        Function register usage analysis
156; GCN-O0-NEXT:        AMDGPU Assembly Printer
157; GCN-O0-NEXT:        Free MachineFunction
158
159; GCN-O1:Target Library Information
160; GCN-O1-NEXT:Target Pass Configuration
161; GCN-O1-NEXT:Machine Module Information
162; GCN-O1-NEXT:Target Transform Information
163; GCN-O1-NEXT:Assumption Cache Tracker
164; GCN-O1-NEXT:Profile summary info
165; GCN-O1-NEXT:AMDGPU Address space based Alias Analysis
166; GCN-O1-NEXT:External Alias Analysis
167; GCN-O1-NEXT:Type-Based Alias Analysis
168; GCN-O1-NEXT:Scoped NoAlias Alias Analysis
169; GCN-O1-NEXT:Argument Register Usage Information Storage
170; GCN-O1-NEXT:Create Garbage Collector Module Metadata
171; GCN-O1-NEXT:Machine Branch Probability Analysis
172; GCN-O1-NEXT:Register Usage Information Storage
173; GCN-O1-NEXT:Default Regalloc Eviction Advisor
174; GCN-O1-NEXT:Default Regalloc Priority Advisor
175; GCN-O1-NEXT:  ModulePass Manager
176; GCN-O1-NEXT:    Pre-ISel Intrinsic Lowering
177; GCN-O1-NEXT:    FunctionPass Manager
178; GCN-O1-NEXT:      Expand large div/rem
179; GCN-O1-NEXT:      Expand large fp convert
180; GCN-O1-NEXT:    AMDGPU Remove Incompatible Functions
181; GCN-O1-NEXT:    AMDGPU Printf lowering
182; GCN-O1-NEXT:    Lower ctors and dtors for AMDGPU
183; GCN-O1-NEXT:    Expand variadic functions
184; GCN-O1-NEXT:    AMDGPU Inline All Functions
185; GCN-O1-NEXT:    Inliner for always_inline functions
186; GCN-O1-NEXT:      FunctionPass Manager
187; GCN-O1-NEXT:        Dominator Tree Construction
188; GCN-O1-NEXT:        Basic Alias Analysis (stateless AA impl)
189; GCN-O1-NEXT:        Function Alias Analysis Results
190; GCN-O1-NEXT:    Lower OpenCL enqueued blocks
191; GCN-O1-NEXT:    AMDGPU Software lowering of LDS
192; GCN-O1-NEXT:    Lower uses of LDS variables from non-kernel functions
193; GCN-O1-NEXT:    FunctionPass Manager
194; GCN-O1-NEXT:      Infer address spaces
195; GCN-O1-NEXT:      Dominator Tree Construction
196; GCN-O1-NEXT:      Cycle Info Analysis
197; GCN-O1-NEXT:      Uniformity Analysis
198; GCN-O1-NEXT:      AMDGPU atomic optimizations
199; GCN-O1-NEXT:      Expand Atomic instructions
200; GCN-O1-NEXT:      Dominator Tree Construction
201; GCN-O1-NEXT:      Natural Loop Information
202; GCN-O1-NEXT:      AMDGPU Promote Alloca
203; GCN-O1-NEXT:      Cycle Info Analysis
204; GCN-O1-NEXT:      Uniformity Analysis
205; GCN-O1-NEXT:      AMDGPU IR optimizations
206; GCN-O1-NEXT:      Basic Alias Analysis (stateless AA impl)
207; GCN-O1-NEXT:      Canonicalize natural loops
208; GCN-O1-NEXT:      Scalar Evolution Analysis
209; GCN-O1-NEXT:      Loop Pass Manager
210; GCN-O1-NEXT:        Canonicalize Freeze Instructions in Loops
211; GCN-O1-NEXT:        Induction Variable Users
212; GCN-O1-NEXT:        Loop Strength Reduction
213; GCN-O1-NEXT:      Basic Alias Analysis (stateless AA impl)
214; GCN-O1-NEXT:      Function Alias Analysis Results
215; GCN-O1-NEXT:      Merge contiguous icmps into a memcmp
216; GCN-O1-NEXT:      Natural Loop Information
217; GCN-O1-NEXT:      Lazy Branch Probability Analysis
218; GCN-O1-NEXT:      Lazy Block Frequency Analysis
219; GCN-O1-NEXT:      Expand memcmp() to load/stores
220; GCN-O1-NEXT:      Remove unreachable blocks from the CFG
221; GCN-O1-NEXT:      Natural Loop Information
222; GCN-O1-NEXT:      Post-Dominator Tree Construction
223; GCN-O1-NEXT:      Branch Probability Analysis
224; GCN-O1-NEXT:      Block Frequency Analysis
225; GCN-O1-NEXT:      Constant Hoisting
226; GCN-O1-NEXT:      Replace intrinsics with calls to vector library
227; GCN-O1-NEXT:      Lazy Branch Probability Analysis
228; GCN-O1-NEXT:      Lazy Block Frequency Analysis
229; GCN-O1-NEXT:      Optimization Remark Emitter
230; GCN-O1-NEXT:      Partially inline calls to library functions
231; GCN-O1-NEXT:      Instrument function entry/exit with calls to e.g. mcount() (post inlining)
232; GCN-O1-NEXT:      Scalarize Masked Memory Intrinsics
233; GCN-O1-NEXT:      Expand reduction intrinsics
234; GCN-O1-NEXT:    CallGraph Construction
235; GCN-O1-NEXT:    Call Graph SCC Pass Manager
236; GCN-O1-NEXT:      AMDGPU Annotate Kernel Features
237; GCN-O1-NEXT:      FunctionPass Manager
238; GCN-O1-NEXT:        AMDGPU Lower Kernel Arguments
239; GCN-O1-NEXT:    Lower buffer fat pointer operations to buffer resources
240; GCN-O1-NEXT:    CallGraph Construction
241; GCN-O1-NEXT:    Call Graph SCC Pass Manager
242; GCN-O1-NEXT:      DummyCGSCCPass
243; GCN-O1-NEXT:      FunctionPass Manager
244; GCN-O1-NEXT:        Dominator Tree Construction
245; GCN-O1-NEXT:        Natural Loop Information
246; GCN-O1-NEXT:        CodeGen Prepare
247; GCN-O1-NEXT:        Lazy Value Information Analysis
248; GCN-O1-NEXT:        Lower SwitchInst's to branches
249; GCN-O1-NEXT:        Lower invoke and unwind, for unwindless code generators
250; GCN-O1-NEXT:        Remove unreachable blocks from the CFG
251; GCN-O1-NEXT:        Dominator Tree Construction
252; GCN-O1-NEXT:        Basic Alias Analysis (stateless AA impl)
253; GCN-O1-NEXT:        Function Alias Analysis Results
254; GCN-O1-NEXT:        Flatten the CFG
255; GCN-O1-NEXT:        Dominator Tree Construction
256; GCN-O1-NEXT:        Basic Alias Analysis (stateless AA impl)
257; GCN-O1-NEXT:        Function Alias Analysis Results
258; GCN-O1-NEXT:        Natural Loop Information
259; GCN-O1-NEXT:        Code sinking
260; GCN-O1-NEXT:        Cycle Info Analysis
261; GCN-O1-NEXT:        Uniformity Analysis
262; GCN-O1-NEXT:        AMDGPU IR late optimizations
263; GCN-O1-NEXT:        Post-Dominator Tree Construction
264; GCN-O1-NEXT:        Unify divergent function exit nodes
265; GCN-O1-NEXT:        Dominator Tree Construction
266; GCN-O1-NEXT:        Cycle Info Analysis
267; GCN-O1-NEXT:        Convert irreducible control-flow into natural loops
268; GCN-O1-NEXT:        Natural Loop Information
269; GCN-O1-NEXT:        Fixup each natural loop to have a single exit block
270; GCN-O1-NEXT:        Post-Dominator Tree Construction
271; GCN-O1-NEXT:        Dominance Frontier Construction
272; GCN-O1-NEXT:        Detect single entry single exit regions
273; GCN-O1-NEXT:        Region Pass Manager
274; GCN-O1-NEXT:          Structurize control flow
275; GCN-O1-NEXT:        Cycle Info Analysis
276; GCN-O1-NEXT:        Uniformity Analysis
277; GCN-O1-NEXT:        Basic Alias Analysis (stateless AA impl)
278; GCN-O1-NEXT:        Function Alias Analysis Results
279; GCN-O1-NEXT:        Memory SSA
280; GCN-O1-NEXT:        AMDGPU Annotate Uniform Values
281; GCN-O1-NEXT:        Natural Loop Information
282; GCN-O1-NEXT:        SI annotate control flow
283; GCN-O1-NEXT:        Cycle Info Analysis
284; GCN-O1-NEXT:        Uniformity Analysis
285; GCN-O1-NEXT:        AMDGPU Rewrite Undef for PHI
286; GCN-O1-NEXT:        LCSSA Verifier
287; GCN-O1-NEXT:        Loop-Closed SSA Form Pass
288; GCN-O1-NEXT:      DummyCGSCCPass
289; GCN-O1-NEXT:      FunctionPass Manager
290; GCN-O1-NEXT:        Dominator Tree Construction
291; GCN-O1-NEXT:        Basic Alias Analysis (stateless AA impl)
292; GCN-O1-NEXT:        Function Alias Analysis Results
293; GCN-O1-NEXT:        ObjC ARC contraction
294; GCN-O1-NEXT:        Prepare callbr
295; GCN-O1-NEXT:        Safe Stack instrumentation pass
296; GCN-O1-NEXT:        Insert stack protectors
297; GCN-O1-NEXT:        Cycle Info Analysis
298; GCN-O1-NEXT:        Uniformity Analysis
299; GCN-O1-NEXT:        Basic Alias Analysis (stateless AA impl)
300; GCN-O1-NEXT:        Function Alias Analysis Results
301; GCN-O1-NEXT:        Natural Loop Information
302; GCN-O1-NEXT:        Post-Dominator Tree Construction
303; GCN-O1-NEXT:        Branch Probability Analysis
304; GCN-O1-NEXT:        Assignment Tracking Analysis
305; GCN-O1-NEXT:        Lazy Branch Probability Analysis
306; GCN-O1-NEXT:        Lazy Block Frequency Analysis
307; GCN-O1-NEXT:        AMDGPU DAG->DAG Pattern Instruction Selection
308; GCN-O1-NEXT:        MachineDominator Tree Construction
309; GCN-O1-NEXT:        SI Fix SGPR copies
310; GCN-O1-NEXT:        MachinePostDominator Tree Construction
311; GCN-O1-NEXT:        SI Lower i1 Copies
312; GCN-O1-NEXT:        Finalize ISel and expand pseudo-instructions
313; GCN-O1-NEXT:        Lazy Machine Block Frequency Analysis
314; GCN-O1-NEXT:        Early Tail Duplication
315; GCN-O1-NEXT:        Optimize machine instruction PHIs
316; GCN-O1-NEXT:        Slot index numbering
317; GCN-O1-NEXT:        Merge disjoint stack slots
318; GCN-O1-NEXT:        Local Stack Slot Allocation
319; GCN-O1-NEXT:        Remove dead machine instructions
320; GCN-O1-NEXT:        MachineDominator Tree Construction
321; GCN-O1-NEXT:        Machine Natural Loop Construction
322; GCN-O1-NEXT:        Machine Block Frequency Analysis
323; GCN-O1-NEXT:        Early Machine Loop Invariant Code Motion
324; GCN-O1-NEXT:        MachineDominator Tree Construction
325; GCN-O1-NEXT:        Machine Block Frequency Analysis
326; GCN-O1-NEXT:        Machine Common Subexpression Elimination
327; GCN-O1-NEXT:        MachinePostDominator Tree Construction
328; GCN-O1-NEXT:        Machine Cycle Info Analysis
329; GCN-O1-NEXT:        Machine code sinking
330; GCN-O1-NEXT:        Peephole Optimizations
331; GCN-O1-NEXT:        Remove dead machine instructions
332; GCN-O1-NEXT:        SI Fold Operands
333; GCN-O1-NEXT:        GCN DPP Combine
334; GCN-O1-NEXT:        SI Load Store Optimizer
335; GCN-O1-NEXT:        Remove dead machine instructions
336; GCN-O1-NEXT:        SI Shrink Instructions
337; GCN-O1-NEXT:        Register Usage Information Propagation
338; GCN-O1-NEXT:        Detect Dead Lanes
339; GCN-O1-NEXT:        Remove dead machine instructions
340; GCN-O1-NEXT:        Init Undef Pass
341; GCN-O1-NEXT:        Process Implicit Definitions
342; GCN-O1-NEXT:        Remove unreachable machine basic blocks
343; GCN-O1-NEXT:        Live Variable Analysis
344; GCN-O1-NEXT:        MachineDominator Tree Construction
345; GCN-O1-NEXT:        SI Optimize VGPR LiveRange
346; GCN-O1-NEXT:        Eliminate PHI nodes for register allocation
347; GCN-O1-NEXT:        SI Lower control flow pseudo instructions
348; GCN-O1-NEXT:        Two-Address instruction pass
349; GCN-O1-NEXT:        Slot index numbering
350; GCN-O1-NEXT:        Live Interval Analysis
351; GCN-O1-NEXT:        Machine Natural Loop Construction
352; GCN-O1-NEXT:        Register Coalescer
353; GCN-O1-NEXT:        Rename Disconnected Subregister Components
354; GCN-O1-NEXT:        Rewrite Partial Register Uses
355; GCN-O1-NEXT:        Machine Instruction Scheduler
356; GCN-O1-NEXT:        SI Whole Quad Mode
357; GCN-O1-NEXT:        SI optimize exec mask operations pre-RA
358; GCN-O1-NEXT:        AMDGPU Pre-RA Long Branch Reg
359; GCN-O1-NEXT:        Machine Natural Loop Construction
360; GCN-O1-NEXT:        Machine Block Frequency Analysis
361; GCN-O1-NEXT:        Debug Variable Analysis
362; GCN-O1-NEXT:        Live Stack Slot Analysis
363; GCN-O1-NEXT:        Virtual Register Map
364; GCN-O1-NEXT:        Live Register Matrix
365; GCN-O1-NEXT:        Bundle Machine CFG Edges
366; GCN-O1-NEXT:        Spill Code Placement Analysis
367; GCN-O1-NEXT:        Lazy Machine Block Frequency Analysis
368; GCN-O1-NEXT:        Machine Optimization Remark Emitter
369; GCN-O1-NEXT:        Greedy Register Allocator
370; GCN-O1-NEXT:        Virtual Register Rewriter
371; GCN-O1-NEXT:        Stack Slot Coloring
372; GCN-O1-NEXT:        SI lower SGPR spill instructions
373; GCN-O1-NEXT:        Virtual Register Map
374; GCN-O1-NEXT:        Live Register Matrix
375; GCN-O1-NEXT:        SI Pre-allocate WWM Registers
376; GCN-O1-NEXT:        Live Stack Slot Analysis
377; GCN-O1-NEXT:        Greedy Register Allocator
378; GCN-O1-NEXT:        SI Lower WWM Copies
379; GCN-O1-NEXT:        Virtual Register Rewriter
380; GCN-O1-NEXT:        AMDGPU Reserve WWM Registers
381; GCN-O1-NEXT:        Virtual Register Map
382; GCN-O1-NEXT:        Live Register Matrix
383; GCN-O1-NEXT:        Greedy Register Allocator
384; GCN-O1-NEXT:        GCN NSA Reassign
385; GCN-O1-NEXT:        Virtual Register Rewriter
386; GCN-O1-NEXT:        AMDGPU Mark Last Scratch Load
387; GCN-O1-NEXT:        Stack Slot Coloring
388; GCN-O1-NEXT:        Machine Copy Propagation Pass
389; GCN-O1-NEXT:        Machine Loop Invariant Code Motion
390; GCN-O1-NEXT:        SI Fix VGPR copies
391; GCN-O1-NEXT:        SI optimize exec mask operations
392; GCN-O1-NEXT:        Remove Redundant DEBUG_VALUE analysis
393; GCN-O1-NEXT:        Fixup Statepoint Caller Saved
394; GCN-O1-NEXT:        PostRA Machine Sink
395; GCN-O1-NEXT:        Machine Block Frequency Analysis
396; GCN-O1-NEXT:        MachineDominator Tree Construction
397; GCN-O1-NEXT:        MachinePostDominator Tree Construction
398; GCN-O1-NEXT:        Lazy Machine Block Frequency Analysis
399; GCN-O1-NEXT:        Machine Optimization Remark Emitter
400; GCN-O1-NEXT:        Shrink Wrapping analysis
401; GCN-O1-NEXT:        Prologue/Epilogue Insertion & Frame Finalization
402; GCN-O1-NEXT:        Machine Late Instructions Cleanup Pass
403; GCN-O1-NEXT:        Control Flow Optimizer
404; GCN-O1-NEXT:        Lazy Machine Block Frequency Analysis
405; GCN-O1-NEXT:        Tail Duplication
406; GCN-O1-NEXT:        Machine Copy Propagation Pass
407; GCN-O1-NEXT:        Post-RA pseudo instruction expansion pass
408; GCN-O1-NEXT:        SI Shrink Instructions
409; GCN-O1-NEXT:        SI post-RA bundler
410; GCN-O1-NEXT:        MachineDominator Tree Construction
411; GCN-O1-NEXT:        Machine Natural Loop Construction
412; GCN-O1-NEXT:        PostRA Machine Instruction Scheduler
413; GCN-O1-NEXT:        Machine Block Frequency Analysis
414; GCN-O1-NEXT:        MachinePostDominator Tree Construction
415; GCN-O1-NEXT:        Branch Probability Basic Block Placement
416; GCN-O1-NEXT:        Insert fentry calls
417; GCN-O1-NEXT:        Insert XRay ops
418; GCN-O1-NEXT:        GCN Create VOPD Instructions
419; GCN-O1-NEXT:        SI Memory Legalizer
420; GCN-O1-NEXT:        MachineDominator Tree Construction
421; GCN-O1-NEXT:        Machine Natural Loop Construction
422; GCN-O1-NEXT:        MachinePostDominator Tree Construction
423; GCN-O1-NEXT:        SI insert wait instructions
424; GCN-O1-NEXT:        Insert required mode register values
425; GCN-O1-NEXT:        SI Insert Hard Clauses
426; GCN-O1-NEXT:        SI Final Branch Preparation
427; GCN-O1-NEXT:        SI peephole optimizations
428; GCN-O1-NEXT:        Post RA hazard recognizer
429; GCN-O1-NEXT:        AMDGPU Insert Delay ALU
430; GCN-O1-NEXT:        Branch relaxation pass
431; GCN-O1-NEXT:        AMDGPU Preload Kernel Arguments Prolog
432; GCN-O1-NEXT:        Register Usage Information Collector Pass
433; GCN-O1-NEXT:        Remove Loads Into Fake Uses
434; GCN-O1-NEXT:        Live DEBUG_VALUE analysis
435; GCN-O1-NEXT:        Machine Sanitizer Binary Metadata
436; GCN-O1-NEXT:        Lazy Machine Block Frequency Analysis
437; GCN-O1-NEXT:        Machine Optimization Remark Emitter
438; GCN-O1-NEXT:        Stack Frame Layout Analysis
439; GCN-O1-NEXT:        Function register usage analysis
440; GCN-O1-NEXT:        AMDGPU Assembly Printer
441; GCN-O1-NEXT:        Free MachineFunction
442
443; GCN-O1-OPTS:Target Library Information
444; GCN-O1-OPTS-NEXT:Target Pass Configuration
445; GCN-O1-OPTS-NEXT:Machine Module Information
446; GCN-O1-OPTS-NEXT:Target Transform Information
447; GCN-O1-OPTS-NEXT:Assumption Cache Tracker
448; GCN-O1-OPTS-NEXT:Profile summary info
449; GCN-O1-OPTS-NEXT:AMDGPU Address space based Alias Analysis
450; GCN-O1-OPTS-NEXT:External Alias Analysis
451; GCN-O1-OPTS-NEXT:Type-Based Alias Analysis
452; GCN-O1-OPTS-NEXT:Scoped NoAlias Alias Analysis
453; GCN-O1-OPTS-NEXT:Argument Register Usage Information Storage
454; GCN-O1-OPTS-NEXT:Create Garbage Collector Module Metadata
455; GCN-O1-OPTS-NEXT:Machine Branch Probability Analysis
456; GCN-O1-OPTS-NEXT:Register Usage Information Storage
457; GCN-O1-OPTS-NEXT:Default Regalloc Eviction Advisor
458; GCN-O1-OPTS-NEXT:Default Regalloc Priority Advisor
459; GCN-O1-OPTS-NEXT:  ModulePass Manager
460; GCN-O1-OPTS-NEXT:    Pre-ISel Intrinsic Lowering
461; GCN-O1-OPTS-NEXT:    FunctionPass Manager
462; GCN-O1-OPTS-NEXT:      Expand large div/rem
463; GCN-O1-OPTS-NEXT:      Expand large fp convert
464; GCN-O1-OPTS-NEXT:    AMDGPU Remove Incompatible Functions
465; GCN-O1-OPTS-NEXT:    AMDGPU Printf lowering
466; GCN-O1-OPTS-NEXT:    Lower ctors and dtors for AMDGPU
467; GCN-O1-OPTS-NEXT:    Expand variadic functions
468; GCN-O1-OPTS-NEXT:    AMDGPU Inline All Functions
469; GCN-O1-OPTS-NEXT:    Inliner for always_inline functions
470; GCN-O1-OPTS-NEXT:      FunctionPass Manager
471; GCN-O1-OPTS-NEXT:        Dominator Tree Construction
472; GCN-O1-OPTS-NEXT:        Basic Alias Analysis (stateless AA impl)
473; GCN-O1-OPTS-NEXT:        Function Alias Analysis Results
474; GCN-O1-OPTS-NEXT:    Lower OpenCL enqueued blocks
475; GCN-O1-OPTS-NEXT:    AMDGPU Software lowering of LDS
476; GCN-O1-OPTS-NEXT:    Lower uses of LDS variables from non-kernel functions
477; GCN-O1-OPTS-NEXT:    FunctionPass Manager
478; GCN-O1-OPTS-NEXT:      Infer address spaces
479; GCN-O1-OPTS-NEXT:      Dominator Tree Construction
480; GCN-O1-OPTS-NEXT:      Cycle Info Analysis
481; GCN-O1-OPTS-NEXT:      Uniformity Analysis
482; GCN-O1-OPTS-NEXT:      AMDGPU atomic optimizations
483; GCN-O1-OPTS-NEXT:      Expand Atomic instructions
484; GCN-O1-OPTS-NEXT:      Dominator Tree Construction
485; GCN-O1-OPTS-NEXT:      Natural Loop Information
486; GCN-O1-OPTS-NEXT:      AMDGPU Promote Alloca
487; GCN-O1-OPTS-NEXT:      Canonicalize natural loops
488; GCN-O1-OPTS-NEXT:      Lazy Branch Probability Analysis
489; GCN-O1-OPTS-NEXT:      Lazy Block Frequency Analysis
490; GCN-O1-OPTS-NEXT:      Optimization Remark Emitter
491; GCN-O1-OPTS-NEXT:      Scalar Evolution Analysis
492; GCN-O1-OPTS-NEXT:      Loop Data Prefetch
493; GCN-O1-OPTS-NEXT:      Split GEPs to a variadic base and a constant offset for better CSE
494; GCN-O1-OPTS-NEXT:      Scalar Evolution Analysis
495; GCN-O1-OPTS-NEXT:      Straight line strength reduction
496; GCN-O1-OPTS-NEXT:      Early CSE
497; GCN-O1-OPTS-NEXT:      Scalar Evolution Analysis
498; GCN-O1-OPTS-NEXT:      Nary reassociation
499; GCN-O1-OPTS-NEXT:      Early CSE
500; GCN-O1-OPTS-NEXT:      Cycle Info Analysis
501; GCN-O1-OPTS-NEXT:      Uniformity Analysis
502; GCN-O1-OPTS-NEXT:      AMDGPU IR optimizations
503; GCN-O1-OPTS-NEXT:      Basic Alias Analysis (stateless AA impl)
504; GCN-O1-OPTS-NEXT:      Canonicalize natural loops
505; GCN-O1-OPTS-NEXT:      Scalar Evolution Analysis
506; GCN-O1-OPTS-NEXT:      Loop Pass Manager
507; GCN-O1-OPTS-NEXT:        Canonicalize Freeze Instructions in Loops
508; GCN-O1-OPTS-NEXT:        Induction Variable Users
509; GCN-O1-OPTS-NEXT:        Loop Strength Reduction
510; GCN-O1-OPTS-NEXT:      Basic Alias Analysis (stateless AA impl)
511; GCN-O1-OPTS-NEXT:      Function Alias Analysis Results
512; GCN-O1-OPTS-NEXT:      Merge contiguous icmps into a memcmp
513; GCN-O1-OPTS-NEXT:      Natural Loop Information
514; GCN-O1-OPTS-NEXT:      Lazy Branch Probability Analysis
515; GCN-O1-OPTS-NEXT:      Lazy Block Frequency Analysis
516; GCN-O1-OPTS-NEXT:      Expand memcmp() to load/stores
517; GCN-O1-OPTS-NEXT:      Remove unreachable blocks from the CFG
518; GCN-O1-OPTS-NEXT:      Natural Loop Information
519; GCN-O1-OPTS-NEXT:      Post-Dominator Tree Construction
520; GCN-O1-OPTS-NEXT:      Branch Probability Analysis
521; GCN-O1-OPTS-NEXT:      Block Frequency Analysis
522; GCN-O1-OPTS-NEXT:      Constant Hoisting
523; GCN-O1-OPTS-NEXT:      Replace intrinsics with calls to vector library
524; GCN-O1-OPTS-NEXT:      Lazy Branch Probability Analysis
525; GCN-O1-OPTS-NEXT:      Lazy Block Frequency Analysis
526; GCN-O1-OPTS-NEXT:      Optimization Remark Emitter
527; GCN-O1-OPTS-NEXT:      Partially inline calls to library functions
528; GCN-O1-OPTS-NEXT:      Instrument function entry/exit with calls to e.g. mcount() (post inlining)
529; GCN-O1-OPTS-NEXT:      Scalarize Masked Memory Intrinsics
530; GCN-O1-OPTS-NEXT:      Expand reduction intrinsics
531; GCN-O1-OPTS-NEXT:      Early CSE
532; GCN-O1-OPTS-NEXT:    CallGraph Construction
533; GCN-O1-OPTS-NEXT:    Call Graph SCC Pass Manager
534; GCN-O1-OPTS-NEXT:      AMDGPU Annotate Kernel Features
535; GCN-O1-OPTS-NEXT:      FunctionPass Manager
536; GCN-O1-OPTS-NEXT:        AMDGPU Lower Kernel Arguments
537; GCN-O1-OPTS-NEXT:    Lower buffer fat pointer operations to buffer resources
538; GCN-O1-OPTS-NEXT:    CallGraph Construction
539; GCN-O1-OPTS-NEXT:    Call Graph SCC Pass Manager
540; GCN-O1-OPTS-NEXT:      DummyCGSCCPass
541; GCN-O1-OPTS-NEXT:      FunctionPass Manager
542; GCN-O1-OPTS-NEXT:        Dominator Tree Construction
543; GCN-O1-OPTS-NEXT:        Natural Loop Information
544; GCN-O1-OPTS-NEXT:        CodeGen Prepare
545; GCN-O1-OPTS-NEXT:        Dominator Tree Construction
546; GCN-O1-OPTS-NEXT:        Basic Alias Analysis (stateless AA impl)
547; GCN-O1-OPTS-NEXT:        Function Alias Analysis Results
548; GCN-O1-OPTS-NEXT:        Natural Loop Information
549; GCN-O1-OPTS-NEXT:        Scalar Evolution Analysis
550; GCN-O1-OPTS-NEXT:        GPU Load and Store Vectorizer
551; GCN-O1-OPTS-NEXT:        Lazy Value Information Analysis
552; GCN-O1-OPTS-NEXT:        Lower SwitchInst's to branches
553; GCN-O1-OPTS-NEXT:        Lower invoke and unwind, for unwindless code generators
554; GCN-O1-OPTS-NEXT:        Remove unreachable blocks from the CFG
555; GCN-O1-OPTS-NEXT:        Dominator Tree Construction
556; GCN-O1-OPTS-NEXT:        Basic Alias Analysis (stateless AA impl)
557; GCN-O1-OPTS-NEXT:        Function Alias Analysis Results
558; GCN-O1-OPTS-NEXT:        Flatten the CFG
559; GCN-O1-OPTS-NEXT:        Dominator Tree Construction
560; GCN-O1-OPTS-NEXT:        Basic Alias Analysis (stateless AA impl)
561; GCN-O1-OPTS-NEXT:        Function Alias Analysis Results
562; GCN-O1-OPTS-NEXT:        Natural Loop Information
563; GCN-O1-OPTS-NEXT:        Code sinking
564; GCN-O1-OPTS-NEXT:        Cycle Info Analysis
565; GCN-O1-OPTS-NEXT:        Uniformity Analysis
566; GCN-O1-OPTS-NEXT:        AMDGPU IR late optimizations
567; GCN-O1-OPTS-NEXT:        Post-Dominator Tree Construction
568; GCN-O1-OPTS-NEXT:        Unify divergent function exit nodes
569; GCN-O1-OPTS-NEXT:        Dominator Tree Construction
570; GCN-O1-OPTS-NEXT:        Cycle Info Analysis
571; GCN-O1-OPTS-NEXT:        Convert irreducible control-flow into natural loops
572; GCN-O1-OPTS-NEXT:        Natural Loop Information
573; GCN-O1-OPTS-NEXT:        Fixup each natural loop to have a single exit block
574; GCN-O1-OPTS-NEXT:        Post-Dominator Tree Construction
575; GCN-O1-OPTS-NEXT:        Dominance Frontier Construction
576; GCN-O1-OPTS-NEXT:        Detect single entry single exit regions
577; GCN-O1-OPTS-NEXT:        Region Pass Manager
578; GCN-O1-OPTS-NEXT:          Structurize control flow
579; GCN-O1-OPTS-NEXT:        Cycle Info Analysis
580; GCN-O1-OPTS-NEXT:        Uniformity Analysis
581; GCN-O1-OPTS-NEXT:        Basic Alias Analysis (stateless AA impl)
582; GCN-O1-OPTS-NEXT:        Function Alias Analysis Results
583; GCN-O1-OPTS-NEXT:        Memory SSA
584; GCN-O1-OPTS-NEXT:        AMDGPU Annotate Uniform Values
585; GCN-O1-OPTS-NEXT:        Natural Loop Information
586; GCN-O1-OPTS-NEXT:        SI annotate control flow
587; GCN-O1-OPTS-NEXT:        Cycle Info Analysis
588; GCN-O1-OPTS-NEXT:        Uniformity Analysis
589; GCN-O1-OPTS-NEXT:        AMDGPU Rewrite Undef for PHI
590; GCN-O1-OPTS-NEXT:        LCSSA Verifier
591; GCN-O1-OPTS-NEXT:        Loop-Closed SSA Form Pass
592; GCN-O1-OPTS-NEXT:      DummyCGSCCPass
593; GCN-O1-OPTS-NEXT:      FunctionPass Manager
594; GCN-O1-OPTS-NEXT:        Dominator Tree Construction
595; GCN-O1-OPTS-NEXT:        Basic Alias Analysis (stateless AA impl)
596; GCN-O1-OPTS-NEXT:        Function Alias Analysis Results
597; GCN-O1-OPTS-NEXT:        ObjC ARC contraction
598; GCN-O1-OPTS-NEXT:        Prepare callbr
599; GCN-O1-OPTS-NEXT:        Safe Stack instrumentation pass
600; GCN-O1-OPTS-NEXT:        Insert stack protectors
601; GCN-O1-OPTS-NEXT:        Cycle Info Analysis
602; GCN-O1-OPTS-NEXT:        Uniformity Analysis
603; GCN-O1-OPTS-NEXT:        Basic Alias Analysis (stateless AA impl)
604; GCN-O1-OPTS-NEXT:        Function Alias Analysis Results
605; GCN-O1-OPTS-NEXT:        Natural Loop Information
606; GCN-O1-OPTS-NEXT:        Post-Dominator Tree Construction
607; GCN-O1-OPTS-NEXT:        Branch Probability Analysis
608; GCN-O1-OPTS-NEXT:        Assignment Tracking Analysis
609; GCN-O1-OPTS-NEXT:        Lazy Branch Probability Analysis
610; GCN-O1-OPTS-NEXT:        Lazy Block Frequency Analysis
611; GCN-O1-OPTS-NEXT:        AMDGPU DAG->DAG Pattern Instruction Selection
612; GCN-O1-OPTS-NEXT:        MachineDominator Tree Construction
613; GCN-O1-OPTS-NEXT:        SI Fix SGPR copies
614; GCN-O1-OPTS-NEXT:        MachinePostDominator Tree Construction
615; GCN-O1-OPTS-NEXT:        SI Lower i1 Copies
616; GCN-O1-OPTS-NEXT:        Finalize ISel and expand pseudo-instructions
617; GCN-O1-OPTS-NEXT:        Lazy Machine Block Frequency Analysis
618; GCN-O1-OPTS-NEXT:        Early Tail Duplication
619; GCN-O1-OPTS-NEXT:        Optimize machine instruction PHIs
620; GCN-O1-OPTS-NEXT:        Slot index numbering
621; GCN-O1-OPTS-NEXT:        Merge disjoint stack slots
622; GCN-O1-OPTS-NEXT:        Local Stack Slot Allocation
623; GCN-O1-OPTS-NEXT:        Remove dead machine instructions
624; GCN-O1-OPTS-NEXT:        MachineDominator Tree Construction
625; GCN-O1-OPTS-NEXT:        Machine Natural Loop Construction
626; GCN-O1-OPTS-NEXT:        Machine Block Frequency Analysis
627; GCN-O1-OPTS-NEXT:        Early Machine Loop Invariant Code Motion
628; GCN-O1-OPTS-NEXT:        MachineDominator Tree Construction
629; GCN-O1-OPTS-NEXT:        Machine Block Frequency Analysis
630; GCN-O1-OPTS-NEXT:        Machine Common Subexpression Elimination
631; GCN-O1-OPTS-NEXT:        MachinePostDominator Tree Construction
632; GCN-O1-OPTS-NEXT:        Machine Cycle Info Analysis
633; GCN-O1-OPTS-NEXT:        Machine code sinking
634; GCN-O1-OPTS-NEXT:        Peephole Optimizations
635; GCN-O1-OPTS-NEXT:        Remove dead machine instructions
636; GCN-O1-OPTS-NEXT:        SI Fold Operands
637; GCN-O1-OPTS-NEXT:        GCN DPP Combine
638; GCN-O1-OPTS-NEXT:        SI Load Store Optimizer
639; GCN-O1-OPTS-NEXT:        SI Peephole SDWA
640; GCN-O1-OPTS-NEXT:        Machine Block Frequency Analysis
641; GCN-O1-OPTS-NEXT:        MachineDominator Tree Construction
642; GCN-O1-OPTS-NEXT:        Early Machine Loop Invariant Code Motion
643; GCN-O1-OPTS-NEXT:        MachineDominator Tree Construction
644; GCN-O1-OPTS-NEXT:        Machine Block Frequency Analysis
645; GCN-O1-OPTS-NEXT:        Machine Common Subexpression Elimination
646; GCN-O1-OPTS-NEXT:        SI Fold Operands
647; GCN-O1-OPTS-NEXT:        Remove dead machine instructions
648; GCN-O1-OPTS-NEXT:        SI Shrink Instructions
649; GCN-O1-OPTS-NEXT:        Register Usage Information Propagation
650; GCN-O1-OPTS-NEXT:        Detect Dead Lanes
651; GCN-O1-OPTS-NEXT:        Remove dead machine instructions
652; GCN-O1-OPTS-NEXT:        Init Undef Pass
653; GCN-O1-OPTS-NEXT:        Process Implicit Definitions
654; GCN-O1-OPTS-NEXT:        Remove unreachable machine basic blocks
655; GCN-O1-OPTS-NEXT:        Live Variable Analysis
656; GCN-O1-OPTS-NEXT:        SI Optimize VGPR LiveRange
657; GCN-O1-OPTS-NEXT:        Eliminate PHI nodes for register allocation
658; GCN-O1-OPTS-NEXT:        SI Lower control flow pseudo instructions
659; GCN-O1-OPTS-NEXT:        Two-Address instruction pass
660; GCN-O1-OPTS-NEXT:        Slot index numbering
661; GCN-O1-OPTS-NEXT:        Live Interval Analysis
662; GCN-O1-OPTS-NEXT:        Machine Natural Loop Construction
663; GCN-O1-OPTS-NEXT:        Register Coalescer
664; GCN-O1-OPTS-NEXT:        Rename Disconnected Subregister Components
665; GCN-O1-OPTS-NEXT:        Rewrite Partial Register Uses
666; GCN-O1-OPTS-NEXT:        Machine Instruction Scheduler
667; GCN-O1-OPTS-NEXT:        AMDGPU Pre-RA optimizations
668; GCN-O1-OPTS-NEXT:        SI Whole Quad Mode
669; GCN-O1-OPTS-NEXT:        SI optimize exec mask operations pre-RA
670; GCN-O1-OPTS-NEXT:        AMDGPU Pre-RA Long Branch Reg
671; GCN-O1-OPTS-NEXT:        Machine Natural Loop Construction
672; GCN-O1-OPTS-NEXT:        Machine Block Frequency Analysis
673; GCN-O1-OPTS-NEXT:        Debug Variable Analysis
674; GCN-O1-OPTS-NEXT:        Live Stack Slot Analysis
675; GCN-O1-OPTS-NEXT:        Virtual Register Map
676; GCN-O1-OPTS-NEXT:        Live Register Matrix
677; GCN-O1-OPTS-NEXT:        Bundle Machine CFG Edges
678; GCN-O1-OPTS-NEXT:        Spill Code Placement Analysis
679; GCN-O1-OPTS-NEXT:        Lazy Machine Block Frequency Analysis
680; GCN-O1-OPTS-NEXT:        Machine Optimization Remark Emitter
681; GCN-O1-OPTS-NEXT:        Greedy Register Allocator
682; GCN-O1-OPTS-NEXT:        Virtual Register Rewriter
683; GCN-O1-OPTS-NEXT:        Stack Slot Coloring
684; GCN-O1-OPTS-NEXT:        SI lower SGPR spill instructions
685; GCN-O1-OPTS-NEXT:        Virtual Register Map
686; GCN-O1-OPTS-NEXT:        Live Register Matrix
687; GCN-O1-OPTS-NEXT:        SI Pre-allocate WWM Registers
688; GCN-O1-OPTS-NEXT:        Live Stack Slot Analysis
689; GCN-O1-OPTS-NEXT:        Greedy Register Allocator
690; GCN-O1-OPTS-NEXT:        SI Lower WWM Copies
691; GCN-O1-OPTS-NEXT:        Virtual Register Rewriter
692; GCN-O1-OPTS-NEXT:        AMDGPU Reserve WWM Registers
693; GCN-O1-OPTS-NEXT:        Virtual Register Map
694; GCN-O1-OPTS-NEXT:        Live Register Matrix
695; GCN-O1-OPTS-NEXT:        Greedy Register Allocator
696; GCN-O1-OPTS-NEXT:        GCN NSA Reassign
697; GCN-O1-OPTS-NEXT:        Virtual Register Rewriter
698; GCN-O1-OPTS-NEXT:        AMDGPU Mark Last Scratch Load
699; GCN-O1-OPTS-NEXT:        Stack Slot Coloring
700; GCN-O1-OPTS-NEXT:        Machine Copy Propagation Pass
701; GCN-O1-OPTS-NEXT:        Machine Loop Invariant Code Motion
702; GCN-O1-OPTS-NEXT:        SI Fix VGPR copies
703; GCN-O1-OPTS-NEXT:        SI optimize exec mask operations
704; GCN-O1-OPTS-NEXT:        Remove Redundant DEBUG_VALUE analysis
705; GCN-O1-OPTS-NEXT:        Fixup Statepoint Caller Saved
706; GCN-O1-OPTS-NEXT:        PostRA Machine Sink
707; GCN-O1-OPTS-NEXT:        Machine Block Frequency Analysis
708; GCN-O1-OPTS-NEXT:        MachineDominator Tree Construction
709; GCN-O1-OPTS-NEXT:        MachinePostDominator Tree Construction
710; GCN-O1-OPTS-NEXT:        Lazy Machine Block Frequency Analysis
711; GCN-O1-OPTS-NEXT:        Machine Optimization Remark Emitter
712; GCN-O1-OPTS-NEXT:        Shrink Wrapping analysis
713; GCN-O1-OPTS-NEXT:        Prologue/Epilogue Insertion & Frame Finalization
714; GCN-O1-OPTS-NEXT:        Machine Late Instructions Cleanup Pass
715; GCN-O1-OPTS-NEXT:        Control Flow Optimizer
716; GCN-O1-OPTS-NEXT:        Lazy Machine Block Frequency Analysis
717; GCN-O1-OPTS-NEXT:        Tail Duplication
718; GCN-O1-OPTS-NEXT:        Machine Copy Propagation Pass
719; GCN-O1-OPTS-NEXT:        Post-RA pseudo instruction expansion pass
720; GCN-O1-OPTS-NEXT:        SI Shrink Instructions
721; GCN-O1-OPTS-NEXT:        SI post-RA bundler
722; GCN-O1-OPTS-NEXT:        MachineDominator Tree Construction
723; GCN-O1-OPTS-NEXT:        Machine Natural Loop Construction
724; GCN-O1-OPTS-NEXT:        PostRA Machine Instruction Scheduler
725; GCN-O1-OPTS-NEXT:        Machine Block Frequency Analysis
726; GCN-O1-OPTS-NEXT:        MachinePostDominator Tree Construction
727; GCN-O1-OPTS-NEXT:        Branch Probability Basic Block Placement
728; GCN-O1-OPTS-NEXT:        Insert fentry calls
729; GCN-O1-OPTS-NEXT:        Insert XRay ops
730; GCN-O1-OPTS-NEXT:        GCN Create VOPD Instructions
731; GCN-O1-OPTS-NEXT:        SI Memory Legalizer
732; GCN-O1-OPTS-NEXT:        MachineDominator Tree Construction
733; GCN-O1-OPTS-NEXT:        Machine Natural Loop Construction
734; GCN-O1-OPTS-NEXT:        MachinePostDominator Tree Construction
735; GCN-O1-OPTS-NEXT:        SI insert wait instructions
736; GCN-O1-OPTS-NEXT:        Insert required mode register values
737; GCN-O1-OPTS-NEXT:        SI Insert Hard Clauses
738; GCN-O1-OPTS-NEXT:        SI Final Branch Preparation
739; GCN-O1-OPTS-NEXT:        SI peephole optimizations
740; GCN-O1-OPTS-NEXT:        Post RA hazard recognizer
741; GCN-O1-OPTS-NEXT:        AMDGPU Insert Delay ALU
742; GCN-O1-OPTS-NEXT:        Branch relaxation pass
743; GCN-O1-OPTS-NEXT:        AMDGPU Preload Kernel Arguments Prolog
744; GCN-O1-OPTS-NEXT:        Register Usage Information Collector Pass
745; GCN-O1-OPTS-NEXT:        Remove Loads Into Fake Uses
746; GCN-O1-OPTS-NEXT:        Live DEBUG_VALUE analysis
747; GCN-O1-OPTS-NEXT:        Machine Sanitizer Binary Metadata
748; GCN-O1-OPTS-NEXT:        Lazy Machine Block Frequency Analysis
749; GCN-O1-OPTS-NEXT:        Machine Optimization Remark Emitter
750; GCN-O1-OPTS-NEXT:        Stack Frame Layout Analysis
751; GCN-O1-OPTS-NEXT:        Function register usage analysis
752; GCN-O1-OPTS-NEXT:        AMDGPU Assembly Printer
753; GCN-O1-OPTS-NEXT:        Free MachineFunction
754
755; GCN-O2:Target Library Information
756; GCN-O2-NEXT:Target Pass Configuration
757; GCN-O2-NEXT:Machine Module Information
758; GCN-O2-NEXT:Target Transform Information
759; GCN-O2-NEXT:Assumption Cache Tracker
760; GCN-O2-NEXT:Profile summary info
761; GCN-O2-NEXT:AMDGPU Address space based Alias Analysis
762; GCN-O2-NEXT:External Alias Analysis
763; GCN-O2-NEXT:Type-Based Alias Analysis
764; GCN-O2-NEXT:Scoped NoAlias Alias Analysis
765; GCN-O2-NEXT:Argument Register Usage Information Storage
766; GCN-O2-NEXT:Create Garbage Collector Module Metadata
767; GCN-O2-NEXT:Machine Branch Probability Analysis
768; GCN-O2-NEXT:Register Usage Information Storage
769; GCN-O2-NEXT:Default Regalloc Eviction Advisor
770; GCN-O2-NEXT:Default Regalloc Priority Advisor
771; GCN-O2-NEXT:  ModulePass Manager
772; GCN-O2-NEXT:    Pre-ISel Intrinsic Lowering
773; GCN-O2-NEXT:    FunctionPass Manager
774; GCN-O2-NEXT:      Expand large div/rem
775; GCN-O2-NEXT:      Expand large fp convert
776; GCN-O2-NEXT:    AMDGPU Remove Incompatible Functions
777; GCN-O2-NEXT:    AMDGPU Printf lowering
778; GCN-O2-NEXT:    Lower ctors and dtors for AMDGPU
779; GCN-O2-NEXT:    FunctionPass Manager
780; GCN-O2-NEXT:      AMDGPU Image Intrinsic Optimizer
781; GCN-O2-NEXT:    Expand variadic functions
782; GCN-O2-NEXT:    AMDGPU Inline All Functions
783; GCN-O2-NEXT:    Inliner for always_inline functions
784; GCN-O2-NEXT:      FunctionPass Manager
785; GCN-O2-NEXT:        Dominator Tree Construction
786; GCN-O2-NEXT:        Basic Alias Analysis (stateless AA impl)
787; GCN-O2-NEXT:        Function Alias Analysis Results
788; GCN-O2-NEXT:    Lower OpenCL enqueued blocks
789; GCN-O2-NEXT:    AMDGPU Software lowering of LDS
790; GCN-O2-NEXT:    Lower uses of LDS variables from non-kernel functions
791; GCN-O2-NEXT:    FunctionPass Manager
792; GCN-O2-NEXT:      Infer address spaces
793; GCN-O2-NEXT:      Dominator Tree Construction
794; GCN-O2-NEXT:      Cycle Info Analysis
795; GCN-O2-NEXT:      Uniformity Analysis
796; GCN-O2-NEXT:      AMDGPU atomic optimizations
797; GCN-O2-NEXT:      Expand Atomic instructions
798; GCN-O2-NEXT:      Dominator Tree Construction
799; GCN-O2-NEXT:      Natural Loop Information
800; GCN-O2-NEXT:      AMDGPU Promote Alloca
801; GCN-O2-NEXT:      Split GEPs to a variadic base and a constant offset for better CSE
802; GCN-O2-NEXT:      Scalar Evolution Analysis
803; GCN-O2-NEXT:      Straight line strength reduction
804; GCN-O2-NEXT:      Early CSE
805; GCN-O2-NEXT:      Scalar Evolution Analysis
806; GCN-O2-NEXT:      Nary reassociation
807; GCN-O2-NEXT:      Early CSE
808; GCN-O2-NEXT:      Cycle Info Analysis
809; GCN-O2-NEXT:      Uniformity Analysis
810; GCN-O2-NEXT:      AMDGPU IR optimizations
811; GCN-O2-NEXT:      Basic Alias Analysis (stateless AA impl)
812; GCN-O2-NEXT:      Function Alias Analysis Results
813; GCN-O2-NEXT:      Memory SSA
814; GCN-O2-NEXT:      Canonicalize natural loops
815; GCN-O2-NEXT:      LCSSA Verifier
816; GCN-O2-NEXT:      Loop-Closed SSA Form Pass
817; GCN-O2-NEXT:      Scalar Evolution Analysis
818; GCN-O2-NEXT:      Lazy Branch Probability Analysis
819; GCN-O2-NEXT:      Lazy Block Frequency Analysis
820; GCN-O2-NEXT:      Loop Pass Manager
821; GCN-O2-NEXT:        Loop Invariant Code Motion
822; GCN-O2-NEXT:      Loop Pass Manager
823; GCN-O2-NEXT:        Canonicalize Freeze Instructions in Loops
824; GCN-O2-NEXT:        Induction Variable Users
825; GCN-O2-NEXT:        Loop Strength Reduction
826; GCN-O2-NEXT:      Basic Alias Analysis (stateless AA impl)
827; GCN-O2-NEXT:      Function Alias Analysis Results
828; GCN-O2-NEXT:      Merge contiguous icmps into a memcmp
829; GCN-O2-NEXT:      Natural Loop Information
830; GCN-O2-NEXT:      Lazy Branch Probability Analysis
831; GCN-O2-NEXT:      Lazy Block Frequency Analysis
832; GCN-O2-NEXT:      Expand memcmp() to load/stores
833; GCN-O2-NEXT:      Remove unreachable blocks from the CFG
834; GCN-O2-NEXT:      Natural Loop Information
835; GCN-O2-NEXT:      Post-Dominator Tree Construction
836; GCN-O2-NEXT:      Branch Probability Analysis
837; GCN-O2-NEXT:      Block Frequency Analysis
838; GCN-O2-NEXT:      Constant Hoisting
839; GCN-O2-NEXT:      Replace intrinsics with calls to vector library
840; GCN-O2-NEXT:      Lazy Branch Probability Analysis
841; GCN-O2-NEXT:      Lazy Block Frequency Analysis
842; GCN-O2-NEXT:      Optimization Remark Emitter
843; GCN-O2-NEXT:      Partially inline calls to library functions
844; GCN-O2-NEXT:      Instrument function entry/exit with calls to e.g. mcount() (post inlining)
845; GCN-O2-NEXT:      Scalarize Masked Memory Intrinsics
846; GCN-O2-NEXT:      Expand reduction intrinsics
847; GCN-O2-NEXT:      Early CSE
848; GCN-O2-NEXT:    CallGraph Construction
849; GCN-O2-NEXT:    Call Graph SCC Pass Manager
850; GCN-O2-NEXT:      AMDGPU Annotate Kernel Features
851; GCN-O2-NEXT:      FunctionPass Manager
852; GCN-O2-NEXT:        AMDGPU Lower Kernel Arguments
853; GCN-O2-NEXT:    Lower buffer fat pointer operations to buffer resources
854; GCN-O2-NEXT:    CallGraph Construction
855; GCN-O2-NEXT:    Call Graph SCC Pass Manager
856; GCN-O2-NEXT:      DummyCGSCCPass
857; GCN-O2-NEXT:      FunctionPass Manager
858; GCN-O2-NEXT:        Dominator Tree Construction
859; GCN-O2-NEXT:        Natural Loop Information
860; GCN-O2-NEXT:        CodeGen Prepare
861; GCN-O2-NEXT:        Dominator Tree Construction
862; GCN-O2-NEXT:        Basic Alias Analysis (stateless AA impl)
863; GCN-O2-NEXT:        Function Alias Analysis Results
864; GCN-O2-NEXT:        Natural Loop Information
865; GCN-O2-NEXT:        Scalar Evolution Analysis
866; GCN-O2-NEXT:        GPU Load and Store Vectorizer
867; GCN-O2-NEXT:        Lazy Value Information Analysis
868; GCN-O2-NEXT:        Lower SwitchInst's to branches
869; GCN-O2-NEXT:        Lower invoke and unwind, for unwindless code generators
870; GCN-O2-NEXT:        Remove unreachable blocks from the CFG
871; GCN-O2-NEXT:        Dominator Tree Construction
872; GCN-O2-NEXT:        Basic Alias Analysis (stateless AA impl)
873; GCN-O2-NEXT:        Function Alias Analysis Results
874; GCN-O2-NEXT:        Flatten the CFG
875; GCN-O2-NEXT:        Dominator Tree Construction
876; GCN-O2-NEXT:        Basic Alias Analysis (stateless AA impl)
877; GCN-O2-NEXT:        Function Alias Analysis Results
878; GCN-O2-NEXT:        Natural Loop Information
879; GCN-O2-NEXT:        Code sinking
880; GCN-O2-NEXT:        Cycle Info Analysis
881; GCN-O2-NEXT:        Uniformity Analysis
882; GCN-O2-NEXT:        AMDGPU IR late optimizations
883; GCN-O2-NEXT:        Post-Dominator Tree Construction
884; GCN-O2-NEXT:        Unify divergent function exit nodes
885; GCN-O2-NEXT:        Dominator Tree Construction
886; GCN-O2-NEXT:        Cycle Info Analysis
887; GCN-O2-NEXT:        Convert irreducible control-flow into natural loops
888; GCN-O2-NEXT:        Natural Loop Information
889; GCN-O2-NEXT:        Fixup each natural loop to have a single exit block
890; GCN-O2-NEXT:        Post-Dominator Tree Construction
891; GCN-O2-NEXT:        Dominance Frontier Construction
892; GCN-O2-NEXT:        Detect single entry single exit regions
893; GCN-O2-NEXT:        Region Pass Manager
894; GCN-O2-NEXT:          Structurize control flow
895; GCN-O2-NEXT:        Cycle Info Analysis
896; GCN-O2-NEXT:        Uniformity Analysis
897; GCN-O2-NEXT:        Basic Alias Analysis (stateless AA impl)
898; GCN-O2-NEXT:        Function Alias Analysis Results
899; GCN-O2-NEXT:        Memory SSA
900; GCN-O2-NEXT:        AMDGPU Annotate Uniform Values
901; GCN-O2-NEXT:        Natural Loop Information
902; GCN-O2-NEXT:        SI annotate control flow
903; GCN-O2-NEXT:        Cycle Info Analysis
904; GCN-O2-NEXT:        Uniformity Analysis
905; GCN-O2-NEXT:        AMDGPU Rewrite Undef for PHI
906; GCN-O2-NEXT:        LCSSA Verifier
907; GCN-O2-NEXT:        Loop-Closed SSA Form Pass
908; GCN-O2-NEXT:      Analysis if a function is memory bound
909; GCN-O2-NEXT:      DummyCGSCCPass
910; GCN-O2-NEXT:      FunctionPass Manager
911; GCN-O2-NEXT:        Dominator Tree Construction
912; GCN-O2-NEXT:        Basic Alias Analysis (stateless AA impl)
913; GCN-O2-NEXT:        Function Alias Analysis Results
914; GCN-O2-NEXT:        ObjC ARC contraction
915; GCN-O2-NEXT:        Prepare callbr
916; GCN-O2-NEXT:        Safe Stack instrumentation pass
917; GCN-O2-NEXT:        Insert stack protectors
918; GCN-O2-NEXT:        Cycle Info Analysis
919; GCN-O2-NEXT:        Uniformity Analysis
920; GCN-O2-NEXT:        Basic Alias Analysis (stateless AA impl)
921; GCN-O2-NEXT:        Function Alias Analysis Results
922; GCN-O2-NEXT:        Natural Loop Information
923; GCN-O2-NEXT:        Post-Dominator Tree Construction
924; GCN-O2-NEXT:        Branch Probability Analysis
925; GCN-O2-NEXT:        Assignment Tracking Analysis
926; GCN-O2-NEXT:        Lazy Branch Probability Analysis
927; GCN-O2-NEXT:        Lazy Block Frequency Analysis
928; GCN-O2-NEXT:        AMDGPU DAG->DAG Pattern Instruction Selection
929; GCN-O2-NEXT:        MachineDominator Tree Construction
930; GCN-O2-NEXT:        SI Fix SGPR copies
931; GCN-O2-NEXT:        MachinePostDominator Tree Construction
932; GCN-O2-NEXT:        SI Lower i1 Copies
933; GCN-O2-NEXT:        Finalize ISel and expand pseudo-instructions
934; GCN-O2-NEXT:        Lazy Machine Block Frequency Analysis
935; GCN-O2-NEXT:        Early Tail Duplication
936; GCN-O2-NEXT:        Optimize machine instruction PHIs
937; GCN-O2-NEXT:        Slot index numbering
938; GCN-O2-NEXT:        Merge disjoint stack slots
939; GCN-O2-NEXT:        Local Stack Slot Allocation
940; GCN-O2-NEXT:        Remove dead machine instructions
941; GCN-O2-NEXT:        MachineDominator Tree Construction
942; GCN-O2-NEXT:        Machine Natural Loop Construction
943; GCN-O2-NEXT:        Machine Block Frequency Analysis
944; GCN-O2-NEXT:        Early Machine Loop Invariant Code Motion
945; GCN-O2-NEXT:        MachineDominator Tree Construction
946; GCN-O2-NEXT:        Machine Block Frequency Analysis
947; GCN-O2-NEXT:        Machine Common Subexpression Elimination
948; GCN-O2-NEXT:        MachinePostDominator Tree Construction
949; GCN-O2-NEXT:        Machine Cycle Info Analysis
950; GCN-O2-NEXT:        Machine code sinking
951; GCN-O2-NEXT:        Peephole Optimizations
952; GCN-O2-NEXT:        Remove dead machine instructions
953; GCN-O2-NEXT:        SI Fold Operands
954; GCN-O2-NEXT:        GCN DPP Combine
955; GCN-O2-NEXT:        SI Load Store Optimizer
956; GCN-O2-NEXT:        SI Peephole SDWA
957; GCN-O2-NEXT:        Machine Block Frequency Analysis
958; GCN-O2-NEXT:        MachineDominator Tree Construction
959; GCN-O2-NEXT:        Early Machine Loop Invariant Code Motion
960; GCN-O2-NEXT:        MachineDominator Tree Construction
961; GCN-O2-NEXT:        Machine Block Frequency Analysis
962; GCN-O2-NEXT:        Machine Common Subexpression Elimination
963; GCN-O2-NEXT:        SI Fold Operands
964; GCN-O2-NEXT:        Remove dead machine instructions
965; GCN-O2-NEXT:        SI Shrink Instructions
966; GCN-O2-NEXT:        Register Usage Information Propagation
967; GCN-O2-NEXT:        Detect Dead Lanes
968; GCN-O2-NEXT:        Remove dead machine instructions
969; GCN-O2-NEXT:        Init Undef Pass
970; GCN-O2-NEXT:        Process Implicit Definitions
971; GCN-O2-NEXT:        Remove unreachable machine basic blocks
972; GCN-O2-NEXT:        Live Variable Analysis
973; GCN-O2-NEXT:        SI Optimize VGPR LiveRange
974; GCN-O2-NEXT:        Eliminate PHI nodes for register allocation
975; GCN-O2-NEXT:        SI Lower control flow pseudo instructions
976; GCN-O2-NEXT:        Two-Address instruction pass
977; GCN-O2-NEXT:        Slot index numbering
978; GCN-O2-NEXT:        Live Interval Analysis
979; GCN-O2-NEXT:        Machine Natural Loop Construction
980; GCN-O2-NEXT:        Register Coalescer
981; GCN-O2-NEXT:        Rename Disconnected Subregister Components
982; GCN-O2-NEXT:        Rewrite Partial Register Uses
983; GCN-O2-NEXT:        Machine Instruction Scheduler
984; GCN-O2-NEXT:        AMDGPU Pre-RA optimizations
985; GCN-O2-NEXT:        SI Whole Quad Mode
986; GCN-O2-NEXT:        SI optimize exec mask operations pre-RA
987; GCN-O2-NEXT:        SI Form memory clauses
988; GCN-O2-NEXT:        AMDGPU Pre-RA Long Branch Reg
989; GCN-O2-NEXT:        Machine Natural Loop Construction
990; GCN-O2-NEXT:        Machine Block Frequency Analysis
991; GCN-O2-NEXT:        Debug Variable Analysis
992; GCN-O2-NEXT:        Live Stack Slot Analysis
993; GCN-O2-NEXT:        Virtual Register Map
994; GCN-O2-NEXT:        Live Register Matrix
995; GCN-O2-NEXT:        Bundle Machine CFG Edges
996; GCN-O2-NEXT:        Spill Code Placement Analysis
997; GCN-O2-NEXT:        Lazy Machine Block Frequency Analysis
998; GCN-O2-NEXT:        Machine Optimization Remark Emitter
999; GCN-O2-NEXT:        Greedy Register Allocator
1000; GCN-O2-NEXT:        Virtual Register Rewriter
1001; GCN-O2-NEXT:        Stack Slot Coloring
1002; GCN-O2-NEXT:        SI lower SGPR spill instructions
1003; GCN-O2-NEXT:        Virtual Register Map
1004; GCN-O2-NEXT:        Live Register Matrix
1005; GCN-O2-NEXT:        SI Pre-allocate WWM Registers
1006; GCN-O2-NEXT:        Live Stack Slot Analysis
1007; GCN-O2-NEXT:        Greedy Register Allocator
1008; GCN-O2-NEXT:        SI Lower WWM Copies
1009; GCN-O2-NEXT:        Virtual Register Rewriter
1010; GCN-O2-NEXT:        AMDGPU Reserve WWM Registers
1011; GCN-O2-NEXT:        Virtual Register Map
1012; GCN-O2-NEXT:        Live Register Matrix
1013; GCN-O2-NEXT:        Greedy Register Allocator
1014; GCN-O2-NEXT:        GCN NSA Reassign
1015; GCN-O2-NEXT:        Virtual Register Rewriter
1016; GCN-O2-NEXT:        AMDGPU Mark Last Scratch Load
1017; GCN-O2-NEXT:        Stack Slot Coloring
1018; GCN-O2-NEXT:        Machine Copy Propagation Pass
1019; GCN-O2-NEXT:        Machine Loop Invariant Code Motion
1020; GCN-O2-NEXT:        SI Fix VGPR copies
1021; GCN-O2-NEXT:        SI optimize exec mask operations
1022; GCN-O2-NEXT:        Remove Redundant DEBUG_VALUE analysis
1023; GCN-O2-NEXT:        Fixup Statepoint Caller Saved
1024; GCN-O2-NEXT:        PostRA Machine Sink
1025; GCN-O2-NEXT:        Machine Block Frequency Analysis
1026; GCN-O2-NEXT:        MachineDominator Tree Construction
1027; GCN-O2-NEXT:        MachinePostDominator Tree Construction
1028; GCN-O2-NEXT:        Lazy Machine Block Frequency Analysis
1029; GCN-O2-NEXT:        Machine Optimization Remark Emitter
1030; GCN-O2-NEXT:        Shrink Wrapping analysis
1031; GCN-O2-NEXT:        Prologue/Epilogue Insertion & Frame Finalization
1032; GCN-O2-NEXT:        Machine Late Instructions Cleanup Pass
1033; GCN-O2-NEXT:        Control Flow Optimizer
1034; GCN-O2-NEXT:        Lazy Machine Block Frequency Analysis
1035; GCN-O2-NEXT:        Tail Duplication
1036; GCN-O2-NEXT:        Machine Copy Propagation Pass
1037; GCN-O2-NEXT:        Post-RA pseudo instruction expansion pass
1038; GCN-O2-NEXT:        SI Shrink Instructions
1039; GCN-O2-NEXT:        SI post-RA bundler
1040; GCN-O2-NEXT:        MachineDominator Tree Construction
1041; GCN-O2-NEXT:        Machine Natural Loop Construction
1042; GCN-O2-NEXT:        PostRA Machine Instruction Scheduler
1043; GCN-O2-NEXT:        Machine Block Frequency Analysis
1044; GCN-O2-NEXT:        MachinePostDominator Tree Construction
1045; GCN-O2-NEXT:        Branch Probability Basic Block Placement
1046; GCN-O2-NEXT:        Insert fentry calls
1047; GCN-O2-NEXT:        Insert XRay ops
1048; GCN-O2-NEXT:        GCN Create VOPD Instructions
1049; GCN-O2-NEXT:        SI Memory Legalizer
1050; GCN-O2-NEXT:        MachineDominator Tree Construction
1051; GCN-O2-NEXT:        Machine Natural Loop Construction
1052; GCN-O2-NEXT:        MachinePostDominator Tree Construction
1053; GCN-O2-NEXT:        SI insert wait instructions
1054; GCN-O2-NEXT:        Insert required mode register values
1055; GCN-O2-NEXT:        SI Insert Hard Clauses
1056; GCN-O2-NEXT:        SI Final Branch Preparation
1057; GCN-O2-NEXT:        SI peephole optimizations
1058; GCN-O2-NEXT:        Post RA hazard recognizer
1059; GCN-O2-NEXT:        AMDGPU Insert Delay ALU
1060; GCN-O2-NEXT:        Branch relaxation pass
1061; GCN-O2-NEXT:        AMDGPU Preload Kernel Arguments Prolog
1062; GCN-O2-NEXT:        Register Usage Information Collector Pass
1063; GCN-O2-NEXT:        Remove Loads Into Fake Uses
1064; GCN-O2-NEXT:        Live DEBUG_VALUE analysis
1065; GCN-O2-NEXT:        Machine Sanitizer Binary Metadata
1066; GCN-O2-NEXT:        Lazy Machine Block Frequency Analysis
1067; GCN-O2-NEXT:        Machine Optimization Remark Emitter
1068; GCN-O2-NEXT:        Stack Frame Layout Analysis
1069; GCN-O2-NEXT:        Function register usage analysis
1070; GCN-O2-NEXT:        AMDGPU Assembly Printer
1071; GCN-O2-NEXT:        Free MachineFunction
1072
1073; GCN-O3:Target Library Information
1074; GCN-O3-NEXT:Target Pass Configuration
1075; GCN-O3-NEXT:Machine Module Information
1076; GCN-O3-NEXT:Target Transform Information
1077; GCN-O3-NEXT:Assumption Cache Tracker
1078; GCN-O3-NEXT:Profile summary info
1079; GCN-O3-NEXT:AMDGPU Address space based Alias Analysis
1080; GCN-O3-NEXT:External Alias Analysis
1081; GCN-O3-NEXT:Type-Based Alias Analysis
1082; GCN-O3-NEXT:Scoped NoAlias Alias Analysis
1083; GCN-O3-NEXT:Argument Register Usage Information Storage
1084; GCN-O3-NEXT:Create Garbage Collector Module Metadata
1085; GCN-O3-NEXT:Machine Branch Probability Analysis
1086; GCN-O3-NEXT:Register Usage Information Storage
1087; GCN-O3-NEXT:Default Regalloc Eviction Advisor
1088; GCN-O3-NEXT:Default Regalloc Priority Advisor
1089; GCN-O3-NEXT:  ModulePass Manager
1090; GCN-O3-NEXT:    Pre-ISel Intrinsic Lowering
1091; GCN-O3-NEXT:    FunctionPass Manager
1092; GCN-O3-NEXT:      Expand large div/rem
1093; GCN-O3-NEXT:      Expand large fp convert
1094; GCN-O3-NEXT:    AMDGPU Remove Incompatible Functions
1095; GCN-O3-NEXT:    AMDGPU Printf lowering
1096; GCN-O3-NEXT:    Lower ctors and dtors for AMDGPU
1097; GCN-O3-NEXT:    FunctionPass Manager
1098; GCN-O3-NEXT:      AMDGPU Image Intrinsic Optimizer
1099; GCN-O3-NEXT:    Expand variadic functions
1100; GCN-O3-NEXT:    AMDGPU Inline All Functions
1101; GCN-O3-NEXT:    Inliner for always_inline functions
1102; GCN-O3-NEXT:      FunctionPass Manager
1103; GCN-O3-NEXT:        Dominator Tree Construction
1104; GCN-O3-NEXT:        Basic Alias Analysis (stateless AA impl)
1105; GCN-O3-NEXT:        Function Alias Analysis Results
1106; GCN-O3-NEXT:    Lower OpenCL enqueued blocks
1107; GCN-O3-NEXT:    AMDGPU Software lowering of LDS
1108; GCN-O3-NEXT:    Lower uses of LDS variables from non-kernel functions
1109; GCN-O3-NEXT:    FunctionPass Manager
1110; GCN-O3-NEXT:      Infer address spaces
1111; GCN-O3-NEXT:      Dominator Tree Construction
1112; GCN-O3-NEXT:      Cycle Info Analysis
1113; GCN-O3-NEXT:      Uniformity Analysis
1114; GCN-O3-NEXT:      AMDGPU atomic optimizations
1115; GCN-O3-NEXT:      Expand Atomic instructions
1116; GCN-O3-NEXT:      Dominator Tree Construction
1117; GCN-O3-NEXT:      Natural Loop Information
1118; GCN-O3-NEXT:      AMDGPU Promote Alloca
1119; GCN-O3-NEXT:      Split GEPs to a variadic base and a constant offset for better CSE
1120; GCN-O3-NEXT:      Scalar Evolution Analysis
1121; GCN-O3-NEXT:      Straight line strength reduction
1122; GCN-O3-NEXT:      Basic Alias Analysis (stateless AA impl)
1123; GCN-O3-NEXT:      Function Alias Analysis Results
1124; GCN-O3-NEXT:      Memory Dependence Analysis
1125; GCN-O3-NEXT:      Lazy Branch Probability Analysis
1126; GCN-O3-NEXT:      Lazy Block Frequency Analysis
1127; GCN-O3-NEXT:      Optimization Remark Emitter
1128; GCN-O3-NEXT:      Global Value Numbering
1129; GCN-O3-NEXT:      Scalar Evolution Analysis
1130; GCN-O3-NEXT:      Nary reassociation
1131; GCN-O3-NEXT:      Early CSE
1132; GCN-O3-NEXT:      Cycle Info Analysis
1133; GCN-O3-NEXT:      Uniformity Analysis
1134; GCN-O3-NEXT:      AMDGPU IR optimizations
1135; GCN-O3-NEXT:      Basic Alias Analysis (stateless AA impl)
1136; GCN-O3-NEXT:      Function Alias Analysis Results
1137; GCN-O3-NEXT:      Memory SSA
1138; GCN-O3-NEXT:      Canonicalize natural loops
1139; GCN-O3-NEXT:      LCSSA Verifier
1140; GCN-O3-NEXT:      Loop-Closed SSA Form Pass
1141; GCN-O3-NEXT:      Scalar Evolution Analysis
1142; GCN-O3-NEXT:      Lazy Branch Probability Analysis
1143; GCN-O3-NEXT:      Lazy Block Frequency Analysis
1144; GCN-O3-NEXT:      Loop Pass Manager
1145; GCN-O3-NEXT:        Loop Invariant Code Motion
1146; GCN-O3-NEXT:      Loop Pass Manager
1147; GCN-O3-NEXT:        Canonicalize Freeze Instructions in Loops
1148; GCN-O3-NEXT:        Induction Variable Users
1149; GCN-O3-NEXT:        Loop Strength Reduction
1150; GCN-O3-NEXT:      Basic Alias Analysis (stateless AA impl)
1151; GCN-O3-NEXT:      Function Alias Analysis Results
1152; GCN-O3-NEXT:      Merge contiguous icmps into a memcmp
1153; GCN-O3-NEXT:      Natural Loop Information
1154; GCN-O3-NEXT:      Lazy Branch Probability Analysis
1155; GCN-O3-NEXT:      Lazy Block Frequency Analysis
1156; GCN-O3-NEXT:      Expand memcmp() to load/stores
1157; GCN-O3-NEXT:      Remove unreachable blocks from the CFG
1158; GCN-O3-NEXT:      Natural Loop Information
1159; GCN-O3-NEXT:      Post-Dominator Tree Construction
1160; GCN-O3-NEXT:      Branch Probability Analysis
1161; GCN-O3-NEXT:      Block Frequency Analysis
1162; GCN-O3-NEXT:      Constant Hoisting
1163; GCN-O3-NEXT:      Replace intrinsics with calls to vector library
1164; GCN-O3-NEXT:      Lazy Branch Probability Analysis
1165; GCN-O3-NEXT:      Lazy Block Frequency Analysis
1166; GCN-O3-NEXT:      Optimization Remark Emitter
1167; GCN-O3-NEXT:      Partially inline calls to library functions
1168; GCN-O3-NEXT:      Instrument function entry/exit with calls to e.g. mcount() (post inlining)
1169; GCN-O3-NEXT:      Scalarize Masked Memory Intrinsics
1170; GCN-O3-NEXT:      Expand reduction intrinsics
1171; GCN-O3-NEXT:      Natural Loop Information
1172; GCN-O3-NEXT:      Basic Alias Analysis (stateless AA impl)
1173; GCN-O3-NEXT:      Function Alias Analysis Results
1174; GCN-O3-NEXT:      Memory Dependence Analysis
1175; GCN-O3-NEXT:      Lazy Branch Probability Analysis
1176; GCN-O3-NEXT:      Lazy Block Frequency Analysis
1177; GCN-O3-NEXT:      Optimization Remark Emitter
1178; GCN-O3-NEXT:      Global Value Numbering
1179; GCN-O3-NEXT:    CallGraph Construction
1180; GCN-O3-NEXT:    Call Graph SCC Pass Manager
1181; GCN-O3-NEXT:      AMDGPU Annotate Kernel Features
1182; GCN-O3-NEXT:      FunctionPass Manager
1183; GCN-O3-NEXT:        AMDGPU Lower Kernel Arguments
1184; GCN-O3-NEXT:    Lower buffer fat pointer operations to buffer resources
1185; GCN-O3-NEXT:    CallGraph Construction
1186; GCN-O3-NEXT:    Call Graph SCC Pass Manager
1187; GCN-O3-NEXT:      DummyCGSCCPass
1188; GCN-O3-NEXT:      FunctionPass Manager
1189; GCN-O3-NEXT:        Dominator Tree Construction
1190; GCN-O3-NEXT:        Natural Loop Information
1191; GCN-O3-NEXT:        CodeGen Prepare
1192; GCN-O3-NEXT:        Dominator Tree Construction
1193; GCN-O3-NEXT:        Basic Alias Analysis (stateless AA impl)
1194; GCN-O3-NEXT:        Function Alias Analysis Results
1195; GCN-O3-NEXT:        Natural Loop Information
1196; GCN-O3-NEXT:        Scalar Evolution Analysis
1197; GCN-O3-NEXT:        GPU Load and Store Vectorizer
1198; GCN-O3-NEXT:        Lazy Value Information Analysis
1199; GCN-O3-NEXT:        Lower SwitchInst's to branches
1200; GCN-O3-NEXT:        Lower invoke and unwind, for unwindless code generators
1201; GCN-O3-NEXT:        Remove unreachable blocks from the CFG
1202; GCN-O3-NEXT:        Dominator Tree Construction
1203; GCN-O3-NEXT:        Basic Alias Analysis (stateless AA impl)
1204; GCN-O3-NEXT:        Function Alias Analysis Results
1205; GCN-O3-NEXT:        Flatten the CFG
1206; GCN-O3-NEXT:        Dominator Tree Construction
1207; GCN-O3-NEXT:        Basic Alias Analysis (stateless AA impl)
1208; GCN-O3-NEXT:        Function Alias Analysis Results
1209; GCN-O3-NEXT:        Natural Loop Information
1210; GCN-O3-NEXT:        Code sinking
1211; GCN-O3-NEXT:        Cycle Info Analysis
1212; GCN-O3-NEXT:        Uniformity Analysis
1213; GCN-O3-NEXT:        AMDGPU IR late optimizations
1214; GCN-O3-NEXT:        Post-Dominator Tree Construction
1215; GCN-O3-NEXT:        Unify divergent function exit nodes
1216; GCN-O3-NEXT:        Dominator Tree Construction
1217; GCN-O3-NEXT:        Cycle Info Analysis
1218; GCN-O3-NEXT:        Convert irreducible control-flow into natural loops
1219; GCN-O3-NEXT:        Natural Loop Information
1220; GCN-O3-NEXT:        Fixup each natural loop to have a single exit block
1221; GCN-O3-NEXT:        Post-Dominator Tree Construction
1222; GCN-O3-NEXT:        Dominance Frontier Construction
1223; GCN-O3-NEXT:        Detect single entry single exit regions
1224; GCN-O3-NEXT:        Region Pass Manager
1225; GCN-O3-NEXT:          Structurize control flow
1226; GCN-O3-NEXT:        Cycle Info Analysis
1227; GCN-O3-NEXT:        Uniformity Analysis
1228; GCN-O3-NEXT:        Basic Alias Analysis (stateless AA impl)
1229; GCN-O3-NEXT:        Function Alias Analysis Results
1230; GCN-O3-NEXT:        Memory SSA
1231; GCN-O3-NEXT:        AMDGPU Annotate Uniform Values
1232; GCN-O3-NEXT:        Natural Loop Information
1233; GCN-O3-NEXT:        SI annotate control flow
1234; GCN-O3-NEXT:        Cycle Info Analysis
1235; GCN-O3-NEXT:        Uniformity Analysis
1236; GCN-O3-NEXT:        AMDGPU Rewrite Undef for PHI
1237; GCN-O3-NEXT:        LCSSA Verifier
1238; GCN-O3-NEXT:        Loop-Closed SSA Form Pass
1239; GCN-O3-NEXT:      Analysis if a function is memory bound
1240; GCN-O3-NEXT:      DummyCGSCCPass
1241; GCN-O3-NEXT:      FunctionPass Manager
1242; GCN-O3-NEXT:        Dominator Tree Construction
1243; GCN-O3-NEXT:        Basic Alias Analysis (stateless AA impl)
1244; GCN-O3-NEXT:        Function Alias Analysis Results
1245; GCN-O3-NEXT:        ObjC ARC contraction
1246; GCN-O3-NEXT:        Prepare callbr
1247; GCN-O3-NEXT:        Safe Stack instrumentation pass
1248; GCN-O3-NEXT:        Insert stack protectors
1249; GCN-O3-NEXT:        Cycle Info Analysis
1250; GCN-O3-NEXT:        Uniformity Analysis
1251; GCN-O3-NEXT:        Basic Alias Analysis (stateless AA impl)
1252; GCN-O3-NEXT:        Function Alias Analysis Results
1253; GCN-O3-NEXT:        Natural Loop Information
1254; GCN-O3-NEXT:        Post-Dominator Tree Construction
1255; GCN-O3-NEXT:        Branch Probability Analysis
1256; GCN-O3-NEXT:        Assignment Tracking Analysis
1257; GCN-O3-NEXT:        Lazy Branch Probability Analysis
1258; GCN-O3-NEXT:        Lazy Block Frequency Analysis
1259; GCN-O3-NEXT:        AMDGPU DAG->DAG Pattern Instruction Selection
1260; GCN-O3-NEXT:        MachineDominator Tree Construction
1261; GCN-O3-NEXT:        SI Fix SGPR copies
1262; GCN-O3-NEXT:        MachinePostDominator Tree Construction
1263; GCN-O3-NEXT:        SI Lower i1 Copies
1264; GCN-O3-NEXT:        Finalize ISel and expand pseudo-instructions
1265; GCN-O3-NEXT:        Lazy Machine Block Frequency Analysis
1266; GCN-O3-NEXT:        Early Tail Duplication
1267; GCN-O3-NEXT:        Optimize machine instruction PHIs
1268; GCN-O3-NEXT:        Slot index numbering
1269; GCN-O3-NEXT:        Merge disjoint stack slots
1270; GCN-O3-NEXT:        Local Stack Slot Allocation
1271; GCN-O3-NEXT:        Remove dead machine instructions
1272; GCN-O3-NEXT:        MachineDominator Tree Construction
1273; GCN-O3-NEXT:        Machine Natural Loop Construction
1274; GCN-O3-NEXT:        Machine Block Frequency Analysis
1275; GCN-O3-NEXT:        Early Machine Loop Invariant Code Motion
1276; GCN-O3-NEXT:        MachineDominator Tree Construction
1277; GCN-O3-NEXT:        Machine Block Frequency Analysis
1278; GCN-O3-NEXT:        Machine Common Subexpression Elimination
1279; GCN-O3-NEXT:        MachinePostDominator Tree Construction
1280; GCN-O3-NEXT:        Machine Cycle Info Analysis
1281; GCN-O3-NEXT:        Machine code sinking
1282; GCN-O3-NEXT:        Peephole Optimizations
1283; GCN-O3-NEXT:        Remove dead machine instructions
1284; GCN-O3-NEXT:        SI Fold Operands
1285; GCN-O3-NEXT:        GCN DPP Combine
1286; GCN-O3-NEXT:        SI Load Store Optimizer
1287; GCN-O3-NEXT:        SI Peephole SDWA
1288; GCN-O3-NEXT:        Machine Block Frequency Analysis
1289; GCN-O3-NEXT:        MachineDominator Tree Construction
1290; GCN-O3-NEXT:        Early Machine Loop Invariant Code Motion
1291; GCN-O3-NEXT:        MachineDominator Tree Construction
1292; GCN-O3-NEXT:        Machine Block Frequency Analysis
1293; GCN-O3-NEXT:        Machine Common Subexpression Elimination
1294; GCN-O3-NEXT:        SI Fold Operands
1295; GCN-O3-NEXT:        Remove dead machine instructions
1296; GCN-O3-NEXT:        SI Shrink Instructions
1297; GCN-O3-NEXT:        Register Usage Information Propagation
1298; GCN-O3-NEXT:        Detect Dead Lanes
1299; GCN-O3-NEXT:        Remove dead machine instructions
1300; GCN-O3-NEXT:        Init Undef Pass
1301; GCN-O3-NEXT:        Process Implicit Definitions
1302; GCN-O3-NEXT:        Remove unreachable machine basic blocks
1303; GCN-O3-NEXT:        Live Variable Analysis
1304; GCN-O3-NEXT:        SI Optimize VGPR LiveRange
1305; GCN-O3-NEXT:        Eliminate PHI nodes for register allocation
1306; GCN-O3-NEXT:        SI Lower control flow pseudo instructions
1307; GCN-O3-NEXT:        Two-Address instruction pass
1308; GCN-O3-NEXT:        Slot index numbering
1309; GCN-O3-NEXT:        Live Interval Analysis
1310; GCN-O3-NEXT:        Machine Natural Loop Construction
1311; GCN-O3-NEXT:        Register Coalescer
1312; GCN-O3-NEXT:        Rename Disconnected Subregister Components
1313; GCN-O3-NEXT:        Rewrite Partial Register Uses
1314; GCN-O3-NEXT:        Machine Instruction Scheduler
1315; GCN-O3-NEXT:        AMDGPU Pre-RA optimizations
1316; GCN-O3-NEXT:        SI Whole Quad Mode
1317; GCN-O3-NEXT:        SI optimize exec mask operations pre-RA
1318; GCN-O3-NEXT:        SI Form memory clauses
1319; GCN-O3-NEXT:        AMDGPU Pre-RA Long Branch Reg
1320; GCN-O3-NEXT:        Machine Natural Loop Construction
1321; GCN-O3-NEXT:        Machine Block Frequency Analysis
1322; GCN-O3-NEXT:        Debug Variable Analysis
1323; GCN-O3-NEXT:        Live Stack Slot Analysis
1324; GCN-O3-NEXT:        Virtual Register Map
1325; GCN-O3-NEXT:        Live Register Matrix
1326; GCN-O3-NEXT:        Bundle Machine CFG Edges
1327; GCN-O3-NEXT:        Spill Code Placement Analysis
1328; GCN-O3-NEXT:        Lazy Machine Block Frequency Analysis
1329; GCN-O3-NEXT:        Machine Optimization Remark Emitter
1330; GCN-O3-NEXT:        Greedy Register Allocator
1331; GCN-O3-NEXT:        Virtual Register Rewriter
1332; GCN-O3-NEXT:        Stack Slot Coloring
1333; GCN-O3-NEXT:        SI lower SGPR spill instructions
1334; GCN-O3-NEXT:        Virtual Register Map
1335; GCN-O3-NEXT:        Live Register Matrix
1336; GCN-O3-NEXT:        SI Pre-allocate WWM Registers
1337; GCN-O3-NEXT:        Live Stack Slot Analysis
1338; GCN-O3-NEXT:        Greedy Register Allocator
1339; GCN-O3-NEXT:        SI Lower WWM Copies
1340; GCN-O3-NEXT:        Virtual Register Rewriter
1341; GCN-O3-NEXT:        AMDGPU Reserve WWM Registers
1342; GCN-O3-NEXT:        Virtual Register Map
1343; GCN-O3-NEXT:        Live Register Matrix
1344; GCN-O3-NEXT:        Greedy Register Allocator
1345; GCN-O3-NEXT:        GCN NSA Reassign
1346; GCN-O3-NEXT:        Virtual Register Rewriter
1347; GCN-O3-NEXT:        AMDGPU Mark Last Scratch Load
1348; GCN-O3-NEXT:        Stack Slot Coloring
1349; GCN-O3-NEXT:        Machine Copy Propagation Pass
1350; GCN-O3-NEXT:        Machine Loop Invariant Code Motion
1351; GCN-O3-NEXT:        SI Fix VGPR copies
1352; GCN-O3-NEXT:        SI optimize exec mask operations
1353; GCN-O3-NEXT:        Remove Redundant DEBUG_VALUE analysis
1354; GCN-O3-NEXT:        Fixup Statepoint Caller Saved
1355; GCN-O3-NEXT:        PostRA Machine Sink
1356; GCN-O3-NEXT:        Machine Block Frequency Analysis
1357; GCN-O3-NEXT:        MachineDominator Tree Construction
1358; GCN-O3-NEXT:        MachinePostDominator Tree Construction
1359; GCN-O3-NEXT:        Lazy Machine Block Frequency Analysis
1360; GCN-O3-NEXT:        Machine Optimization Remark Emitter
1361; GCN-O3-NEXT:        Shrink Wrapping analysis
1362; GCN-O3-NEXT:        Prologue/Epilogue Insertion & Frame Finalization
1363; GCN-O3-NEXT:        Machine Late Instructions Cleanup Pass
1364; GCN-O3-NEXT:        Control Flow Optimizer
1365; GCN-O3-NEXT:        Lazy Machine Block Frequency Analysis
1366; GCN-O3-NEXT:        Tail Duplication
1367; GCN-O3-NEXT:        Machine Copy Propagation Pass
1368; GCN-O3-NEXT:        Post-RA pseudo instruction expansion pass
1369; GCN-O3-NEXT:        SI Shrink Instructions
1370; GCN-O3-NEXT:        SI post-RA bundler
1371; GCN-O3-NEXT:        MachineDominator Tree Construction
1372; GCN-O3-NEXT:        Machine Natural Loop Construction
1373; GCN-O3-NEXT:        PostRA Machine Instruction Scheduler
1374; GCN-O3-NEXT:        Machine Block Frequency Analysis
1375; GCN-O3-NEXT:        MachinePostDominator Tree Construction
1376; GCN-O3-NEXT:        Branch Probability Basic Block Placement
1377; GCN-O3-NEXT:        Insert fentry calls
1378; GCN-O3-NEXT:        Insert XRay ops
1379; GCN-O3-NEXT:        GCN Create VOPD Instructions
1380; GCN-O3-NEXT:        SI Memory Legalizer
1381; GCN-O3-NEXT:        MachineDominator Tree Construction
1382; GCN-O3-NEXT:        Machine Natural Loop Construction
1383; GCN-O3-NEXT:        MachinePostDominator Tree Construction
1384; GCN-O3-NEXT:        SI insert wait instructions
1385; GCN-O3-NEXT:        Insert required mode register values
1386; GCN-O3-NEXT:        SI Insert Hard Clauses
1387; GCN-O3-NEXT:        SI Final Branch Preparation
1388; GCN-O3-NEXT:        SI peephole optimizations
1389; GCN-O3-NEXT:        Post RA hazard recognizer
1390; GCN-O3-NEXT:        AMDGPU Insert Delay ALU
1391; GCN-O3-NEXT:        Branch relaxation pass
1392; GCN-O3-NEXT:        AMDGPU Preload Kernel Arguments Prolog
1393; GCN-O3-NEXT:        Register Usage Information Collector Pass
1394; GCN-O3-NEXT:        Remove Loads Into Fake Uses
1395; GCN-O3-NEXT:        Live DEBUG_VALUE analysis
1396; GCN-O3-NEXT:        Machine Sanitizer Binary Metadata
1397; GCN-O3-NEXT:        Lazy Machine Block Frequency Analysis
1398; GCN-O3-NEXT:        Machine Optimization Remark Emitter
1399; GCN-O3-NEXT:        Stack Frame Layout Analysis
1400; GCN-O3-NEXT:        Function register usage analysis
1401; GCN-O3-NEXT:        AMDGPU Assembly Printer
1402; GCN-O3-NEXT:        Free MachineFunction
1403
1404define void @empty() {
1405  ret void
1406}
1407