1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 2 2; RUN: llc -mtriple=r600 -mcpu=redwood < %s | FileCheck --check-prefix=EG %s 3; RUN: llc -mtriple=r600 -mcpu=cayman < %s | FileCheck --check-prefix=CM %s 4 5define amdgpu_ps void @test(<4 x float> inreg %reg0) { 6; EG-LABEL: test: 7; EG: ; %bb.0: 8; EG-NEXT: ALU 8, @4, KC0[], KC1[] 9; EG-NEXT: EXPORT T0.X___ 10; EG-NEXT: CF_END 11; EG-NEXT: PAD 12; EG-NEXT: ALU clause starting at 4: 13; EG-NEXT: SETGT * T0.W, literal.x, -|T0.X|, 14; EG-NEXT: -1023672320(-1.260000e+02), 0(0.000000e+00) 15; EG-NEXT: CNDE * T1.W, PV.W, 0.0, literal.x, 16; EG-NEXT: 1115684864(6.400000e+01), 0(0.000000e+00) 17; EG-NEXT: ADD T1.W, -|T0.X|, PV.W, 18; EG-NEXT: CNDE * T0.W, T0.W, 1.0, literal.x, 19; EG-NEXT: 528482304(5.421011e-20), 0(0.000000e+00) 20; EG-NEXT: EXP_IEEE * T0.X, PV.W, 21; EG-NEXT: MUL_IEEE * T0.X, PS, T0.W, 22; 23; CM-LABEL: test: 24; CM: ; %bb.0: 25; CM-NEXT: ALU 11, @4, KC0[], KC1[] 26; CM-NEXT: EXPORT T0.X___ 27; CM-NEXT: CF_END 28; CM-NEXT: PAD 29; CM-NEXT: ALU clause starting at 4: 30; CM-NEXT: SETGT * T0.W, literal.x, -|T0.X|, 31; CM-NEXT: -1023672320(-1.260000e+02), 0(0.000000e+00) 32; CM-NEXT: CNDE * T1.W, PV.W, 0.0, literal.x, 33; CM-NEXT: 1115684864(6.400000e+01), 0(0.000000e+00) 34; CM-NEXT: CNDE T0.Z, T0.W, 1.0, literal.x, 35; CM-NEXT: ADD * T0.W, -|T0.X|, PV.W, 36; CM-NEXT: 528482304(5.421011e-20), 0(0.000000e+00) 37; CM-NEXT: EXP_IEEE T0.X, T0.W, 38; CM-NEXT: EXP_IEEE T0.Y (MASKED), T0.W, 39; CM-NEXT: EXP_IEEE T0.Z (MASKED), T0.W, 40; CM-NEXT: EXP_IEEE * T0.W (MASKED), T0.W, 41; CM-NEXT: MUL_IEEE * T0.X, PV.X, T0.Z, 42 %r0 = extractelement <4 x float> %reg0, i32 0 43 %r1 = call float @llvm.fabs.f32(float %r0) 44 %r2 = fsub float -0.000000e+00, %r1 45 %r3 = call afn float @llvm.exp2.f32(float %r2) 46 %vec = insertelement <4 x float> undef, float %r3, i32 0 47 call void @llvm.r600.store.swizzle(<4 x float> %vec, i32 0, i32 0) 48 ret void 49} 50 51declare float @llvm.exp2.f32(float) readnone 52declare float @llvm.fabs.f32(float) readnone 53declare void @llvm.r600.store.swizzle(<4 x float>, i32, i32) 54