xref: /llvm-project/llvm/test/CodeGen/AMDGPU/inline-constraints.ll (revision e963d0740e64fc70b4018f39325469d204f6217a)
1; RUN: not llc < %s -mtriple=amdgcn -mcpu=bonaire -verify-machineinstrs | FileCheck --check-prefix=GCN %s
2; RUN: not llc < %s -mtriple=amdgcn -mcpu=tonga -verify-machineinstrs | FileCheck --check-prefix=GCN --check-prefix=VI %s
3
4; RUN: not llc < %s -mtriple=amdgcn -mcpu=bonaire -verify-machineinstrs 2>&1 | FileCheck --check-prefix=NOGCN --check-prefix=NOSI %s
5; RUN: not llc < %s -mtriple=amdgcn -mcpu=tonga -verify-machineinstrs 2>&1 | FileCheck --check-prefix=NOGCN %s
6
7; GCN-LABEL: {{^}}inline_reg_constraints:
8; GCN: flat_load_dword v{{[0-9]+}}, v[{{[0-9]+:[0-9]+}}]
9; GCN: flat_load_dwordx2 v[{{[0-9]+:[0-9]+}}], v[{{[0-9]+:[0-9]+}}]
10; GCN: flat_load_dwordx2 v[{{[0-9]+:[0-9]+}}], v[{{[0-9]+:[0-9]+}}]
11; GCN: flat_load_dwordx4 v[{{[0-9]+:[0-9]+}}], v[{{[0-9]+:[0-9]+}}]
12; GCN: flat_load_dwordx4 v[{{[0-9]+:[0-9]+}}], v[{{[0-9]+:[0-9]+}}]
13; GCN: s_load_dword s{{[0-9]+}}, s[{{[0-9]+:[0-9]+}}]
14; GCN: s_load_dwordx2 s[{{[0-9]+:[0-9]+}}], s[{{[0-9]+:[0-9]+}}]
15; GCN: s_load_dwordx2 s[{{[0-9]+:[0-9]+}}], s[{{[0-9]+:[0-9]+}}]
16; GCN: s_load_dwordx4 s[{{[0-9]+:[0-9]+}}], s[{{[0-9]+:[0-9]+}}]
17; GCN: s_load_dwordx4 s[{{[0-9]+:[0-9]+}}], s[{{[0-9]+:[0-9]+}}]
18; GCN: s_load_dwordx8 s[{{[0-9]+:[0-9]+}}], s[{{[0-9]+:[0-9]+}}]
19
20define amdgpu_kernel void @inline_reg_constraints(ptr addrspace(1) %ptr) {
21entry:
22  %v32 = tail call i32 asm sideeffect "flat_load_dword   $0, $1", "=v,v"(ptr addrspace(1) %ptr)
23  %v2_32 = tail call <2 x i32> asm sideeffect "flat_load_dwordx2 $0, $1", "=v,v"(ptr addrspace(1) %ptr)
24  %v64 =   tail call i64 asm sideeffect "flat_load_dwordx2 $0, $1", "=v,v"(ptr addrspace(1) %ptr)
25  %v4_32 = tail call <4 x i32> asm sideeffect "flat_load_dwordx4 $0, $1", "=v,v"(ptr addrspace(1) %ptr)
26  %v128 =  tail call i128 asm sideeffect "flat_load_dwordx4 $0, $1", "=v,v"(ptr addrspace(1) %ptr)
27  %s32 =   tail call i32 asm sideeffect "s_load_dword $0, $1", "=s,s"(ptr addrspace(1) %ptr)
28  %s32_2 = tail call <2 x i32> asm sideeffect "s_load_dwordx2 $0, $1", "=s,s"(ptr addrspace(1) %ptr)
29  %s64 =   tail call i64 asm sideeffect "s_load_dwordx2 $0, $1", "=s,s"(ptr addrspace(1) %ptr)
30  %s4_32 =  tail call <4 x i32> asm sideeffect "s_load_dwordx4 $0, $1", "=s,s"(ptr addrspace(1) %ptr)
31  %s128 =  tail call i128 asm sideeffect "s_load_dwordx4 $0, $1", "=s,s"(ptr addrspace(1) %ptr)
32  %s256 =  tail call <8 x i32> asm sideeffect "s_load_dwordx8 $0, $1", "=s,s"(ptr addrspace(1) %ptr)
33  ret void
34}
35
36; GCN-LABEL: {{^}}inline_sreg_constraint_m0:
37; GCN: s_mov_b32 m0, -1
38; GCN-NOT: m0
39; GCN: ; use m0
40define amdgpu_kernel void @inline_sreg_constraint_m0() {
41  %m0 = tail call i32 asm sideeffect "s_mov_b32 m0, -1", "={m0}"()
42  tail call void asm sideeffect "; use $0", "s"(i32 %m0)
43  ret void
44}
45
46; GCN-LABEL: {{^}}inline_sreg_constraint_imm_i32:
47; GCN: s_mov_b32 [[REG:s[0-9]+]], 32
48; GCN: ; use [[REG]]
49define amdgpu_kernel void @inline_sreg_constraint_imm_i32() {
50  tail call void asm sideeffect "; use $0", "s"(i32 32)
51  ret void
52}
53
54; GCN-LABEL: {{^}}inline_sreg_constraint_imm_f32:
55; GCN: s_mov_b32 [[REG:s[0-9]+]], 1.0
56; GCN: ; use [[REG]]
57define amdgpu_kernel void @inline_sreg_constraint_imm_f32() {
58  tail call void asm sideeffect "; use $0", "s"(float 1.0)
59  ret void
60}
61
62; GCN-LABEL: {{^}}inline_sreg_constraint_imm_i64:
63; GCN: s_mov_b64 [[REG:s\[[0-9:]+\]]], -4{{$}}
64; GCN: ; use [[REG]]
65define amdgpu_kernel void @inline_sreg_constraint_imm_i64() {
66  tail call void asm sideeffect "; use $0", "s"(i64 -4)
67  ret void
68}
69
70; GCN-LABEL: {{^}}inline_sreg_constraint_imm_f64:
71; GCN: s_mov_b64 [[REG:s\[[0-9:]+\]]], 1.0{{$}}
72; GCN: ; use [[REG]]
73define amdgpu_kernel void @inline_sreg_constraint_imm_f64() {
74  tail call void asm sideeffect "; use $0", "s"(double 1.0)
75  ret void
76}
77
78;==============================================================================
79; 'A' constraint, 16-bit operand
80;==============================================================================
81
82; NOSI: error: invalid operand for inline asm constraint 'A'
83; VI-LABEL: {{^}}inline_A_constraint_H0:
84; VI: v_mov_b32 {{v[0-9]+}}, 64
85define i32 @inline_A_constraint_H0() {
86  %v0 = tail call i32 asm "v_mov_b32 $0, $1", "=v,A"(i16 64)
87  ret i32 %v0
88}
89
90; NOSI: error: invalid operand for inline asm constraint 'A'
91; VI-LABEL: {{^}}inline_A_constraint_H1:
92; VI: v_mov_b32 {{v[0-9]+}}, -16
93define i32 @inline_A_constraint_H1() {
94  %v0 = tail call i32 asm "v_mov_b32 $0, $1", "=v,A"(i16 -16)
95  ret i32 %v0
96}
97
98; NOSI: error: invalid operand for inline asm constraint 'A'
99; VI-LABEL: {{^}}inline_A_constraint_H2:
100define i32 @inline_A_constraint_H2() {
101  %v0 = tail call i32 asm "v_mov_b32 $0, $1", "=v,A"(i16 bitcast (half 1.0 to i16))
102  ret i32 %v0
103}
104
105; NOSI: error: invalid operand for inline asm constraint 'A'
106; VI-LABEL: {{^}}inline_A_constraint_H3:
107define i32 @inline_A_constraint_H3() {
108  %v0 = tail call i32 asm "v_mov_b32 $0, $1", "=v,A"(i16 bitcast (half -1.0 to i16))
109  ret i32 %v0
110}
111
112; NOSI: error: invalid operand for inline asm constraint 'A'
113; VI-LABEL: {{^}}inline_A_constraint_H4:
114define i32 @inline_A_constraint_H4() {
115  %v0 = tail call i32 asm "v_mov_b32 $0, $1", "=v,A"(half 0xH3118)
116  ret i32 %v0
117}
118
119; NOSI: error: invalid operand for inline asm constraint 'A'
120; VI-LABEL: {{^}}inline_A_constraint_H5:
121define i32 @inline_A_constraint_H5() {
122  %v0 = tail call i32 asm "v_mov_b32 $0, $1", "=v,A"(i16 bitcast (half 0xH3118 to i16))
123  ret i32 %v0
124}
125
126; NOSI: error: invalid operand for inline asm constraint 'A'
127; VI-LABEL: {{^}}inline_A_constraint_H6:
128define i32 @inline_A_constraint_H6() {
129  %v0 = tail call i32 asm "v_mov_b32 $0, $1", "=v,A"(half -0.5)
130  ret i32 %v0
131}
132
133; NOGCN: error: invalid operand for inline asm constraint 'A'
134define i32 @inline_A_constraint_H7() {
135  %v0 = tail call i32 asm "v_mov_b32 $0, $1", "=v,A"(i16 bitcast (half 0xH3119 to i16))
136  ret i32 %v0
137}
138
139; NOGCN: error: invalid operand for inline asm constraint 'A'
140define i32 @inline_A_constraint_H8() {
141  %v0 = tail call i32 asm "v_mov_b32 $0, $1", "=v,A"(i16 bitcast (half 0xH3117 to i16))
142  ret i32 %v0
143}
144
145; NOGCN: error: invalid operand for inline asm constraint 'A'
146define i32 @inline_A_constraint_H9() {
147  %v0 = tail call i32 asm "v_mov_b32 $0, $1", "=v,A"(i16 65)
148  ret i32 %v0
149}
150
151;==============================================================================
152; 'A' constraint, 32-bit operand
153;==============================================================================
154
155; GCN-LABEL: {{^}}inline_A_constraint_F0:
156; GCN: v_mov_b32 {{v[0-9]+}}, -16
157define i32 @inline_A_constraint_F0() {
158  %v0 = tail call i32 asm "v_mov_b32 $0, $1", "=v,A"(i32 -16)
159  ret i32 %v0
160}
161
162; GCN-LABEL: {{^}}inline_A_constraint_F1:
163; GCN: v_mov_b32 {{v[0-9]+}}, 1
164define i32 @inline_A_constraint_F1() {
165  %v0 = tail call i32 asm "v_mov_b32 $0, $1", "=v,A"(i32 1)
166  ret i32 %v0
167}
168
169; GCN-LABEL: {{^}}inline_A_constraint_F2:
170; GCN: v_mov_b32 {{v[0-9]+}}, 0xbf000000
171define i32 @inline_A_constraint_F2() {
172  %v0 = tail call i32 asm "v_mov_b32 $0, $1", "=v,A"(i32 bitcast (float -0.5 to i32))
173  ret i32 %v0
174}
175
176; GCN-LABEL: {{^}}inline_A_constraint_F3:
177; GCN: v_mov_b32 {{v[0-9]+}}, 0x40000000
178define i32 @inline_A_constraint_F3() {
179  %v0 = tail call i32 asm "v_mov_b32 $0, $1", "=v,A"(i32 bitcast (float 2.0 to i32))
180  ret i32 %v0
181}
182
183; GCN-LABEL: {{^}}inline_A_constraint_F4:
184; GCN: v_mov_b32 {{v[0-9]+}}, 0xc0800000
185define i32 @inline_A_constraint_F4() {
186  %v0 = tail call i32 asm "v_mov_b32 $0, $1", "=v,A"(float -4.0)
187  ret i32 %v0
188}
189
190; NOSI: error: invalid operand for inline asm constraint 'A'
191; VI-LABEL: {{^}}inline_A_constraint_F5:
192; VI: v_mov_b32 {{v[0-9]+}}, 0x3e22f983
193define i32 @inline_A_constraint_F5() {
194  %v0 = tail call i32 asm "v_mov_b32 $0, $1", "=v,A"(i32 1042479491)
195  ret i32 %v0
196}
197
198; GCN-LABEL: {{^}}inline_A_constraint_F6:
199; GCN: v_mov_b32 {{v[0-9]+}}, 0x3f000000
200define i32 @inline_A_constraint_F6() {
201  %v0 = tail call i32 asm "v_mov_b32 $0, $1", "=v,A"(float 0.5)
202  ret i32 %v0
203}
204
205; NOGCN: error: invalid operand for inline asm constraint 'A'
206define i32 @inline_A_constraint_F7() {
207  %v0 = tail call i32 asm "v_mov_b32 $0, $1", "=v,A"(i32 1042479490)
208  ret i32 %v0
209}
210
211; NOGCN: error: invalid operand for inline asm constraint 'A'
212define i32 @inline_A_constraint_F8() {
213  %v0 = tail call i32 asm "v_mov_b32 $0, $1", "=v,A"(i32 -17)
214  ret i32 %v0
215}
216
217;==============================================================================
218; 'A' constraint, 64-bit operand
219;==============================================================================
220
221; GCN-LABEL: {{^}}inline_A_constraint_D0:
222; GCN: v_mov_b32 {{v[0-9]+}}, -16
223define i32 @inline_A_constraint_D0() {
224  %v0 = tail call i32 asm "v_mov_b32 $0, $1", "=v,A"(i64 -16)
225  ret i32 %v0
226}
227
228; GCN-LABEL: {{^}}inline_A_constraint_D1:
229; GCN: v_cvt_f32_f64 {{v[0-9]+}}, 0xc000000000000000
230define i32 @inline_A_constraint_D1() {
231  %v0 = tail call i32 asm "v_cvt_f32_f64 $0, $1", "=v,A"(i64 bitcast (double -2.0 to i64))
232  ret i32 %v0
233}
234
235; GCN-LABEL: {{^}}inline_A_constraint_D2:
236; GCN: v_cvt_f32_f64 {{v[0-9]+}}, 0x3fe0000000000000
237define i32 @inline_A_constraint_D2() {
238  %v0 = tail call i32 asm "v_cvt_f32_f64 $0, $1", "=v,A"(double 0.5)
239  ret i32 %v0
240}
241
242; NOSI: error: invalid operand for inline asm constraint 'A'
243; VI-LABEL: {{^}}inline_A_constraint_D3:
244; VI: v_cvt_f32_f64 {{v[0-9]+}}, 0x3fc45f306dc9c882
245define i32 @inline_A_constraint_D3() {
246  %v0 = tail call i32 asm "v_cvt_f32_f64 $0, $1", "=v,A"(double 0.15915494309189532)
247  ret i32 %v0
248}
249
250; NOSI: error: invalid operand for inline asm constraint 'A'
251; VI-LABEL: {{^}}inline_A_constraint_D4:
252; VI: v_cvt_f32_f64 {{v[0-9]+}}, 0x3fc45f306dc9c882
253define i32 @inline_A_constraint_D4() {
254  %v0 = tail call i32 asm "v_cvt_f32_f64 $0, $1", "=v,A"(i64 bitcast (double 0.15915494309189532 to i64))
255  ret i32 %v0
256}
257
258; GCN-LABEL: {{^}}inline_A_constraint_D5:
259; GCN: v_cvt_f32_f64 {{v[0-9]+}}, 0xc000000000000000
260define i32 @inline_A_constraint_D5() {
261  %v0 = tail call i32 asm "v_cvt_f32_f64 $0, $1", "=v,A"(double -2.0)
262  ret i32 %v0
263}
264
265; NOGCN: error: invalid operand for inline asm constraint 'A'
266define i32 @inline_A_constraint_D8() {
267  %v0 = tail call i32 asm "v_cvt_f32_f64 $0, $1", "=v,A"(double 1.1)
268  ret i32 %v0
269}
270
271; NOGCN: error: invalid operand for inline asm constraint 'A'
272define i32 @inline_A_constraint_D9() {
273  %v0 = tail call i32 asm "v_cvt_f32_f64 $0, $1", "=v,A"(i64 bitcast (double 0.1 to i64))
274  ret i32 %v0
275}
276
277;==============================================================================
278; 'A' constraint, v2x16 operand
279;==============================================================================
280
281; NOSI: error: invalid operand for inline asm constraint 'A'
282; VI-LABEL: {{^}}inline_A_constraint_V0:
283; VI: v_mov_b32 {{v[0-9]+}}, -4
284define i32 @inline_A_constraint_V0() {
285  %v0 = tail call i32 asm "v_mov_b32 $0, $1", "=v,A"(<2 x i16> <i16 -4, i16 -4>)
286  ret i32 %v0
287}
288
289; NOSI: error: invalid operand for inline asm constraint 'A'
290; VI-LABEL: {{^}}inline_A_constraint_V1:
291define i32 @inline_A_constraint_V1() {
292  %v0 = tail call i32 asm "v_mov_b32 $0, $1", "=v,A"(<2 x half> <half -0.5, half -0.5>)
293  ret i32 %v0
294}
295
296; NOGCN: error: invalid operand for inline asm constraint 'A'
297define i32 @inline_A_constraint_V2() {
298  %v0 = tail call i32 asm "v_mov_b32 $0, $1", "=v,A"(<2 x i16> <i16 -4, i16 undef>)
299  ret i32 %v0
300}
301
302; NOGCN: error: invalid operand for inline asm constraint 'A'
303define i32 @inline_A_constraint_V3() {
304  %v0 = tail call i32 asm "v_mov_b32 $0, $1", "=v,A"(<2 x half> <half undef, half -0.5>)
305  ret i32 %v0
306}
307
308; NOGCN: error: invalid operand for inline asm constraint 'A'
309define i32 @inline_A_constraint_V4() {
310  %v0 = tail call i32 asm "v_mov_b32 $0, $1", "=v,A"(<2 x i16> <i16 1, i16 2>)
311  ret i32 %v0
312}
313
314; NOGCN: error: invalid operand for inline asm constraint 'A'
315define i32 @inline_A_constraint_V5() {
316  %v0 = tail call i32 asm "v_mov_b32 $0, $1", "=v,A"(<4 x i16> <i16 0, i16 0, i16 0, i16 0>)
317  ret i32 %v0
318}
319
320; NOGCN: error: invalid operand for inline asm constraint 'A'
321define i32 @inline_A_constraint_V6() {
322  %v0 = tail call i32 asm "v_mov_b32 $0, $1", "=v,A"(<2 x i32> <i32 0, i32 0>)
323  ret i32 %v0
324}
325
326;==============================================================================
327; 'A' constraint, type errors
328;==============================================================================
329
330; NOGCN: error: invalid operand for inline asm constraint 'A'
331define i32 @inline_A_constraint_E1(i32 %x) {
332  %v0 = tail call i32 asm "v_mov_b32 $0, $1", "=v,A"(i32 %x)
333  ret i32 %v0
334}
335
336; NOGCN: error: invalid operand for inline asm constraint 'A'
337define i32 @inline_A_constraint_E2() {
338  %v0 = tail call i32 asm "v_mov_b32 $0, $1", "=v,A"(i128 100000000000000000000)
339  ret i32 %v0
340}
341
342;==============================================================================
343; 'I' constraint, 16-bit operand
344;==============================================================================
345
346; NOSI: error: invalid operand for inline asm constraint 'I'
347; VI-LABEL: {{^}}inline_I_constraint_H0:
348; VI: v_mov_b32 {{v[0-9]+}}, 64
349define i32 @inline_I_constraint_H0() {
350  %v0 = tail call i32 asm "v_mov_b32 $0, $1", "=v,I"(i16 64)
351  ret i32 %v0
352}
353
354; NOSI: error: invalid operand for inline asm constraint 'I'
355; VI-LABEL: {{^}}inline_I_constraint_H1:
356; VI: v_mov_b32 {{v[0-9]+}}, -16
357define i32 @inline_I_constraint_H1() {
358  %v0 = tail call i32 asm "v_mov_b32 $0, $1", "=v,I"(half bitcast (i16 -16 to half))
359  ret i32 %v0
360}
361
362; NOGCN: error: invalid operand for inline asm constraint 'I'
363define i32 @inline_I_constraint_H6() {
364  %v0 = tail call i32 asm "v_mov_b32 $0, $1", "=v,I"(half 1.0)
365  ret i32 %v0
366}
367
368; NOGCN: error: invalid operand for inline asm constraint 'I'
369define i32 @inline_I_constraint_H7() {
370  %v0 = tail call i32 asm "v_mov_b32 $0, $1", "=v,I"(i16 bitcast (half -1.0 to i16))
371  ret i32 %v0
372}
373
374; NOGCN: error: invalid operand for inline asm constraint 'I'
375define i32 @inline_I_constraint_H8() {
376  %v0 = tail call i32 asm "v_mov_b32 $0, $1", "=v,I"(i16 -17)
377  ret i32 %v0
378}
379
380; NOGCN: error: invalid operand for inline asm constraint 'I'
381define i32 @inline_I_constraint_H9() {
382  %v0 = tail call i32 asm "v_mov_b32 $0, $1", "=v,I"(i16 65)
383  ret i32 %v0
384}
385
386;==============================================================================
387; 'I' constraint, 32-bit operand
388;==============================================================================
389
390; GCN-LABEL: {{^}}inline_I_constraint_F0:
391; GCN: v_mov_b32 {{v[0-9]+}}, -16
392define i32 @inline_I_constraint_F0() {
393  %v0 = tail call i32 asm "v_mov_b32 $0, $1", "=v,I"(i32 -16)
394  ret i32 %v0
395}
396
397; GCN-LABEL: {{^}}inline_I_constraint_F1:
398; GCN: v_mov_b32 {{v[0-9]+}}, -1
399define i32 @inline_I_constraint_F1() {
400  %v0 = tail call i32 asm "v_mov_b32 $0, $1", "=v,I"(float bitcast (i32 -1 to float))
401  ret i32 %v0
402}
403
404; NOGCN: error: invalid operand for inline asm constraint 'I'
405define i32 @inline_I_constraint_F8() {
406  %v0 = tail call i32 asm "v_mov_b32 $0, $1", "=v,I"(float -4.0)
407  ret i32 %v0
408}
409
410; NOGCN: error: invalid operand for inline asm constraint 'I'
411define i32 @inline_I_constraint_F9() {
412  %v0 = tail call i32 asm "v_mov_b32 $0, $1", "=v,I"(i32 -17)
413  ret i32 %v0
414}
415
416;==============================================================================
417; 'I' constraint, 64-bit operand
418;==============================================================================
419
420; GCN-LABEL: {{^}}inline_I_constraint_D0:
421; GCN: v_mov_b32 {{v[0-9]+}}, -16
422define i32 @inline_I_constraint_D0() {
423  %v0 = tail call i32 asm "v_mov_b32 $0, $1", "=v,I"(i64 -16)
424  ret i32 %v0
425}
426
427; NOGCN: error: invalid operand for inline asm constraint 'I'
428define i32 @inline_I_constraint_D8() {
429  %v0 = tail call i32 asm "v_cvt_f32_f64 $0, $1", "=v,I"(double 0.5)
430  ret i32 %v0
431}
432
433; NOGCN: error: invalid operand for inline asm constraint 'I'
434define i32 @inline_I_constraint_D9() {
435  %v0 = tail call i32 asm "v_cvt_f32_f64 $0, $1", "=v,I"(i64 65)
436  ret i32 %v0
437}
438
439;==============================================================================
440; 'I' constraint, v2x16 operand
441;==============================================================================
442
443; NOSI: error: invalid operand for inline asm constraint 'I'
444; VI-LABEL: {{^}}inline_I_constraint_V0:
445; VI: v_mov_b32 {{v[0-9]+}}, -4
446define i32 @inline_I_constraint_V0() {
447  %v0 = tail call i32 asm "v_mov_b32 $0, $1", "=v,I"(<2 x i16> <i16 -4, i16 -4>)
448  ret i32 %v0
449}
450
451; NOGCN: error: invalid operand for inline asm constraint 'I'
452define i32 @inline_I_constraint_V1() {
453  %v0 = tail call i32 asm "v_mov_b32 $0, $1", "=v,I"(<2 x half> <half -0.5, half -0.5>)
454  ret i32 %v0
455}
456
457; NOGCN: error: invalid operand for inline asm constraint 'I'
458define i32 @inline_I_constraint_V2() {
459  %v0 = tail call i32 asm "v_mov_b32 $0, $1", "=v,I"(<2 x i16> <i16 -4, i16 undef>)
460  ret i32 %v0
461}
462
463; NOGCN: error: invalid operand for inline asm constraint 'I'
464define i32 @inline_I_constraint_V3() {
465  %v0 = tail call i32 asm "v_mov_b32 $0, $1", "=v,I"(<2 x i16> <i16 1, i16 2>)
466  ret i32 %v0
467}
468
469; NOGCN: error: invalid operand for inline asm constraint 'I'
470define i32 @inline_I_constraint_V4() {
471  %v0 = tail call i32 asm "v_mov_b32 $0, $1", "=v,I"(<4 x i16> <i16 0, i16 0, i16 0, i16 0>)
472  ret i32 %v0
473}
474
475; NOGCN: error: invalid operand for inline asm constraint 'I'
476define i32 @inline_I_constraint_V5() {
477  %v0 = tail call i32 asm "v_mov_b32 $0, $1", "=v,I"(<2 x i32> <i32 0, i32 0>)
478  ret i32 %v0
479}
480
481;==============================================================================
482; 'I' constraint, type errors
483;==============================================================================
484
485; NOGCN: error: invalid operand for inline asm constraint 'I'
486define i32 @inline_I_constraint_E1(i32 %x) {
487  %v0 = tail call i32 asm "v_mov_b32 $0, $1", "=v,I"(i32 %x)
488  ret i32 %v0
489}
490
491; NOGCN: error: invalid operand for inline asm constraint 'I'
492define i32 @inline_I_constraint_E2() {
493  %v0 = tail call i32 asm "v_mov_b32 $0, $1", "=v,I"(i128 100000000000000000000)
494  ret i32 %v0
495}
496
497;==============================================================================
498; 'J' constraint, 16-bit operand
499;==============================================================================
500
501; NOSI: error: invalid operand for inline asm constraint 'J'
502; VI-LABEL: {{^}}inline_J_constraint_H0:
503; VI: v_mov_b32 {{v[0-9]+}}, -1
504define i32 @inline_J_constraint_H0() {
505  %v0 = tail call i32 asm "v_mov_b32 $0, $1", "=v,J"(i16 65535)
506  ret i32 %v0
507}
508
509; NOSI: error: invalid operand for inline asm constraint 'J'
510; VI-LABEL: {{^}}inline_J_constraint_H1:
511; VI: v_mov_b32 {{v[0-9]+}}, 0x7fff
512define i32 @inline_J_constraint_H1() {
513  %v0 = tail call i32 asm "v_mov_b32 $0, $1", "=v,J"(i16 32767)
514  ret i32 %v0
515}
516
517; NOSI: error: invalid operand for inline asm constraint 'J'
518; VI-LABEL: {{^}}inline_J_constraint_H2:
519; VI: v_mov_b32 {{v[0-9]+}}, 0x8000
520define i32 @inline_J_constraint_H2() {
521  %v0 = tail call i32 asm "v_mov_b32 $0, $1", "=v,J"(i16 -32768)
522  ret i32 %v0
523}
524
525; NOSI: error: invalid operand for inline asm constraint 'J'
526; VI-LABEL: {{^}}inline_J_constraint_H3:
527; VI: v_mov_b32 {{v[0-9]+}}, 0x4800
528define i32 @inline_J_constraint_H3() {
529  %v0 = tail call i32 asm "v_mov_b32 $0, $1", "=v,J"(half 8.0)
530  ret i32 %v0
531}
532
533; NOSI: error: invalid operand for inline asm constraint 'J'
534; VI-LABEL: {{^}}inline_J_constraint_H4:
535; VI: v_mov_b32 {{v[0-9]+}}, -16
536define i32 @inline_J_constraint_H4() {
537  %v0 = tail call i32 asm "v_mov_b32 $0, $1", "=v,J"(half bitcast (i16 -16 to half))
538  ret i32 %v0
539}
540
541;==============================================================================
542; 'J' constraint, 32-bit operand
543;==============================================================================
544
545; GCN-LABEL: {{^}}inline_J_constraint_F0:
546; GCN: v_mov_b32 {{v[0-9]+}}, -1
547define i32 @inline_J_constraint_F0() {
548  %v0 = tail call i32 asm "v_mov_b32 $0, $1", "=v,J"(i32 -1)
549  ret i32 %v0
550}
551
552; GCN-LABEL: {{^}}inline_J_constraint_F1:
553; GCN: v_mov_b32 {{v[0-9]+}}, 0x7fff
554define i32 @inline_J_constraint_F1() {
555  %v0 = tail call i32 asm "v_mov_b32 $0, $1", "=v,J"(i32 32767)
556  ret i32 %v0
557}
558
559; GCN-LABEL: {{^}}inline_J_constraint_F2:
560; GCN: v_mov_b32 {{v[0-9]+}}, 0xffff8000
561define i32 @inline_J_constraint_F2() {
562  %v0 = tail call i32 asm "v_mov_b32 $0, $1", "=v,J"(i32 -32768)
563  ret i32 %v0
564}
565
566; NOGCN: error: invalid operand for inline asm constraint 'J'
567define i32 @inline_J_constraint_F6() {
568  %v0 = tail call i32 asm "v_mov_b32 $0, $1", "=v,J"(i32 32768)
569  ret i32 %v0
570}
571
572; NOGCN: error: invalid operand for inline asm constraint 'J'
573define i32 @inline_J_constraint_F7() {
574  %v0 = tail call i32 asm "v_mov_b32 $0, $1", "=v,J"(i32 -32769)
575  ret i32 %v0
576}
577
578; NOGCN: error: invalid operand for inline asm constraint 'J'
579define i32 @inline_J_constraint_F8() {
580  %v0 = tail call i32 asm "v_mov_b32 $0, $1", "=v,J"(float -4.0)
581  ret i32 %v0
582}
583
584;==============================================================================
585; 'J' constraint, 64-bit operand
586;==============================================================================
587
588; GCN-LABEL: {{^}}inline_J_constraint_D0:
589; GCN: v_mov_b32 {{v[0-9]+}}, 0x7fff
590define i32 @inline_J_constraint_D0() {
591  %v0 = tail call i32 asm "v_mov_b32 $0, $1", "=v,J"(i64 32767)
592  ret i32 %v0
593}
594
595; GCN-LABEL: {{^}}inline_J_constraint_D1:
596; GCN: v_mov_b32 {{v[0-9]+}}, 0xffffffffffff8000
597define i32 @inline_J_constraint_D1() {
598  %v0 = tail call i32 asm "v_mov_b32 $0, $1", "=v,J"(i64 -32768)
599  ret i32 %v0
600}
601
602; NOGCN: error: invalid operand for inline asm constraint 'J'
603define i32 @inline_J_constraint_D8() {
604  %v0 = tail call i32 asm "v_mov_b32 $0, $1", "=v,J"(i64 32768)
605  ret i32 %v0
606}
607
608; NOGCN: error: invalid operand for inline asm constraint 'J'
609define i32 @inline_J_constraint_D9() {
610  %v0 = tail call i32 asm "v_mov_b32 $0, $1", "=v,J"(i64 -32769)
611  ret i32 %v0
612}
613
614;==============================================================================
615; 'J' constraint, v2x16 operand
616;==============================================================================
617
618; NOSI: error: invalid operand for inline asm constraint 'J'
619; VI-LABEL: {{^}}inline_J_constraint_V0:
620; VI: v_mov_b32 {{v[0-9]+}}, -4
621define i32 @inline_J_constraint_V0() {
622  %v0 = tail call i32 asm "v_mov_b32 $0, $1", "=v,J"(<2 x i16> <i16 -4, i16 -4>)
623  ret i32 %v0
624}
625
626; NOSI: error: invalid operand for inline asm constraint 'J'
627; VI-LABEL: {{^}}inline_J_constraint_V1:
628; VI: v_mov_b32 {{v[0-9]+}}, 0x7fff
629define i32 @inline_J_constraint_V1() {
630  %v0 = tail call i32 asm "v_mov_b32 $0, $1", "=v,J"(<2 x i16> <i16 32767, i16 32767>)
631  ret i32 %v0
632}
633
634; NOSI: error: invalid operand for inline asm constraint 'J'
635; VI-LABEL: {{^}}inline_J_constraint_V2:
636; VI: v_mov_b32 {{v[0-9]+}}, 0x8000
637define i32 @inline_J_constraint_V2() {
638  %v0 = tail call i32 asm "v_mov_b32 $0, $1", "=v,J"(<2 x i16> <i16 -32768, i16 -32768>)
639  ret i32 %v0
640}
641
642; NOSI: error: invalid operand for inline asm constraint 'J'
643; VI-LABEL: {{^}}inline_J_constraint_V3:
644; VI: v_mov_b32 {{v[0-9]+}}, 0x4c00
645define i32 @inline_J_constraint_V3() {
646  %v0 = tail call i32 asm "v_mov_b32 $0, $1", "=v,J"(<2 x half> <half 16.0, half 16.0>)
647  ret i32 %v0
648}
649
650;==============================================================================
651; 'J' constraint, type errors
652;==============================================================================
653
654; NOGCN: error: invalid operand for inline asm constraint 'J'
655define i32 @inline_J_constraint_E1(i32 %x) {
656  %v0 = tail call i32 asm "v_mov_b32 $0, $1", "=v,J"(i32 %x)
657  ret i32 %v0
658}
659
660; NOGCN: error: invalid operand for inline asm constraint 'J'
661define i32 @inline_J_constraint_E2() {
662  %v0 = tail call i32 asm "v_mov_b32 $0, $1", "=v,J"(i128 100000000000000000000)
663  ret i32 %v0
664}
665
666;==============================================================================
667; 'B' constraint, 16-bit operand
668;==============================================================================
669
670; NOSI: error: invalid operand for inline asm constraint 'B'
671; VI-LABEL: {{^}}inline_B_constraint_H0:
672; VI: v_mov_b32 {{v[0-9]+}}, 0x7fff
673define i32 @inline_B_constraint_H0() {
674  %v0 = tail call i32 asm "v_mov_b32 $0, $1", "=v,B"(i16 32767)
675  ret i32 %v0
676}
677
678; NOSI: error: invalid operand for inline asm constraint 'B'
679; VI-LABEL: {{^}}inline_B_constraint_H1:
680; VI: v_mov_b32 {{v[0-9]+}}, -1
681define i32 @inline_B_constraint_H1() {
682  %v0 = tail call i32 asm "v_mov_b32 $0, $1", "=v,B"(i16 65535)
683  ret i32 %v0
684}
685
686; NOSI: error: invalid operand for inline asm constraint 'B'
687; VI-LABEL: {{^}}inline_B_constraint_H3:
688; VI: v_mov_b32 {{v[0-9]+}}, 0x8000
689define i32 @inline_B_constraint_H3() {
690  %v0 = tail call i32 asm "v_mov_b32 $0, $1", "=v,B"(i16 -32768)
691  ret i32 %v0
692}
693
694; NOSI: error: invalid operand for inline asm constraint 'B'
695; VI-LABEL: {{^}}inline_B_constraint_H4:
696; VI: v_mov_b32 {{v[0-9]+}}, 0x4a80
697define i32 @inline_B_constraint_H4() {
698  %v0 = tail call i32 asm "v_mov_b32 $0, $1", "=v,B"(half 13.0)
699  ret i32 %v0
700}
701
702;==============================================================================
703; 'B' constraint, 32-bit operand
704;==============================================================================
705
706; GCN-LABEL: {{^}}inline_B_constraint_F0:
707; GCN: v_mov_b32 {{v[0-9]+}}, -1
708define i32 @inline_B_constraint_F0() {
709  %v0 = tail call i32 asm "v_mov_b32 $0, $1", "=v,B"(i32 4294967295)
710  ret i32 %v0
711}
712
713; GCN-LABEL: {{^}}inline_B_constraint_F1:
714; GCN: v_mov_b32 {{v[0-9]+}}, 0x80000000
715define i32 @inline_B_constraint_F1() {
716  %v0 = tail call i32 asm "v_mov_b32 $0, $1", "=v,B"(i32 2147483648)
717  ret i32 %v0
718}
719
720; GCN-LABEL: {{^}}inline_B_constraint_F2:
721; GCN: v_mov_b32 {{v[0-9]+}}, 0x42000000
722define i32 @inline_B_constraint_F2() {
723  %v0 = tail call i32 asm "v_mov_b32 $0, $1", "=v,B"(float 32.0)
724  ret i32 %v0
725}
726
727;==============================================================================
728; 'B' constraint, 64-bit operand
729;==============================================================================
730
731; GCN-LABEL: {{^}}inline_B_constraint_D0:
732; GCN: v_mov_b32 {{v[0-9]+}}, 0x7fffffff
733define i32 @inline_B_constraint_D0() {
734  %v0 = tail call i32 asm "v_mov_b32 $0, $1", "=v,B"(i64 2147483647)
735  ret i32 %v0
736}
737
738; GCN-LABEL: {{^}}inline_B_constraint_D1:
739; GCN: v_mov_b32 {{v[0-9]+}}, -1
740define i32 @inline_B_constraint_D1() {
741  %v0 = tail call i32 asm "v_mov_b32 $0, $1", "=v,B"(i64 -1)
742  ret i32 %v0
743}
744
745; GCN-LABEL: {{^}}inline_B_constraint_D2:
746; GCN: v_mov_b32 {{v[0-9]+}}, 0xffffffff80000000
747define i32 @inline_B_constraint_D2() {
748  %v0 = tail call i32 asm "v_mov_b32 $0, $1", "=v,B"(i64 -2147483648)
749  ret i32 %v0
750}
751
752; NOGCN: error: invalid operand for inline asm constraint 'B'
753define i32 @inline_B_constraint_D7() {
754  %v0 = tail call i32 asm "v_mov_b32 $0, $1", "=v,B"(i64 -2147483649)
755  ret i32 %v0
756}
757
758; NOGCN: error: invalid operand for inline asm constraint 'B'
759define i32 @inline_B_constraint_D8() {
760  %v0 = tail call i32 asm "v_mov_b32 $0, $1", "=v,B"(i64 4294967295)
761  ret i32 %v0
762}
763
764; NOGCN: error: invalid operand for inline asm constraint 'B'
765define i32 @inline_B_constraint_D9() {
766  %v0 = tail call i32 asm "v_mov_b32 $0, $1", "=v,B"(i64 2147483648)
767  ret i32 %v0
768}
769
770;==============================================================================
771; 'B' constraint, v2x16 operand
772;==============================================================================
773
774; NOSI: error: invalid operand for inline asm constraint 'B'
775; VI-LABEL: {{^}}inline_B_constraint_V0:
776; VI: v_mov_b32 {{v[0-9]+}}, 0x7fff
777define i32 @inline_B_constraint_V0() {
778  %v0 = tail call i32 asm "v_mov_b32 $0, $1", "=v,B"(<2 x i16> <i16 32767, i16 32767>)
779  ret i32 %v0
780}
781
782; NOSI: error: invalid operand for inline asm constraint 'B'
783; VI-LABEL: {{^}}inline_B_constraint_V1:
784; VI: v_mov_b32 {{v[0-9]+}}, -1
785define i32 @inline_B_constraint_V1() {
786  %v0 = tail call i32 asm "v_mov_b32 $0, $1", "=v,B"(<2 x i16> <i16 -1, i16 -1>)
787  ret i32 %v0
788}
789
790; NOSI: error: invalid operand for inline asm constraint 'B'
791; VI-LABEL: {{^}}inline_B_constraint_V2:
792; VI: v_mov_b32 {{v[0-9]+}}, 0x8000
793define i32 @inline_B_constraint_V2() {
794  %v0 = tail call i32 asm "v_mov_b32 $0, $1", "=v,B"(<2 x i16> <i16 -32768, i16 -32768>)
795  ret i32 %v0
796}
797
798;==============================================================================
799; 'C' constraint, 16-bit operand
800;==============================================================================
801
802; NOSI: error: invalid operand for inline asm constraint 'C'
803; VI-LABEL: {{^}}inline_C_constraint_H0:
804; VI: v_mov_b32 {{v[0-9]+}}, 0x7fff
805define i32 @inline_C_constraint_H0() {
806  %v0 = tail call i32 asm "v_mov_b32 $0, $1", "=v,C"(i16 32767)
807  ret i32 %v0
808}
809
810; NOSI: error: invalid operand for inline asm constraint 'C'
811; VI-LABEL: {{^}}inline_C_constraint_H1:
812; VI: v_mov_b32 {{v[0-9]+}}, -1
813define i32 @inline_C_constraint_H1() {
814  %v0 = tail call i32 asm "v_mov_b32 $0, $1", "=v,C"(i16 65535)
815  ret i32 %v0
816}
817
818; NOSI: error: invalid operand for inline asm constraint 'C'
819; VI-LABEL: {{^}}inline_C_constraint_H3:
820; VI: v_mov_b32 {{v[0-9]+}}, 0x8000
821define i32 @inline_C_constraint_H3() {
822  %v0 = tail call i32 asm "v_mov_b32 $0, $1", "=v,C"(i16 -32768)
823  ret i32 %v0
824}
825
826; NOSI: error: invalid operand for inline asm constraint 'C'
827; VI-LABEL: {{^}}inline_C_constraint_H4:
828; VI: v_mov_b32 {{v[0-9]+}}, 0x4a80
829define i32 @inline_C_constraint_H4() {
830  %v0 = tail call i32 asm "v_mov_b32 $0, $1", "=v,C"(half 13.0)
831  ret i32 %v0
832}
833
834;==============================================================================
835; 'C' constraint, 32-bit operand
836;==============================================================================
837
838; GCN-LABEL: {{^}}inline_C_constraint_F0:
839; GCN: v_mov_b32 {{v[0-9]+}}, -1
840define i32 @inline_C_constraint_F0() {
841  %v0 = tail call i32 asm "v_mov_b32 $0, $1", "=v,C"(i32 4294967295)
842  ret i32 %v0
843}
844
845; GCN-LABEL: {{^}}inline_C_constraint_F1:
846; GCN: v_mov_b32 {{v[0-9]+}}, 0x80000000
847define i32 @inline_C_constraint_F1() {
848  %v0 = tail call i32 asm "v_mov_b32 $0, $1", "=v,C"(i32 2147483648)
849  ret i32 %v0
850}
851
852; GCN-LABEL: {{^}}inline_C_constraint_F2:
853; GCN: v_mov_b32 {{v[0-9]+}}, 0x7fffffff
854define i32 @inline_C_constraint_F2() {
855  %v0 = tail call i32 asm "v_mov_b32 $0, $1", "=v,C"(i32 2147483647)
856  ret i32 %v0
857}
858
859; GCN-LABEL: {{^}}inline_C_constraint_F3:
860; GCN: v_mov_b32 {{v[0-9]+}}, 0x42000000
861define i32 @inline_C_constraint_F3() {
862  %v0 = tail call i32 asm "v_mov_b32 $0, $1", "=v,C"(float 32.0)
863  ret i32 %v0
864}
865
866; GCN-LABEL: {{^}}inline_C_constraint_F4:
867; GCN: v_mov_b32 {{v[0-9]+}}, -16
868define i32 @inline_C_constraint_F4() {
869  %v0 = tail call i32 asm "v_mov_b32 $0, $1", "=v,C"(i32 -16)
870  ret i32 %v0
871}
872
873; GCN-LABEL: {{^}}inline_C_constraint_F5:
874; GCN: v_mov_b32 {{v[0-9]+}}, 0xffffffef
875define i32 @inline_C_constraint_F5() {
876  %v0 = tail call i32 asm "v_mov_b32 $0, $1", "=v,C"(i32 -17)
877  ret i32 %v0
878}
879
880;==============================================================================
881; 'C' constraint, 64-bit operand
882;==============================================================================
883
884; GCN-LABEL: {{^}}inline_C_constraint_D0:
885; GCN: v_mov_b32 {{v[0-9]+}}, 0xffffffff
886define i32 @inline_C_constraint_D0() {
887  %v0 = tail call i32 asm "v_mov_b32 $0, $1", "=v,C"(i64 4294967295)
888  ret i32 %v0
889}
890
891; GCN-LABEL: {{^}}inline_C_constraint_D1:
892; GCN: v_mov_b32 {{v[0-9]+}}, 0x80000000
893define i32 @inline_C_constraint_D1() {
894  %v0 = tail call i32 asm "v_mov_b32 $0, $1", "=v,C"(i64 2147483648)
895  ret i32 %v0
896}
897
898; GCN-LABEL: {{^}}inline_C_constraint_D2:
899; GCN: v_mov_b32 {{v[0-9]+}}, -16
900define i32 @inline_C_constraint_D2() {
901  %v0 = tail call i32 asm "v_mov_b32 $0, $1", "=v,C"(i64 -16)
902  ret i32 %v0
903}
904
905; NOGCN: error: invalid operand for inline asm constraint 'C'
906define i32 @inline_C_constraint_D8() {
907  %v0 = tail call i32 asm "v_mov_b32 $0, $1", "=v,C"(i64 -17)
908  ret i32 %v0
909}
910
911; NOGCN: error: invalid operand for inline asm constraint 'C'
912define i32 @inline_C_constraint_D9() {
913  %v0 = tail call i32 asm "v_mov_b32 $0, $1", "=v,C"(i64 4294967296)
914  ret i32 %v0
915}
916
917;==============================================================================
918; 'C' constraint, v2x16 operand
919;==============================================================================
920
921; NOSI: error: invalid operand for inline asm constraint 'C'
922; VI-LABEL: {{^}}inline_C_constraint_V0:
923; VI: v_mov_b32 {{v[0-9]+}}, 0x7fff
924define i32 @inline_C_constraint_V0() {
925  %v0 = tail call i32 asm "v_mov_b32 $0, $1", "=v,C"(<2 x i16> <i16 32767, i16 32767>)
926  ret i32 %v0
927}
928
929; NOSI: error: invalid operand for inline asm constraint 'C'
930; VI-LABEL: {{^}}inline_C_constraint_V1:
931; VI: v_mov_b32 {{v[0-9]+}}, -1
932define i32 @inline_C_constraint_V1() {
933  %v0 = tail call i32 asm "v_mov_b32 $0, $1", "=v,C"(<2 x i16> <i16 -1, i16 -1>)
934  ret i32 %v0
935}
936
937; NOSI: error: invalid operand for inline asm constraint 'C'
938; VI-LABEL: {{^}}inline_C_constraint_V2:
939; VI: v_mov_b32 {{v[0-9]+}}, 0x8000
940define i32 @inline_C_constraint_V2() {
941  %v0 = tail call i32 asm "v_mov_b32 $0, $1", "=v,C"(<2 x i16> <i16 -32768, i16 -32768>)
942  ret i32 %v0
943}
944
945;==============================================================================
946; 'DA' constraint, 16-bit operand
947;==============================================================================
948
949; NOSI: error: invalid operand for inline asm constraint 'DA'
950; VI-LABEL: {{^}}inline_DA_constraint_H0:
951; VI: v_mov_b32 {{v[0-9]+}}, 64
952define i32 @inline_DA_constraint_H0() {
953  %v0 = tail call i32 asm "v_mov_b32 $0, $1", "=v,^DA"(i16 64)
954  ret i32 %v0
955}
956
957; NOSI: error: invalid operand for inline asm constraint 'DA'
958; VI-LABEL: {{^}}inline_DA_constraint_H1:
959; VI: v_mov_b32 {{v[0-9]+}}, -16
960define i32 @inline_DA_constraint_H1() {
961  %v0 = tail call i32 asm "v_mov_b32 $0, $1", "=v,^DA"(i16 -16)
962  ret i32 %v0
963}
964
965; NOSI: error: invalid operand for inline asm constraint 'DA'
966; VI-LABEL: {{^}}inline_DA_constraint_H2:
967define i32 @inline_DA_constraint_H2() {
968  %v0 = tail call i32 asm "v_mov_b32 $0, $1", "=v,^DA"(i16 bitcast (half 1.0 to i16))
969  ret i32 %v0
970}
971
972; NOSI: error: invalid operand for inline asm constraint 'DA'
973; VI-LABEL: {{^}}inline_DA_constraint_H3:
974define i32 @inline_DA_constraint_H3() {
975  %v0 = tail call i32 asm "v_mov_b32 $0, $1", "=v,^DA"(i16 bitcast (half -1.0 to i16))
976  ret i32 %v0
977}
978
979; NOSI: error: invalid operand for inline asm constraint 'DA'
980; VI-LABEL: {{^}}inline_DA_constraint_H4:
981define i32 @inline_DA_constraint_H4() {
982  %v0 = tail call i32 asm "v_mov_b32 $0, $1", "=v,^DA"(half 0xH3118)
983  ret i32 %v0
984}
985
986; NOSI: error: invalid operand for inline asm constraint 'DA'
987; VI-LABEL: {{^}}inline_DA_constraint_H5:
988define i32 @inline_DA_constraint_H5() {
989  %v0 = tail call i32 asm "v_mov_b32 $0, $1", "=v,^DA"(i16 bitcast (half 0xH3118 to i16))
990  ret i32 %v0
991}
992
993; NOSI: error: invalid operand for inline asm constraint 'DA'
994; VI-LABEL: {{^}}inline_DA_constraint_H6:
995define i32 @inline_DA_constraint_H6() {
996  %v0 = tail call i32 asm "v_mov_b32 $0, $1", "=v,^DA"(half -0.5)
997  ret i32 %v0
998}
999
1000; NOGCN: error: invalid operand for inline asm constraint 'DA'
1001define i32 @inline_DA_constraint_H7() {
1002  %v0 = tail call i32 asm "v_mov_b32 $0, $1", "=v,^DA"(i16 bitcast (half 0xH3119 to i16))
1003  ret i32 %v0
1004}
1005
1006; NOGCN: error: invalid operand for inline asm constraint 'DA'
1007define i32 @inline_DA_constraint_H8() {
1008  %v0 = tail call i32 asm "v_mov_b32 $0, $1", "=v,^DA"(i16 -17)
1009  ret i32 %v0
1010}
1011
1012; NOGCN: error: invalid operand for inline asm constraint 'DA'
1013define i32 @inline_DA_constraint_H9() {
1014  %v0 = tail call i32 asm "v_mov_b32 $0, $1", "=v,^DA"(i16 65)
1015  ret i32 %v0
1016}
1017
1018;==============================================================================
1019; 'DA' constraint, 32-bit operand
1020;==============================================================================
1021
1022; GCN-LABEL: {{^}}inline_DA_constraint_F0:
1023; GCN: v_mov_b32 {{v[0-9]+}}, -16
1024define i32 @inline_DA_constraint_F0() {
1025  %v0 = tail call i32 asm "v_mov_b32 $0, $1", "=v,^DA"(i32 -16)
1026  ret i32 %v0
1027}
1028
1029; GCN-LABEL: {{^}}inline_DA_constraint_F1:
1030; GCN: v_mov_b32 {{v[0-9]+}}, 1
1031define i32 @inline_DA_constraint_F1() {
1032  %v0 = tail call i32 asm "v_mov_b32 $0, $1", "=v,^DA"(i32 1)
1033  ret i32 %v0
1034}
1035
1036; GCN-LABEL: {{^}}inline_DA_constraint_F2:
1037; GCN: v_mov_b32 {{v[0-9]+}}, 0xbf000000
1038define i32 @inline_DA_constraint_F2() {
1039  %v0 = tail call i32 asm "v_mov_b32 $0, $1", "=v,^DA"(i32 bitcast (float -0.5 to i32))
1040  ret i32 %v0
1041}
1042
1043; GCN-LABEL: {{^}}inline_DA_constraint_F3:
1044; GCN: v_mov_b32 {{v[0-9]+}}, 0x40000000
1045define i32 @inline_DA_constraint_F3() {
1046  %v0 = tail call i32 asm "v_mov_b32 $0, $1", "=v,^DA"(i32 bitcast (float 2.0 to i32))
1047  ret i32 %v0
1048}
1049
1050; GCN-LABEL: {{^}}inline_DA_constraint_F4:
1051; GCN: v_mov_b32 {{v[0-9]+}}, 0xc0800000
1052define i32 @inline_DA_constraint_F4() {
1053  %v0 = tail call i32 asm "v_mov_b32 $0, $1", "=v,^DA"(float -4.0)
1054  ret i32 %v0
1055}
1056
1057; NOSI: error: invalid operand for inline asm constraint 'DA'
1058; VI-LABEL: {{^}}inline_DA_constraint_F5:
1059; VI: v_mov_b32 {{v[0-9]+}}, 0x3e22f983
1060define i32 @inline_DA_constraint_F5() {
1061  %v0 = tail call i32 asm "v_mov_b32 $0, $1", "=v,^DA"(i32 1042479491)
1062  ret i32 %v0
1063}
1064
1065; GCN-LABEL: {{^}}inline_DA_constraint_F6:
1066; GCN: v_mov_b32 {{v[0-9]+}}, 0x3f000000
1067define i32 @inline_DA_constraint_F6() {
1068  %v0 = tail call i32 asm "v_mov_b32 $0, $1", "=v,^DA"(float 0.5)
1069  ret i32 %v0
1070}
1071
1072; NOGCN: error: invalid operand for inline asm constraint 'DA'
1073define i32 @inline_DA_constraint_F7() {
1074  %v0 = tail call i32 asm "v_mov_b32 $0, $1", "=v,^DA"(i32 65)
1075  ret i32 %v0
1076}
1077
1078; NOGCN: error: invalid operand for inline asm constraint 'DA'
1079define i32 @inline_DA_constraint_F8() {
1080  %v0 = tail call i32 asm "v_mov_b32 $0, $1", "=v,^DA"(i32 -17)
1081  ret i32 %v0
1082}
1083
1084;==============================================================================
1085; 'DA' constraint, 64-bit operand
1086;==============================================================================
1087
1088; GCN-LABEL: {{^}}inline_DA_constraint_D0:
1089; GCN: v_mov_b32 {{v[0-9]+}}, 0x40fffffff0
1090define i32 @inline_DA_constraint_D0() {
1091  %v0 = tail call i32 asm "v_mov_b32 $0, $1 >> 32", "=v,^DA"(i64 bitcast (double 0x40fffffff0 to i64))
1092  ret i32 %v0
1093}
1094
1095; GCN-LABEL: {{^}}inline_DA_constraint_D1:
1096; GCN: v_mov_b32 {{v[0-9]+}}, 0xfffffff000000040
1097define i32 @inline_DA_constraint_D1() {
1098  %v0 = tail call i32 asm "v_mov_b32 $0, $1 >> 32", "=v,^DA"(i64 bitcast (double 0xfffffff000000040 to i64))
1099  ret i32 %v0
1100}
1101
1102; GCN-LABEL: {{^}}inline_DA_constraint_D2:
1103; GCN: v_mov_b32 {{v[0-9]+}}, -1
1104define i32 @inline_DA_constraint_D2() {
1105  %v0 = tail call i32 asm "v_mov_b32 $0, $1 >> 32", "=v,^DA"(i64 -1)
1106  ret i32 %v0
1107}
1108
1109; GCN-LABEL: {{^}}inline_DA_constraint_D3:
1110; GCN: v_mov_b32 {{v[0-9]+}}, 0xbf000000c0800000
1111define i32 @inline_DA_constraint_D3() {
1112  %v0 = tail call i32 asm "v_mov_b32 $0, $1 >> 32", "=v,^DA"(i64 bitcast (double 0xbf000000c0800000 to i64))
1113  ret i32 %v0
1114}
1115
1116; NOSI: error: invalid operand for inline asm constraint 'DA'
1117; VI-LABEL: {{^}}inline_DA_constraint_D4:
1118; VI: v_mov_b32 {{v[0-9]+}}, 0x3e22f9833e22f983
1119define i32 @inline_DA_constraint_D4() {
1120  %v0 = tail call i32 asm "v_mov_b32 $0, $1 >> 32", "=v,^DA"(i64 bitcast (double 0x3e22f9833e22f983 to i64))
1121  ret i32 %v0
1122}
1123
1124; NOGCN: error: invalid operand for inline asm constraint 'DA'
1125define i32 @inline_DA_constraint_D5() {
1126  %v0 = tail call i32 asm "v_mov_b32 $0, $1 >> 32", "=v,^DA"(i64 bitcast (double 0x0000004000000041 to i64))
1127  ret i32 %v0
1128}
1129
1130; NOGCN: error: invalid operand for inline asm constraint 'DA'
1131define i32 @inline_DA_constraint_D8() {
1132  %v0 = tail call i32 asm "v_mov_b32 $0, $1 >> 32", "=v,^DA"(i64 bitcast (double 0x0000004100000040 to i64))
1133  ret i32 %v0
1134}
1135
1136; NOGCN: error: invalid operand for inline asm constraint 'DA'
1137define i32 @inline_DA_constraint_D9() {
1138  %v0 = tail call i32 asm "v_mov_b32 $0, $1 >> 32", "=v,^DA"(double 100.0)
1139  ret i32 %v0
1140}
1141
1142;==============================================================================
1143; 'DA' constraint, v2x16 operand
1144;==============================================================================
1145
1146; NOSI: error: invalid operand for inline asm constraint 'DA'
1147; VI-LABEL: {{^}}inline_DA_constraint_V0:
1148; VI: v_mov_b32 {{v[0-9]+}}, -4
1149define i32 @inline_DA_constraint_V0() {
1150  %v0 = tail call i32 asm "v_mov_b32 $0, $1", "=v,^DA"(<2 x i16> <i16 -4, i16 -4>)
1151  ret i32 %v0
1152}
1153
1154; NOSI: error: invalid operand for inline asm constraint 'DA'
1155; VI-LABEL: {{^}}inline_DA_constraint_V1:
1156define i32 @inline_DA_constraint_V1() {
1157  %v0 = tail call i32 asm "v_mov_b32 $0, $1", "=v,^DA"(<2 x half> <half -0.5, half -0.5>)
1158  ret i32 %v0
1159}
1160
1161; NOGCN: error: invalid operand for inline asm constraint 'DA'
1162define i32 @inline_DA_constraint_V2() {
1163  %v0 = tail call i32 asm "v_mov_b32 $0, $1", "=v,^DA"(<2 x i16> <i16 -4, i16 undef>)
1164  ret i32 %v0
1165}
1166
1167; NOGCN: error: invalid operand for inline asm constraint 'DA'
1168define i32 @inline_DA_constraint_V6() {
1169  %v0 = tail call i32 asm "v_mov_b32 $0, $1", "=v,^DA"(<2 x i32> <i32 0, i32 0>)
1170  ret i32 %v0
1171}
1172
1173;==============================================================================
1174; 'DA' constraint, type errors
1175;==============================================================================
1176
1177; NOGCN: error: invalid operand for inline asm constraint 'DA'
1178define i32 @inline_DA_constraint_E1(i32 %x) {
1179  %v0 = tail call i32 asm "v_mov_b32 $0, $1", "=v,^DA"(i32 %x)
1180  ret i32 %v0
1181}
1182
1183; NOGCN: error: invalid operand for inline asm constraint 'DA'
1184define i32 @inline_DA_constraint_E2() {
1185  %v0 = tail call i32 asm "v_mov_b32 $0, $1", "=v,^DA"(i128 100000000000000000000)
1186  ret i32 %v0
1187}
1188
1189;==============================================================================
1190; 'DB' constraint, 16-bit operand
1191;==============================================================================
1192
1193; NOSI: error: invalid operand for inline asm constraint 'DB'
1194; VI-LABEL: {{^}}inline_DB_constraint_H0:
1195; VI: v_mov_b32 {{v[0-9]+}}, 0x7fff
1196define i32 @inline_DB_constraint_H0() {
1197  %v0 = tail call i32 asm "v_mov_b32 $0, $1", "=v,^DB"(i16 32767)
1198  ret i32 %v0
1199}
1200
1201; NOSI: error: invalid operand for inline asm constraint 'DB'
1202; VI-LABEL: {{^}}inline_DB_constraint_H1:
1203; VI: v_mov_b32 {{v[0-9]+}}, -1
1204define i32 @inline_DB_constraint_H1() {
1205  %v0 = tail call i32 asm "v_mov_b32 $0, $1", "=v,^DB"(i16 65535)
1206  ret i32 %v0
1207}
1208
1209; NOSI: error: invalid operand for inline asm constraint 'DB'
1210; VI-LABEL: {{^}}inline_DB_constraint_H2:
1211; VI: v_mov_b32 {{v[0-9]+}}, 0x4a80
1212define i32 @inline_DB_constraint_H2() {
1213  %v0 = tail call i32 asm "v_mov_b32 $0, $1", "=v,^DB"(half 13.0)
1214  ret i32 %v0
1215}
1216
1217;==============================================================================
1218; 'DB' constraint, 32-bit operand
1219;==============================================================================
1220
1221; GCN-LABEL: {{^}}inline_DB_constraint_F0:
1222; GCN: v_mov_b32 {{v[0-9]+}}, -1
1223define i32 @inline_DB_constraint_F0() {
1224  %v0 = tail call i32 asm "v_mov_b32 $0, $1", "=v,^DB"(i32 4294967295)
1225  ret i32 %v0
1226}
1227
1228; GCN-LABEL: {{^}}inline_DB_constraint_F1:
1229; GCN: v_mov_b32 {{v[0-9]+}}, 0x80000000
1230define i32 @inline_DB_constraint_F1() {
1231  %v0 = tail call i32 asm "v_mov_b32 $0, $1", "=v,^DB"(i32 2147483648)
1232  ret i32 %v0
1233}
1234
1235; GCN-LABEL: {{^}}inline_DB_constraint_F2:
1236; GCN: v_mov_b32 {{v[0-9]+}}, 0x42000000
1237define i32 @inline_DB_constraint_F2() {
1238  %v0 = tail call i32 asm "v_mov_b32 $0, $1", "=v,^DB"(float 32.0)
1239  ret i32 %v0
1240}
1241
1242;==============================================================================
1243; 'DB' constraint, 64-bit operand
1244;==============================================================================
1245
1246; GCN-LABEL: {{^}}inline_DB_constraint_D0:
1247; GCN: v_mov_b32 {{v[0-9]+}}, -1
1248define i32 @inline_DB_constraint_D0() {
1249  %v0 = tail call i32 asm "v_mov_b32 $0, $1 >> 32", "=v,^DB"(i64 -1)
1250  ret i32 %v0
1251}
1252
1253; GCN-LABEL: {{^}}inline_DB_constraint_D1:
1254; GCN: v_mov_b32 {{v[0-9]+}}, 0x1234567890abcdef
1255define i32 @inline_DB_constraint_D1() {
1256  %v0 = tail call i32 asm "v_mov_b32 $0, $1 >> 32", "=v,^DB"(i64 bitcast (double 0x1234567890abcdef to i64))
1257  ret i32 %v0
1258}
1259
1260;==============================================================================
1261; 'DB' constraint, v2x16 operand
1262;==============================================================================
1263
1264; NOSI: error: invalid operand for inline asm constraint 'DB'
1265; VI-LABEL: {{^}}inline_DB_constraint_V0:
1266; VI: v_mov_b32 {{v[0-9]+}}, 0x7fff
1267define i32 @inline_DB_constraint_V0() {
1268  %v0 = tail call i32 asm "v_mov_b32 $0, $1", "=v,^DB"(<2 x i16> <i16 32767, i16 32767>)
1269  ret i32 %v0
1270}
1271
1272; NOSI: error: invalid operand for inline asm constraint 'DB'
1273; VI-LABEL: {{^}}inline_DB_constraint_V1:
1274; VI: v_mov_b32 {{v[0-9]+}}, -1
1275define i32 @inline_DB_constraint_V1() {
1276  %v0 = tail call i32 asm "v_mov_b32 $0, $1", "=v,^DB"(<2 x i16> <i16 65535, i16 65535>)
1277  ret i32 %v0
1278}
1279
1280; NOSI: error: invalid operand for inline asm constraint 'DB'
1281; VI-LABEL: {{^}}inline_DB_constraint_V2:
1282; VI: v_mov_b32 {{v[0-9]+}}, 0xd640
1283define i32 @inline_DB_constraint_V2() {
1284  %v0 = tail call i32 asm "v_mov_b32 $0, $1", "=v,^DB"(<2 x half> <half -100.0, half -100.0>)
1285  ret i32 %v0
1286}
1287
1288;==============================================================================
1289; 'DB' constraint, type errors
1290;==============================================================================
1291
1292; NOGCN: error: invalid operand for inline asm constraint 'DB'
1293define i32 @inline_DB_constraint_E1(i32 %x) {
1294  %v0 = tail call i32 asm "v_mov_b32 $0, $1", "=v,^DB"(i32 %x)
1295  ret i32 %v0
1296}
1297
1298; NOGCN: error: invalid operand for inline asm constraint 'DB'
1299define i32 @inline_DB_constraint_E2() {
1300  %v0 = tail call i32 asm "v_mov_b32 $0, $1", "=v,^DB"(i128 100000000000000000000)
1301  ret i32 %v0
1302}
1303