1; NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py 2; RUN: llc -mtriple=amdgcn-amd-amdhsa -mcpu=gfx908 -stop-after=finalize-isel -o - %s | FileCheck -check-prefix=GFX908 %s 3; RUN: llc -mtriple=amdgcn-amd-amdhsa -mcpu=gfx90a -stop-after=finalize-isel -o - %s | FileCheck -check-prefix=GFX90A %s 4 5; Make sure we only use one 128-bit register instead of 2 for i128 asm 6; constraints 7 8define amdgpu_kernel void @s_input_output_i128() { 9 ; GFX908-LABEL: name: s_input_output_i128 10 ; GFX908: bb.0 (%ir-block.0): 11 ; GFX908-NEXT: INLINEASM &"; def $0", 1 /* sideeffect attdialect */, 7471114 /* regdef:SGPR_128 */, def %12 12 ; GFX908-NEXT: [[COPY:%[0-9]+]]:sgpr_128 = COPY %12 13 ; GFX908-NEXT: INLINEASM &"; use $0", 1 /* sideeffect attdialect */, 7471113 /* reguse:SGPR_128 */, [[COPY]] 14 ; GFX908-NEXT: S_ENDPGM 0 15 ; 16 ; GFX90A-LABEL: name: s_input_output_i128 17 ; GFX90A: bb.0 (%ir-block.0): 18 ; GFX90A-NEXT: INLINEASM &"; def $0", 1 /* sideeffect attdialect */, 7471114 /* regdef:SGPR_128 */, def %10 19 ; GFX90A-NEXT: [[COPY:%[0-9]+]]:sgpr_128 = COPY %10 20 ; GFX90A-NEXT: INLINEASM &"; use $0", 1 /* sideeffect attdialect */, 7471113 /* reguse:SGPR_128 */, [[COPY]] 21 ; GFX90A-NEXT: S_ENDPGM 0 22 %val = tail call i128 asm sideeffect "; def $0", "=s"() 23 call void asm sideeffect "; use $0", "s"(i128 %val) 24 ret void 25} 26 27define amdgpu_kernel void @v_input_output_i128() { 28 ; GFX908-LABEL: name: v_input_output_i128 29 ; GFX908: bb.0 (%ir-block.0): 30 ; GFX908-NEXT: INLINEASM &"; def $0", 1 /* sideeffect attdialect */, 6291466 /* regdef:VReg_128 */, def %12 31 ; GFX908-NEXT: [[COPY:%[0-9]+]]:vreg_128 = COPY %12 32 ; GFX908-NEXT: INLINEASM &"; use $0", 1 /* sideeffect attdialect */, 6291465 /* reguse:VReg_128 */, [[COPY]] 33 ; GFX908-NEXT: S_ENDPGM 0 34 ; 35 ; GFX90A-LABEL: name: v_input_output_i128 36 ; GFX90A: bb.0 (%ir-block.0): 37 ; GFX90A-NEXT: INLINEASM &"; def $0", 1 /* sideeffect attdialect */, 6619146 /* regdef:VReg_128_Align2 */, def %10 38 ; GFX90A-NEXT: [[COPY:%[0-9]+]]:vreg_128_align2 = COPY %10 39 ; GFX90A-NEXT: INLINEASM &"; use $0", 1 /* sideeffect attdialect */, 6619145 /* reguse:VReg_128_Align2 */, [[COPY]] 40 ; GFX90A-NEXT: S_ENDPGM 0 41 %val = tail call i128 asm sideeffect "; def $0", "=v"() 42 call void asm sideeffect "; use $0", "v"(i128 %val) 43 ret void 44} 45 46define amdgpu_kernel void @a_input_output_i128() { 47 ; GFX908-LABEL: name: a_input_output_i128 48 ; GFX908: bb.0 (%ir-block.0): 49 ; GFX908-NEXT: INLINEASM &"; def $0", 1 /* sideeffect attdialect */, 6225930 /* regdef:AReg_128 */, def %12 50 ; GFX908-NEXT: [[COPY:%[0-9]+]]:areg_128 = COPY %12 51 ; GFX908-NEXT: INLINEASM &"; use $0", 1 /* sideeffect attdialect */, 6225929 /* reguse:AReg_128 */, [[COPY]] 52 ; GFX908-NEXT: S_ENDPGM 0 53 ; 54 ; GFX90A-LABEL: name: a_input_output_i128 55 ; GFX90A: bb.0 (%ir-block.0): 56 ; GFX90A-NEXT: INLINEASM &"; def $0", 1 /* sideeffect attdialect */, 6488074 /* regdef:AReg_128_Align2 */, def %10 57 ; GFX90A-NEXT: [[COPY:%[0-9]+]]:areg_128_align2 = COPY %10 58 ; GFX90A-NEXT: INLINEASM &"; use $0", 1 /* sideeffect attdialect */, 6488073 /* reguse:AReg_128_Align2 */, [[COPY]] 59 ; GFX90A-NEXT: S_ENDPGM 0 60 %val = call i128 asm sideeffect "; def $0", "=a"() 61 call void asm sideeffect "; use $0", "a"(i128 %val) 62 ret void 63} 64