xref: /llvm-project/llvm/test/CodeGen/AMDGPU/hsa-func.ll (revision 4490003a22658dcd12527029b2c8682b63d8a9d6)
1; RUN: llc < %s -mtriple=amdgcn--amdhsa -mcpu=kaveri | FileCheck --check-prefix=HSA %s
2; RUN: llc < %s -mtriple=amdgcn--amdhsa -mcpu=kaveri | FileCheck --check-prefix=HSA-CI %s
3; RUN: llc < %s -mtriple=amdgcn--amdhsa -mcpu=carrizo  | FileCheck --check-prefix=HSA %s
4; RUN: llc < %s -mtriple=amdgcn--amdhsa -mcpu=carrizo | FileCheck --check-prefix=HSA-VI %s
5; RUN: llc < %s -mtriple=amdgcn--amdhsa -mcpu=kaveri -filetype=obj | llvm-readobj --symbols -S --sd - | FileCheck --check-prefix=ELF %s
6; RUN: llc < %s -mtriple=amdgcn--amdhsa -mcpu=kaveri | llvm-mc -filetype=obj -triple amdgcn--amdhsa --amdhsa-code-object-version=4 -mcpu=kaveri | llvm-readobj --symbols -S --sd - | FileCheck %s --check-prefix=ELF
7
8; The SHT_NOTE section contains the output from the .hsa_code_object_*
9; directives.
10
11; ELF: Section {
12; ELF: Name: .text
13; ELF: Type: SHT_PROGBITS (0x1)
14; ELF: Flags [ (0x6)
15; ELF: SHF_ALLOC (0x2)
16; ELF: SHF_EXECINSTR (0x4)
17; ELF: AddressAlignment: 4
18; ELF: }
19
20; ELF: SHT_NOTE
21; ELF: 0000: 07000000 4F000000 20000000 414D4447
22; ELF: 0010: 50550000 83AE616D 64687361 2E6B6572
23; ELF: 0020: 6E656C73 90AD616D 64687361 2E746172
24; ELF: 0030: 676574BD 616D6467 636E2D75 6E6B6E6F
25; ELF: 0040: 776E2D61 6D646873 612D2D67 66783730
26; ELF: 0050: 30AE616D 64687361 2E766572 73696F6E
27; ELF: 0060: 92010100
28
29; ELF: Symbol {
30; ELF: Name: simple
31; ELF: Size: 36
32; ELF: Type: Function (0x2)
33; ELF: }
34
35; HSA: .text
36; HSA-CI: .amdgcn_target "amdgcn-unknown-amdhsa--gfx700"
37; HSA-VI: .amdgcn_target "amdgcn-unknown-amdhsa--gfx801"
38
39; HSA-NOT: .amdgpu_hsa_kernel simple
40; HSA: .globl simple
41; HSA: .p2align 2
42; HSA: {{^}}simple:
43; HSA-NOT: amd_kernel_code_t
44; HSA: flat_load_dwordx2 v{{\[[0-9]+:[0-9]+\]}}, v[0:1]
45
46; Make sure we are setting the ATC bit:
47; Make sure we generate flat store for HSA
48; HSA: flat_store_dword v{{\[[0-9]+:[0-9]+\]}}, v{{[0-9]+}}
49
50; HSA: .Lfunc_end0:
51; HSA: .size   simple, .Lfunc_end0-simple
52; HSA: ; Function info:
53; HSA-NOT: COMPUTE_PGM_RSRC2
54define void @simple(ptr addrspace(4) %ptr.out) {
55entry:
56  %out = load ptr addrspace(1), ptr addrspace(4) %ptr.out
57  store i32 0, ptr addrspace(1) %out
58  ret void
59}
60
61; Ignore explicit alignment that is too low.
62; HSA: .globl simple_align2
63; HSA: .p2align 2
64define void @simple_align2(ptr addrspace(4) %ptr.out) align 2 {
65entry:
66  %out = load ptr addrspace(1), ptr addrspace(4) %ptr.out
67  store i32 0, ptr addrspace(1) %out
68  ret void
69}
70
71!llvm.module.flags = !{!0}
72!0 = !{i32 1, !"amdhsa_code_object_version", i32 400}
73