xref: /llvm-project/llvm/test/CodeGen/AMDGPU/greedy-reverse-local-assignment.ll (revision 6548b6354d1d990e1c98736f5e7c3de876bedc8e)
1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
2; RUN: llc -mtriple=amdgcn-amd-amdhsa -greedy-reverse-local-assignment=0 -mcpu=gfx900 < %s | FileCheck -check-prefixes=FORWARDXNACK %s
3; RUN: llc -mtriple=amdgcn-amd-amdhsa -greedy-reverse-local-assignment=1 -mcpu=gfx900 < %s | FileCheck -check-prefixes=REVERSEXNACK %s
4
5; RUN: llc -mtriple=amdgcn-amd-amdhsa -greedy-reverse-local-assignment=0 -mcpu=gfx900 -mattr=-xnack < %s | FileCheck -check-prefix=NOXNACK %s
6; RUN: llc -mtriple=amdgcn-amd-amdhsa -greedy-reverse-local-assignment=1 -mcpu=gfx900 -mattr=-xnack < %s | FileCheck -check-prefix=NOXNACK %s
7
8; Test the change in the behavior of the allocator with
9; -greedy-reverse-local-reassignment enabled. This case shows a
10; regression with it enabled if xnack is enabled.
11
12; The outgoing return physical register copies strongly hint the
13; output registers to use for the load return values, and end up
14; taking precedence over the copies from the incoming values with
15; reverse order. With the kills inserted to artifically extend the
16; pointer live ranges to hint the soft clause, we get worse
17; allocation and need the extra copies before the loads.
18define <4 x half> @shuffle_v4f16_234u(ptr addrspace(1) %arg0, ptr addrspace(1) %arg1) {
19; FORWARDXNACK-LABEL: shuffle_v4f16_234u:
20; FORWARDXNACK:       ; %bb.0:
21; FORWARDXNACK-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
22; FORWARDXNACK-NEXT:    global_load_dword v6, v[0:1], off offset:4
23; FORWARDXNACK-NEXT:    global_load_dwordx2 v[4:5], v[2:3], off
24; FORWARDXNACK-NEXT:    s_waitcnt vmcnt(1)
25; FORWARDXNACK-NEXT:    v_mov_b32_e32 v0, v6
26; FORWARDXNACK-NEXT:    s_waitcnt vmcnt(0)
27; FORWARDXNACK-NEXT:    v_mov_b32_e32 v1, v4
28; FORWARDXNACK-NEXT:    s_setpc_b64 s[30:31]
29;
30; REVERSEXNACK-LABEL: shuffle_v4f16_234u:
31; REVERSEXNACK:       ; %bb.0:
32; REVERSEXNACK-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
33; REVERSEXNACK-NEXT:    v_mov_b32_e32 v6, v1
34; REVERSEXNACK-NEXT:    v_mov_b32_e32 v5, v0
35; REVERSEXNACK-NEXT:    v_mov_b32_e32 v4, v3
36; REVERSEXNACK-NEXT:    v_mov_b32_e32 v3, v2
37; REVERSEXNACK-NEXT:    global_load_dword v0, v[5:6], off offset:4
38; REVERSEXNACK-NEXT:    global_load_dwordx2 v[1:2], v[3:4], off
39; REVERSEXNACK-NEXT:    s_waitcnt vmcnt(0)
40; REVERSEXNACK-NEXT:    s_setpc_b64 s[30:31]
41;
42; NOXNACK-LABEL: shuffle_v4f16_234u:
43; NOXNACK:       ; %bb.0:
44; NOXNACK-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
45; NOXNACK-NEXT:    global_load_dword v0, v[0:1], off offset:4
46; NOXNACK-NEXT:    global_load_dwordx2 v[1:2], v[2:3], off
47; NOXNACK-NEXT:    s_waitcnt vmcnt(0)
48; NOXNACK-NEXT:    s_setpc_b64 s[30:31]
49  %val0 = load <4 x half>, ptr addrspace(1) %arg0
50  %val1 = load <4 x half>, ptr addrspace(1) %arg1
51  %shuffle = shufflevector <4 x half> %val0, <4 x half> %val1, <4 x i32> <i32 2, i32 3, i32 4, i32 undef>
52  ret <4 x half> %shuffle
53}
54