xref: /llvm-project/llvm/test/CodeGen/AMDGPU/global-constant.ll (revision b1bcb7ca460fcd317bbc8309e14c8761bf8394e0)
1; RUN: llc -mtriple=amdgcn--amdpal -verify-machineinstrs < %s | FileCheck -check-prefixes=GCN,GCN-PAL %s
2; RUN: llc -mtriple=amdgcn-- -mcpu=kaveri -verify-machineinstrs < %s | FileCheck -check-prefixes=GCN,GCN-DEFAULT %s
3; RUN: llc -mtriple=amdgcn-mesa-mesa3d -mcpu=kaveri -verify-machineinstrs < %s | FileCheck -check-prefixes=GCN,GCN-MESA %s
4; RUN: llc -mtriple=amdgcn--amdhsa -mcpu=kaveri -verify-machineinstrs < %s | FileCheck -check-prefixes=GCN,GCN-DEFAULT %s
5; RUN: llc -mtriple=r600-- -mcpu=cypress -verify-machineinstrs < %s | FileCheck -check-prefix=R600 %s
6
7@private1 = private unnamed_addr addrspace(4) constant [4 x float] [float 0.0, float 1.0, float 2.0, float 3.0]
8@private2 = private unnamed_addr addrspace(4) constant [4 x float] [float 4.0, float 5.0, float 6.0, float 7.0]
9@available_externally = available_externally addrspace(4) global [256 x i32] zeroinitializer
10
11; GCN-LABEL: {{^}}private_test:
12
13; Non-R600 OSes use relocations.
14; GCN-DEFAULT: s_getpc_b64 s[[[PC0_LO:[0-9]+]]:[[PC0_HI:[0-9]+]]]
15; GCN-DEFAULT: s_add_u32 s{{[0-9]+}}, s[[PC0_LO]], private1@rel32@lo+4
16; GCN-DEFAULT: s_addc_u32 s{{[0-9]+}}, s[[PC0_HI]], private1@rel32@hi+12
17; GCN-DEFAULT: s_getpc_b64 s[[[PC1_LO:[0-9]+]]:[[PC1_HI:[0-9]+]]]
18; GCN-DEFAULT: s_add_u32 s{{[0-9]+}}, s[[PC1_LO]], private2@rel32@lo+4
19; GCN-DEFAULT: s_addc_u32 s{{[0-9]+}}, s[[PC1_HI]], private2@rel32@hi+12
20
21; MESA uses absolute relocations.
22; GCN-MESA: s_add_u32 s2, private1@abs32@lo, s4
23; GCN-MESA: s_addc_u32 s3, private1@abs32@hi, s5
24
25; PAL uses absolute relocations.
26; GCN-PAL:    s_add_u32 s2, private1@abs32@lo, s4
27; GCN-PAL:    s_addc_u32 s3, private1@abs32@hi, s5
28; GCN-PAL:    s_add_u32 s4, private2@abs32@lo, s4
29; GCN-PAL:    s_addc_u32 s5, private2@abs32@hi, s5
30
31; R600-LABEL: private_test
32define amdgpu_kernel void @private_test(i32 %index, ptr addrspace(1) %out) {
33  %ptr = getelementptr [4 x float], ptr addrspace(4) @private1, i32 0, i32 %index
34  %val = load float, ptr addrspace(4) %ptr
35  store volatile float %val, ptr addrspace(1) %out
36  %ptr2 = getelementptr [4 x float], ptr addrspace(4) @private2, i32 0, i32 %index
37  %val2 = load float, ptr addrspace(4) %ptr2
38  store volatile float %val2, ptr addrspace(1) %out
39  ret void
40}
41
42; GCN-LABEL: {{^}}available_externally_test:
43; GCN-DEFAULT: s_getpc_b64 s[[[PC0_LO:[0-9]+]]:[[PC0_HI:[0-9]+]]]
44; GCN-DEFAULT: s_add_u32 s{{[0-9]+}}, s[[PC0_LO]], available_externally@gotpcrel32@lo+4
45; GCN-DEFAULT: s_addc_u32 s{{[0-9]+}}, s[[PC0_HI]], available_externally@gotpcrel32@hi+12
46
47; GCN-MESA:    s_mov_b32 s1, available_externally@abs32@hi
48; GCN-MESA:    s_mov_b32 s0, available_externally@abs32@lo
49
50; R600-LABEL: available_externally_test
51
52; GCN-PAL:    s_mov_b32 s1, available_externally@abs32@hi
53; GCN-PAL:    s_mov_b32 s0, available_externally@abs32@lo
54define amdgpu_kernel void @available_externally_test(ptr addrspace(1) %out) {
55  %ptr = getelementptr [256 x i32], ptr addrspace(4) @available_externally, i32 0, i32 1
56  %val = load i32, ptr addrspace(4) %ptr
57  store i32 %val, ptr addrspace(1) %out
58  ret void
59}
60
61; GCN: .section .rodata
62; R600: .text
63
64; GCN: private1:
65; GCN: private2:
66; R600: private1:
67; R600: private2:
68