xref: /llvm-project/llvm/test/CodeGen/AMDGPU/fp_to_uint.f64.ll (revision 9e9907f1cfa424366fba58d9520f9305b537cec9)
1; RUN: llc -mtriple=amdgcn -verify-machineinstrs < %s | FileCheck -check-prefix=SI %s
2; RUN: llc -mtriple=amdgcn -mcpu=bonaire -verify-machineinstrs < %s | FileCheck -check-prefix=CI -check-prefix=FUNC %s
3
4declare i32 @llvm.amdgcn.workitem.id.x() #1
5declare double @llvm.fabs.f64(double) #1
6
7; SI-LABEL: {{^}}fp_to_uint_i32_f64:
8; SI: v_cvt_u32_f64_e32
9define amdgpu_kernel void @fp_to_uint_i32_f64(ptr addrspace(1) %out, double %in) {
10  %cast = fptoui double %in to i32
11  store i32 %cast, ptr addrspace(1) %out, align 4
12  ret void
13}
14
15; SI-LABEL: @fp_to_uint_v2i32_v2f64
16; SI: v_cvt_u32_f64_e32
17; SI: v_cvt_u32_f64_e32
18define amdgpu_kernel void @fp_to_uint_v2i32_v2f64(ptr addrspace(1) %out, <2 x double> %in) {
19  %cast = fptoui <2 x double> %in to <2 x i32>
20  store <2 x i32> %cast, ptr addrspace(1) %out, align 8
21  ret void
22}
23
24; SI-LABEL: @fp_to_uint_v4i32_v4f64
25; SI: v_cvt_u32_f64_e32
26; SI: v_cvt_u32_f64_e32
27; SI: v_cvt_u32_f64_e32
28; SI: v_cvt_u32_f64_e32
29define amdgpu_kernel void @fp_to_uint_v4i32_v4f64(ptr addrspace(1) %out, <4 x double> %in) {
30  %cast = fptoui <4 x double> %in to <4 x i32>
31  store <4 x i32> %cast, ptr addrspace(1) %out, align 8
32  ret void
33}
34
35; FUNC-LABEL: @fp_to_uint_i64_f64
36; CI-DAG: buffer_load_dwordx2 [[VAL:v\[[0-9]+:[0-9]+\]]]
37; CI-DAG: v_trunc_f64_e32 [[TRUNC:v\[[0-9]+:[0-9]+\]]], [[VAL]]
38; CI-DAG: s_movk_i32 [[K0_EXP:s[0-9]+]], 0xffe0
39
40; CI-DAG: v_ldexp_f64 [[MUL:v\[[0-9]+:[0-9]+\]]], [[VAL]], [[K0_EXP]]
41; CI-DAG: v_floor_f64_e32 [[FLOOR:v\[[0-9]+:[0-9]+\]]], [[MUL]]
42
43; CI-DAG: s_mov_b32 s[[K1_HI:[0-9]+]], 0xc1f00000
44
45; CI-DAG: v_fma_f64 [[FMA:v\[[0-9]+:[0-9]+\]]], [[FLOOR]], s{{\[[0-9]+}}:[[K1_HI]]], [[TRUNC]]
46; CI-DAG: v_cvt_u32_f64_e32 v[[LO:[0-9]+]], [[FMA]]
47; CI-DAG: v_cvt_u32_f64_e32 v[[HI:[0-9]+]], [[FLOOR]]
48; CI: buffer_store_dwordx2 v[[[LO]]:[[HI]]]
49define amdgpu_kernel void @fp_to_uint_i64_f64(ptr addrspace(1) %out, ptr addrspace(1) %in) {
50  %tid = call i32 @llvm.amdgcn.workitem.id.x() nounwind readnone
51  %gep = getelementptr double, ptr addrspace(1) %in, i32 %tid
52  %val = load double, ptr addrspace(1) %gep, align 8
53  %cast = fptoui double %val to i64
54  store i64 %cast, ptr addrspace(1) %out, align 4
55  ret void
56}
57
58; SI-LABEL: @fp_to_uint_v2i64_v2f64
59define amdgpu_kernel void @fp_to_uint_v2i64_v2f64(ptr addrspace(1) %out, <2 x double> %in) {
60  %cast = fptoui <2 x double> %in to <2 x i64>
61  store <2 x i64> %cast, ptr addrspace(1) %out, align 16
62  ret void
63}
64
65; SI-LABEL: @fp_to_uint_v4i64_v4f64
66define amdgpu_kernel void @fp_to_uint_v4i64_v4f64(ptr addrspace(1) %out, <4 x double> %in) {
67  %cast = fptoui <4 x double> %in to <4 x i64>
68  store <4 x i64> %cast, ptr addrspace(1) %out, align 32
69  ret void
70}
71
72; FUNC-LABEL: {{^}}fp_to_uint_f64_to_i1:
73; SI: v_cmp_eq_f64_e64 s{{\[[0-9]+:[0-9]+\]}}, 1.0, s{{\[[0-9]+:[0-9]+\]}}
74define amdgpu_kernel void @fp_to_uint_f64_to_i1(ptr addrspace(1) %out, double %in) #0 {
75  %conv = fptoui double %in to i1
76  store i1 %conv, ptr addrspace(1) %out
77  ret void
78}
79
80; FUNC-LABEL: {{^}}fp_to_uint_fabs_f64_to_i1:
81; SI: v_cmp_eq_f64_e64 s{{\[[0-9]+:[0-9]+\]}}, 1.0, |s{{\[[0-9]+:[0-9]+\]}}|
82define amdgpu_kernel void @fp_to_uint_fabs_f64_to_i1(ptr addrspace(1) %out, double %in) #0 {
83  %in.fabs = call double @llvm.fabs.f64(double %in)
84  %conv = fptoui double %in.fabs to i1
85  store i1 %conv, ptr addrspace(1) %out
86  ret void
87}
88
89attributes #0 = { nounwind }
90attributes #1 = { nounwind readnone }
91