xref: /llvm-project/llvm/test/CodeGen/AMDGPU/fp-atomics-gfx950.ll (revision 5a81a559d69fb84e1e8ef623ac4b642081c14c51) 
1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 5
2; RUN: llc < %s -mtriple=amdgcn -mcpu=gfx950 -global-isel=0 | FileCheck %s -check-prefix=GFX950-SDAG
3; RUN: llc < %s -mtriple=amdgcn -mcpu=gfx950 -global-isel=1 -global-isel-abort=2 | FileCheck %s -check-prefix=GFX950-GISEL
4
5declare <2 x bfloat> @llvm.amdgcn.struct.buffer.atomic.fadd.v2bf16(<2 x bfloat>, <4 x i32>, i32, i32, i32, i32 immarg)
6declare <2 x bfloat> @llvm.amdgcn.raw.buffer.atomic.fadd.v2bf16(<2 x bfloat> %val, <4 x i32> %rsrc, i32, i32, i32)
7
8define amdgpu_ps float @struct_buffer_atomic_add_v2bf16_ret(<2 x bfloat> %val, <4 x i32> inreg %rsrc, i32 %vindex, i32 %voffset, i32 inreg %soffset) {
9; GFX950-SDAG-LABEL: struct_buffer_atomic_add_v2bf16_ret:
10; GFX950-SDAG:       ; %bb.0:
11; GFX950-SDAG-NEXT:    v_mov_b32_e32 v3, v2
12; GFX950-SDAG-NEXT:    v_mov_b32_e32 v2, v1
13; GFX950-SDAG-NEXT:    buffer_atomic_pk_add_bf16 v0, v[2:3], s[0:3], s4 idxen offen sc0
14; GFX950-SDAG-NEXT:    v_mov_b64_e32 v[2:3], 0
15; GFX950-SDAG-NEXT:    s_waitcnt vmcnt(0)
16; GFX950-SDAG-NEXT:    flat_store_dword v[2:3], v0
17; GFX950-SDAG-NEXT:    v_mov_b32_e32 v0, 1.0
18; GFX950-SDAG-NEXT:    s_waitcnt vmcnt(0) lgkmcnt(0)
19; GFX950-SDAG-NEXT:    ; return to shader part epilog
20;
21; GFX950-GISEL-LABEL: struct_buffer_atomic_add_v2bf16_ret:
22; GFX950-GISEL:       ; %bb.0:
23; GFX950-GISEL-NEXT:    v_mov_b32_e32 v3, v2
24; GFX950-GISEL-NEXT:    v_mov_b32_e32 v2, v1
25; GFX950-GISEL-NEXT:    buffer_atomic_pk_add_bf16 v0, v[2:3], s[0:3], s4 idxen offen sc0
26; GFX950-GISEL-NEXT:    v_mov_b64_e32 v[2:3], 0
27; GFX950-GISEL-NEXT:    s_waitcnt vmcnt(0)
28; GFX950-GISEL-NEXT:    flat_store_dword v[2:3], v0
29; GFX950-GISEL-NEXT:    v_mov_b32_e32 v0, 1.0
30; GFX950-GISEL-NEXT:    s_waitcnt vmcnt(0) lgkmcnt(0)
31; GFX950-GISEL-NEXT:    ; return to shader part epilog
32  %orig = call <2 x bfloat> @llvm.amdgcn.struct.buffer.atomic.fadd.v2bf16(<2 x bfloat> %val, <4 x i32> %rsrc, i32 %vindex, i32 %voffset, i32 %soffset, i32 0)
33  store <2 x bfloat> %orig, ptr null
34  ret float 1.0
35}
36
37define amdgpu_ps void @struct_buffer_atomic_add_v2bf16_noret(<2 x bfloat> %val, <4 x i32> inreg %rsrc, i32 %vindex, i32 %voffset, i32 inreg %soffset) {
38; GFX950-SDAG-LABEL: struct_buffer_atomic_add_v2bf16_noret:
39; GFX950-SDAG:       ; %bb.0:
40; GFX950-SDAG-NEXT:    v_mov_b32_e32 v3, v2
41; GFX950-SDAG-NEXT:    v_mov_b32_e32 v2, v1
42; GFX950-SDAG-NEXT:    buffer_atomic_pk_add_bf16 v0, v[2:3], s[0:3], s4 idxen offen
43; GFX950-SDAG-NEXT:    s_endpgm
44;
45; GFX950-GISEL-LABEL: struct_buffer_atomic_add_v2bf16_noret:
46; GFX950-GISEL:       ; %bb.0:
47; GFX950-GISEL-NEXT:    v_mov_b32_e32 v3, v2
48; GFX950-GISEL-NEXT:    v_mov_b32_e32 v2, v1
49; GFX950-GISEL-NEXT:    buffer_atomic_pk_add_bf16 v0, v[2:3], s[0:3], s4 idxen offen
50; GFX950-GISEL-NEXT:    s_endpgm
51  %orig = call <2 x bfloat> @llvm.amdgcn.struct.buffer.atomic.fadd.v2bf16(<2 x bfloat> %val, <4 x i32> %rsrc, i32 %vindex, i32 %voffset, i32 %soffset, i32 0)
52  ret void
53}
54
55define amdgpu_ps void @raw_buffer_atomic_add_v2bf16(<2 x bfloat> %val, <4 x i32> inreg %rsrc, i32 %voffset, i32 inreg %soffset) {
56; GFX950-SDAG-LABEL: raw_buffer_atomic_add_v2bf16:
57; GFX950-SDAG:       ; %bb.0:
58; GFX950-SDAG-NEXT:    buffer_atomic_pk_add_bf16 v0, v1, s[0:3], s4 offen
59; GFX950-SDAG-NEXT:    s_endpgm
60;
61; GFX950-GISEL-LABEL: raw_buffer_atomic_add_v2bf16:
62; GFX950-GISEL:       ; %bb.0:
63; GFX950-GISEL-NEXT:    buffer_atomic_pk_add_bf16 v0, v1, s[0:3], s4 offen
64; GFX950-GISEL-NEXT:    s_endpgm
65  %ret = call <2 x bfloat> @llvm.amdgcn.raw.buffer.atomic.fadd.v2bf16(<2 x bfloat> %val, <4 x i32> %rsrc, i32 %voffset, i32 %soffset, i32 0)
66  ret void
67}
68
69define amdgpu_ps float @raw_buffer_atomic_add_v2bf16_ret(<2 x bfloat> %val, <4 x i32> inreg %rsrc, i32 %voffset, i32 inreg %soffset) {
70; GFX950-SDAG-LABEL: raw_buffer_atomic_add_v2bf16_ret:
71; GFX950-SDAG:       ; %bb.0:
72; GFX950-SDAG-NEXT:    buffer_atomic_pk_add_bf16 v0, v1, s[0:3], s4 offen sc0
73; GFX950-SDAG-NEXT:    v_mov_b64_e32 v[2:3], 0
74; GFX950-SDAG-NEXT:    s_waitcnt vmcnt(0)
75; GFX950-SDAG-NEXT:    flat_store_dword v[2:3], v0
76; GFX950-SDAG-NEXT:    v_mov_b32_e32 v0, 1.0
77; GFX950-SDAG-NEXT:    s_waitcnt vmcnt(0) lgkmcnt(0)
78; GFX950-SDAG-NEXT:    ; return to shader part epilog
79;
80; GFX950-GISEL-LABEL: raw_buffer_atomic_add_v2bf16_ret:
81; GFX950-GISEL:       ; %bb.0:
82; GFX950-GISEL-NEXT:    buffer_atomic_pk_add_bf16 v0, v1, s[0:3], s4 offen sc0
83; GFX950-GISEL-NEXT:    v_mov_b64_e32 v[2:3], 0
84; GFX950-GISEL-NEXT:    s_waitcnt vmcnt(0)
85; GFX950-GISEL-NEXT:    flat_store_dword v[2:3], v0
86; GFX950-GISEL-NEXT:    v_mov_b32_e32 v0, 1.0
87; GFX950-GISEL-NEXT:    s_waitcnt vmcnt(0) lgkmcnt(0)
88; GFX950-GISEL-NEXT:    ; return to shader part epilog
89  %orig = call <2 x bfloat> @llvm.amdgcn.raw.buffer.atomic.fadd.v2bf16(<2 x bfloat> %val, <4 x i32> %rsrc, i32 %voffset, i32 %soffset, i32 0)
90  store <2 x bfloat> %orig, ptr null
91  ret float 1.0
92}
93