1; RUN: llc -mtriple=amdgcn -stop-after=amdgpu-isel < %s | FileCheck -enable-var-scope -check-prefixes=GCN,SI %s 2; RUN: llc -mtriple=amdgcn -mcpu=gfx900 -stop-after=amdgpu-isel < %s | FileCheck -enable-var-scope -check-prefixes=GCN,GFX900 %s 3; RUN: llc -mtriple=amdgcn -enable-new-pm -stop-after=amdgpu-isel < %s | FileCheck -enable-var-scope -check-prefixes=GCN,SI %s 4; RUN: llc -mtriple=amdgcn -mcpu=gfx900 -enable-new-pm -stop-after=amdgpu-isel < %s | FileCheck -enable-var-scope -check-prefixes=GCN,GFX900 %s 5 6; GCN-LABEL: name: uniform_add_SIC 7; GCN: S_SUB_I32 killed %{{[0-9]+}}, 32 8define amdgpu_kernel void @uniform_add_SIC(ptr addrspace(1) %out, ptr addrspace(1) %in) #0 { 9 %a = load i32, ptr addrspace(1) %in 10 %result = add i32 %a, -32 11 store i32 %result, ptr addrspace(1) %out 12 ret void 13} 14 15; GCN-LABEL: name: divergent_add_SIC 16; SI: V_SUB_CO_U32_e64 killed %{{[0-9]+}}, 32 17; GFX900: V_SUB_U32_e64 killed %{{[0-9]+}}, 32 18define amdgpu_kernel void @divergent_add_SIC(ptr addrspace(1) %out, ptr addrspace(1) %in) #0 { 19 %tid = call i32 @llvm.amdgcn.workitem.id.x() 20 %gep = getelementptr inbounds i32, ptr addrspace(1) %in, i32 %tid 21 %a = load volatile i32, ptr addrspace(1) %gep 22 %result = add i32 %a, -32 23 store i32 %result, ptr addrspace(1) %out 24 ret void 25} 26 27declare i32 @llvm.amdgcn.workitem.id.x() #1 28 29attributes #0 = { nounwind } 30attributes #1 = { nounwind readnone speculatable } 31