1; RUN: llc -O0 -mtriple=amdgcn-amd-amdhsa -mcpu=gfx900 < %s | FileCheck %s 2 3; CallGraphAnalysis, which CodeGenSCC order depends on, does not look 4; through aliases. If GlobalOpt is never run, we do not see direct 5; calls, 6 7@alias2 = hidden alias void (), ptr @aliasee_vgpr64_sgpr102 8 9; CHECK-LABEL: {{^}}kernel2: 10; CHECK: .amdhsa_next_free_vgpr max(totalnumvgprs(kernel2.num_agpr, kernel2.num_vgpr), 1, 0) 11; CHECK-NEXT: .amdhsa_next_free_sgpr (max(kernel2.numbered_sgpr+(extrasgprs(kernel2.uses_vcc, kernel2.uses_flat_scratch, 1)), 1, 0))-(extrasgprs(kernel2.uses_vcc, kernel2.uses_flat_scratch, 1)) 12 13; CHECK: .set kernel2.num_vgpr, max(41, .Laliasee_vgpr64_sgpr102.num_vgpr) 14; CHECK-NEXT: .set kernel2.num_agpr, max(0, .Laliasee_vgpr64_sgpr102.num_agpr) 15; CHECK-NEXT: .set kernel2.numbered_sgpr, max(33, .Laliasee_vgpr64_sgpr102.numbered_sgpr) 16define amdgpu_kernel void @kernel2() #0 { 17bb: 18 call void @alias2() #2 19 ret void 20} 21 22; CHECK: .set .Laliasee_vgpr64_sgpr102.num_vgpr, 53 23; CHECK-NEXT: .set .Laliasee_vgpr64_sgpr102.num_agpr, 0 24; CHECK-NEXT: .set .Laliasee_vgpr64_sgpr102.numbered_sgpr, 32 25define internal void @aliasee_vgpr64_sgpr102() #1 { 26bb: 27 call void asm sideeffect "; clobber v52 ", "~{v52}"() 28 ret void 29} 30 31attributes #0 = { noinline norecurse nounwind optnone } 32attributes #1 = { noinline norecurse nounwind readnone willreturn "amdgpu-waves-per-eu"="4,10" } 33attributes #2 = { nounwind readnone willreturn } 34 35!llvm.module.flags = !{!0} 36!0 = !{i32 1, !"amdhsa_code_object_version", i32 500} 37