1; RUN: llc -O0 -mtriple=amdgcn-amd-amdhsa -mcpu=gfx900 < %s | FileCheck %s 2 3; CallGraphAnalysis, which CodeGenSCC order depends on, does not look 4; through aliases. If GlobalOpt is never run, we do not see direct 5; calls, 6 7@alias1 = hidden alias void (), ptr @aliasee_vgpr32_sgpr76 8 9; The parent kernel has a higher VGPR usage than the possible callees. 10 11; CHECK-LABEL: {{^}}kernel1: 12; CHECK: .amdhsa_next_free_vgpr max(totalnumvgprs(kernel1.num_agpr, kernel1.num_vgpr), 1, 0) 13; CHECK-NEXT: .amdhsa_next_free_sgpr (max(kernel1.numbered_sgpr+(extrasgprs(kernel1.uses_vcc, kernel1.uses_flat_scratch, 1)), 1, 0))-(extrasgprs(kernel1.uses_vcc, kernel1.uses_flat_scratch, 1)) 14 15; CHECK: .set kernel1.num_vgpr, max(42, .Laliasee_vgpr32_sgpr76.num_vgpr) 16; CHECK-NEXT: .set kernel1.num_agpr, max(0, .Laliasee_vgpr32_sgpr76.num_agpr) 17; CHECK-NEXT: .set kernel1.numbered_sgpr, max(33, .Laliasee_vgpr32_sgpr76.numbered_sgpr) 18define amdgpu_kernel void @kernel1() #0 { 19bb: 20 call void asm sideeffect "; clobber v40 ", "~{v40}"() 21 call void @alias1() #2 22 ret void 23} 24 25; CHECK: .set .Laliasee_vgpr32_sgpr76.num_vgpr, 27 26; CHECK-NEXT: .set .Laliasee_vgpr32_sgpr76.num_agpr, 0 27; CHECK-NEXT: .set .Laliasee_vgpr32_sgpr76.numbered_sgpr, 32 28define internal void @aliasee_vgpr32_sgpr76() #1 { 29bb: 30 call void asm sideeffect "; clobber v26 ", "~{v26}"() 31 ret void 32} 33 34attributes #0 = { noinline norecurse nounwind optnone } 35attributes #1 = { noinline norecurse nounwind readnone willreturn "amdgpu-waves-per-eu"="8,10" } 36attributes #2 = { nounwind readnone willreturn } 37 38!llvm.module.flags = !{!0} 39!0 = !{i32 1, !"amdhsa_code_object_version", i32 500} 40