1; RUN: llc -O0 -mtriple=amdgcn-amd-amdhsa -mcpu=gfx900 < %s | FileCheck %s 2 3; CallGraphAnalysis, which CodeGenSCC order depends on, does not look 4; through aliases. If GlobalOpt is never run, we do not see direct 5; calls, 6 7@alias0 = hidden alias void (), ptr @aliasee_default_vgpr64_sgpr102 8 9; CHECK-LABEL: {{^}}kernel0: 10; CHECK: .set kernel0.num_vgpr, max(41, .Laliasee_default_vgpr64_sgpr102.num_vgpr) 11; CHECK-NEXT: .set kernel0.num_agpr, max(0, .Laliasee_default_vgpr64_sgpr102.num_agpr) 12; CHECK-NEXT: .set kernel0.numbered_sgpr, max(33, .Laliasee_default_vgpr64_sgpr102.numbered_sgpr) 13define amdgpu_kernel void @kernel0() #0 { 14bb: 15 call void @alias0() #2 16 ret void 17} 18 19; CHECK: .set .Laliasee_default_vgpr64_sgpr102.num_vgpr, 53 20; CHECK-NEXT: .set .Laliasee_default_vgpr64_sgpr102.num_agpr, 0 21; CHECK-NEXT: .set .Laliasee_default_vgpr64_sgpr102.numbered_sgpr, 32 22define internal void @aliasee_default_vgpr64_sgpr102() #1 { 23bb: 24 call void asm sideeffect "; clobber v52 ", "~{v52}"() 25 ret void 26} 27 28attributes #0 = { noinline norecurse nounwind optnone } 29attributes #1 = { noinline norecurse nounwind readnone willreturn } 30attributes #2 = { nounwind readnone willreturn } 31 32!llvm.module.flags = !{!0} 33!0 = !{i32 1, !"amdhsa_code_object_version", i32 500} 34