11590cac4SJay Foad; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 3 2*9e9907f1SFangrui Song; RUN: llc -mtriple=amdgcn -mcpu=gfx1030 < %s | FileCheck %s 31590cac4SJay Foad 41590cac4SJay Foaddefine amdgpu_cs <2 x i32> @f() { 51590cac4SJay Foad; CHECK-LABEL: f: 61590cac4SJay Foad; CHECK: ; %bb.0: ; %bb 733565750SPierre van Houtryve; CHECK-NEXT: s_mov_b32 s4, 0 833565750SPierre van Houtryve; CHECK-NEXT: s_mov_b32 s5, s4 933565750SPierre van Houtryve; CHECK-NEXT: s_mov_b32 s6, s4 1033565750SPierre van Houtryve; CHECK-NEXT: s_mov_b32 s7, s4 1133565750SPierre van Houtryve; CHECK-NEXT: s_mov_b32 s0, s4 1233565750SPierre van Houtryve; CHECK-NEXT: buffer_load_dwordx2 v[0:1], off, s[4:7], 0 1333565750SPierre van Houtryve; CHECK-NEXT: s_mov_b32 s1, s4 141590cac4SJay Foad; CHECK-NEXT: s_waitcnt vmcnt(0) 1533565750SPierre van Houtryve; CHECK-NEXT: v_cmp_ne_u64_e32 vcc_lo, s[0:1], v[0:1] 1633565750SPierre van Houtryve; CHECK-NEXT: v_mov_b32_e32 v1, s4 1733565750SPierre van Houtryve; CHECK-NEXT: s_mov_b32 s1, 0 1833565750SPierre van Houtryve; CHECK-NEXT: v_cndmask_b32_e64 v0, 0, 1, vcc_lo 1933565750SPierre van Houtryve; CHECK-NEXT: v_readfirstlane_b32 s0, v0 2033565750SPierre van Houtryve; CHECK-NEXT: buffer_store_dwordx2 v[0:1], off, s[4:7], 0 211590cac4SJay Foad; CHECK-NEXT: ; return to shader part epilog 221590cac4SJay Foadbb: 231590cac4SJay Foad %i = call <2 x i32> @llvm.amdgcn.raw.buffer.load.v2i32(<4 x i32> zeroinitializer, i32 0, i32 0, i32 0) 241590cac4SJay Foad %i1 = bitcast <2 x i32> %i to i64 251590cac4SJay Foad %i2 = insertelement <3 x i64> zeroinitializer, i64 %i1, i64 2 261590cac4SJay Foad %i3 = icmp ne <3 x i64> %i2, zeroinitializer 271590cac4SJay Foad %i4 = zext <3 x i1> %i3 to <3 x i64> 281590cac4SJay Foad %i5 = bitcast <3 x i64> %i4 to <6 x i32> 291590cac4SJay Foad %i6 = shufflevector <6 x i32> %i5, <6 x i32> zeroinitializer, <2 x i32> <i32 4, i32 5> 301590cac4SJay Foad call void @llvm.amdgcn.raw.buffer.store.v2i32(<2 x i32> %i6, <4 x i32> zeroinitializer, i32 0, i32 0, i32 0) 311590cac4SJay Foad ret <2 x i32> %i6 321590cac4SJay Foad} 331590cac4SJay Foad 341590cac4SJay Foaddeclare <2 x i32> @llvm.amdgcn.raw.buffer.load.v2i32(<4 x i32>, i32, i32, i32 immarg) 351590cac4SJay Foaddeclare void @llvm.amdgcn.raw.buffer.store.v2i32(<2 x i32>, <4 x i32>, i32, i32, i32 immarg) 36