xref: /llvm-project/llvm/test/CodeGen/AMDGPU/basic-branch.ll (revision a82032918cd445e5750e171f57d4f3d7096c021a)
1; RUN: llc -O0 -mtriple=amdgcn -verify-machineinstrs < %s | FileCheck -enable-var-scope -check-prefix=GCNNOOPT -check-prefix=GCN %s
2; RUN: llc -O0 -mtriple=amdgcn -mcpu=tonga -mattr=-flat-for-global -verify-machineinstrs < %s | FileCheck -enable-var-scope  -check-prefix=GCNNOOPT -check-prefix=GCN %s
3; RUN: llc -O0 -mtriple=amdgcn -mcpu=gfx1010 -mattr=-flat-for-global,+wavefrontsize64 -verify-machineinstrs < %s | FileCheck -enable-var-scope -check-prefix=GCNNOOPT -check-prefix=GCN %s
4; RUN: llc -O0 -mtriple=amdgcn -mcpu=gfx1100 -mattr=-flat-for-global,+wavefrontsize64 -verify-machineinstrs < %s | FileCheck -enable-var-scope -check-prefix=GCNNOOPT -check-prefix=GCN %s
5; RUN: llc -mtriple=amdgcn -verify-machineinstrs < %s | FileCheck -enable-var-scope -check-prefix=GCNOPT -check-prefix=GCN %s
6; RUN: llc -mtriple=amdgcn -mcpu=tonga -mattr=-flat-for-global -verify-machineinstrs < %s | FileCheck -enable-var-scope -check-prefix=GCNOPT -check-prefix=GCN %s
7
8; GCN-LABEL: {{^}}test_branch:
9; GCNNOOPT: v_writelane_b32
10; GCNNOOPT: v_writelane_b32
11; GCN: s_cbranch_scc1 [[END:.LBB[0-9]+_[0-9]+]]
12
13; GCNNOOPT: v_readlane_b32
14; GCNNOOPT: v_readlane_b32
15; GCN: buffer_store_{{dword|b32}}
16; GCNNOOPT: s_endpgm
17
18; GCN: {{^}}[[END]]:
19; GCN: s_endpgm
20define amdgpu_kernel void @test_branch(ptr addrspace(1) noalias %out, ptr addrspace(1) noalias %in, i32 %val) #0 {
21  %cmp = icmp ne i32 %val, 0
22  br i1 %cmp, label %store, label %end
23
24store:
25  store i32 222, ptr addrspace(1) %out
26  ret void
27
28end:
29  ret void
30}
31
32; GCN-LABEL: {{^}}test_brcc_i1:
33; GCN: s_load_{{dword|b32}} [[VAL:s[0-9]+]]
34; GCNNOOPT: s_mov_b32 [[ONE:s[0-9]+]], 1{{$}}
35; GCNNOOPT: s_and_b32 s{{[0-9]+}}, [[VAL]], [[ONE]]
36; GCNOPT:   s_bitcmp0_b32 [[VAL]], 0
37; GCNNOOPT: s_cmp_eq_u32
38; GCN: s_cbranch_scc1 [[END:.LBB[0-9]+_[0-9]+]]
39
40; GCN: buffer_store_{{dword|b32}}
41
42; GCN: {{^}}[[END]]:
43; GCN: s_endpgm
44define amdgpu_kernel void @test_brcc_i1(ptr addrspace(1) noalias %out, ptr addrspace(1) noalias %in, i1 %val) #0 {
45  %cmp0 = icmp ne i1 %val, 0
46  br i1 %cmp0, label %store, label %end
47
48store:
49  store i32 222, ptr addrspace(1) %out
50  ret void
51
52end:
53  ret void
54}
55
56attributes #0 = { nounwind }
57