xref: /llvm-project/llvm/test/CodeGen/AMDGPU/any_extend_vector_inreg.ll (revision 9e9907f1cfa424366fba58d9520f9305b537cec9)
1; RUN: llc -mtriple=amdgcn -verify-machineinstrs < %s | FileCheck -check-prefix=GCN %s
2; RUN: llc -mtriple=amdgcn -mcpu=fiji -verify-machineinstrs < %s | FileCheck -check-prefix=GCN %s
3
4; GCN-LABEL: {{^}}any_extend_vector_inreg_v16i8_to_v4i32:
5; GCN: s_load_dwordx8
6; GCN-DAG: s_load_dword
7
8; GCN: {{buffer|flat}}_store_byte
9; GCN: {{buffer|flat}}_store_byte
10; GCN: {{buffer|flat}}_store_byte
11; GCN: {{buffer|flat}}_store_byte
12
13; GCN: {{buffer|flat}}_store_byte
14; GCN: {{buffer|flat}}_store_byte
15; GCN: {{buffer|flat}}_store_byte
16; GCN: {{buffer|flat}}_store_byte
17
18; GCN: {{buffer|flat}}_store_byte
19; GCN: {{buffer|flat}}_store_byte
20; GCN: {{buffer|flat}}_store_byte
21; GCN: {{buffer|flat}}_store_byte
22
23; GCN: {{buffer|flat}}_store_byte
24; GCN: {{buffer|flat}}_store_byte
25; GCN: {{buffer|flat}}_store_byte
26; GCN: {{buffer|flat}}_store_byte
27define amdgpu_kernel void @any_extend_vector_inreg_v16i8_to_v4i32(ptr addrspace(1) nocapture readonly %arg, ptr addrspace(1) %arg1) local_unnamed_addr #0 {
28bb:
29  %tmp2 = load <16 x i8>, ptr addrspace(1) %arg, align 16
30  %tmp3 = extractelement <16 x i8> %tmp2, i64 4
31  %tmp6 = extractelement <16 x i8> %tmp2, i64 11
32  %tmp10 = getelementptr inbounds <8 x i8>, ptr addrspace(1) %arg, i64 2
33  %tmp12 = load <16 x i8>, ptr addrspace(1) %tmp10, align 16
34  %tmp13 = extractelement <16 x i8> %tmp12, i64 7
35  %tmp17 = extractelement <16 x i8> %tmp12, i64 12
36  %tmp21 = getelementptr inbounds <8 x i8>, ptr addrspace(1) %arg, i64 4
37  %tmp23 = load <16 x i8>, ptr addrspace(1) %tmp21, align 16
38  %tmp24 = extractelement <16 x i8> %tmp23, i64 3
39  %tmp1 = insertelement <16 x i8> undef, i8 %tmp3, i32 2
40  %tmp4 = insertelement <16 x i8> %tmp1, i8 0, i32 3
41  %tmp5 = insertelement <16 x i8> %tmp4, i8 0, i32 4
42  %tmp7 = insertelement <16 x i8> %tmp5, i8 %tmp6, i32 5
43  %tmp8 = insertelement <16 x i8> %tmp7, i8 0, i32 6
44  %tmp9 = insertelement <16 x i8> %tmp8, i8 %tmp13, i32 7
45  %tmp14 = insertelement <16 x i8> %tmp9, i8 0, i32 8
46  %tmp15 = insertelement <16 x i8> %tmp14, i8 %tmp17, i32 9
47  %tmp16 = insertelement <16 x i8> %tmp15, i8 0, i32 10
48  %tmp18 = insertelement <16 x i8> %tmp16, i8 0, i32 11
49  %tmp19 = insertelement <16 x i8> %tmp18, i8 %tmp24, i32 12
50  store <16 x i8> %tmp19, ptr addrspace(1) %arg1, align 1
51  ret void
52}
53
54attributes #0 = { nounwind }
55