1; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --check-globals all --version 4 2; RUN: opt < %s -passes=amdgpu-sw-lower-lds -amdgpu-asan-instrument-lds=false -S -mtriple=amdgcn-amd-amdhsa | FileCheck %s 3 4; Test to check malloc and free blocks are placed correctly when multiple 5; blocks and branching is present in the function with LDS accesses lowered correctly. 6 7@lds_1 = internal addrspace(3) global i32 poison 8@lds_2 = internal addrspace(3) global i32 poison 9 10;. 11; CHECK: @llvm.amdgcn.sw.lds.test_kernel = internal addrspace(3) global ptr poison, no_sanitize_address, align 4, !absolute_symbol [[META0:![0-9]+]] 12; CHECK: @llvm.amdgcn.sw.lds.test_kernel.md = internal addrspace(1) global %llvm.amdgcn.sw.lds.test_kernel.md.type { %llvm.amdgcn.sw.lds.test_kernel.md.item { i32 0, i32 8, i32 32 }, %llvm.amdgcn.sw.lds.test_kernel.md.item { i32 32, i32 4, i32 32 }, %llvm.amdgcn.sw.lds.test_kernel.md.item { i32 64, i32 4, i32 32 } }, no_sanitize_address 13;. 14define amdgpu_kernel void @test_kernel() sanitize_address { 15; CHECK-LABEL: define amdgpu_kernel void @test_kernel( 16; CHECK-SAME: ) #[[ATTR0:[0-9]+]] { 17; CHECK-NEXT: WId: 18; CHECK-NEXT: [[TMP0:%.*]] = call i32 @llvm.amdgcn.workitem.id.x() 19; CHECK-NEXT: [[TMP1:%.*]] = call i32 @llvm.amdgcn.workitem.id.y() 20; CHECK-NEXT: [[TMP2:%.*]] = call i32 @llvm.amdgcn.workitem.id.z() 21; CHECK-NEXT: [[TMP3:%.*]] = or i32 [[TMP0]], [[TMP1]] 22; CHECK-NEXT: [[TMP4:%.*]] = or i32 [[TMP3]], [[TMP2]] 23; CHECK-NEXT: [[TMP5:%.*]] = icmp eq i32 [[TMP4]], 0 24; CHECK-NEXT: br i1 [[TMP5]], label [[MALLOC:%.*]], label [[TMP7:%.*]] 25; CHECK: Malloc: 26; CHECK-NEXT: [[TMP15:%.*]] = load i32, ptr addrspace(1) getelementptr inbounds ([[LLVM_AMDGCN_SW_LDS_TEST_KERNEL_MD_TYPE:%.*]], ptr addrspace(1) @llvm.amdgcn.sw.lds.test_kernel.md, i32 0, i32 2, i32 0), align 4 27; CHECK-NEXT: [[TMP16:%.*]] = load i32, ptr addrspace(1) getelementptr inbounds ([[LLVM_AMDGCN_SW_LDS_TEST_KERNEL_MD_TYPE]], ptr addrspace(1) @llvm.amdgcn.sw.lds.test_kernel.md, i32 0, i32 2, i32 2), align 4 28; CHECK-NEXT: [[TMP18:%.*]] = add i32 [[TMP15]], [[TMP16]] 29; CHECK-NEXT: [[TMP17:%.*]] = zext i32 [[TMP18]] to i64 30; CHECK-NEXT: [[TMP14:%.*]] = call ptr @llvm.returnaddress(i32 0) 31; CHECK-NEXT: [[TMP19:%.*]] = ptrtoint ptr [[TMP14]] to i64 32; CHECK-NEXT: [[TMP20:%.*]] = call i64 @__asan_malloc_impl(i64 [[TMP17]], i64 [[TMP19]]) 33; CHECK-NEXT: [[TMP6:%.*]] = inttoptr i64 [[TMP20]] to ptr addrspace(1) 34; CHECK-NEXT: store ptr addrspace(1) [[TMP6]], ptr addrspace(3) @llvm.amdgcn.sw.lds.test_kernel, align 8 35; CHECK-NEXT: [[TMP27:%.*]] = getelementptr inbounds i8, ptr addrspace(1) [[TMP6]], i64 8 36; CHECK-NEXT: [[TMP28:%.*]] = ptrtoint ptr addrspace(1) [[TMP27]] to i64 37; CHECK-NEXT: call void @__asan_poison_region(i64 [[TMP28]], i64 24) 38; CHECK-NEXT: [[TMP29:%.*]] = getelementptr inbounds i8, ptr addrspace(1) [[TMP6]], i64 36 39; CHECK-NEXT: [[TMP30:%.*]] = ptrtoint ptr addrspace(1) [[TMP29]] to i64 40; CHECK-NEXT: call void @__asan_poison_region(i64 [[TMP30]], i64 28) 41; CHECK-NEXT: [[TMP31:%.*]] = getelementptr inbounds i8, ptr addrspace(1) [[TMP6]], i64 68 42; CHECK-NEXT: [[TMP32:%.*]] = ptrtoint ptr addrspace(1) [[TMP31]] to i64 43; CHECK-NEXT: call void @__asan_poison_region(i64 [[TMP32]], i64 28) 44; CHECK-NEXT: br label [[TMP7]] 45; CHECK: 20: 46; CHECK-NEXT: [[XYZCOND:%.*]] = phi i1 [ false, [[WID:%.*]] ], [ true, [[MALLOC]] ] 47; CHECK-NEXT: call void @llvm.amdgcn.s.barrier() 48; CHECK-NEXT: [[TMP21:%.*]] = load ptr addrspace(1), ptr addrspace(3) @llvm.amdgcn.sw.lds.test_kernel, align 8 49; CHECK-NEXT: [[TMP10:%.*]] = load i32, ptr addrspace(1) getelementptr inbounds ([[LLVM_AMDGCN_SW_LDS_TEST_KERNEL_MD_TYPE]], ptr addrspace(1) @llvm.amdgcn.sw.lds.test_kernel.md, i32 0, i32 1, i32 0), align 4 50; CHECK-NEXT: [[TMP11:%.*]] = getelementptr inbounds i8, ptr addrspace(3) @llvm.amdgcn.sw.lds.test_kernel, i32 [[TMP10]] 51; CHECK-NEXT: [[TMP25:%.*]] = load i32, ptr addrspace(1) getelementptr inbounds ([[LLVM_AMDGCN_SW_LDS_TEST_KERNEL_MD_TYPE]], ptr addrspace(1) @llvm.amdgcn.sw.lds.test_kernel.md, i32 0, i32 2, i32 0), align 4 52; CHECK-NEXT: [[TMP26:%.*]] = getelementptr inbounds i8, ptr addrspace(3) @llvm.amdgcn.sw.lds.test_kernel, i32 [[TMP25]] 53; CHECK-NEXT: [[TMP12:%.*]] = addrspacecast ptr addrspace(3) [[TMP11]] to ptr addrspace(1) 54; CHECK-NEXT: [[VAL1:%.*]] = load i32, ptr addrspace(1) [[TMP12]], align 4 55; CHECK-NEXT: [[TMP13:%.*]] = addrspacecast ptr addrspace(3) [[TMP26]] to ptr addrspace(1) 56; CHECK-NEXT: [[VAL2:%.*]] = load i32, ptr addrspace(1) [[TMP13]], align 4 57; CHECK-NEXT: [[RESULT:%.*]] = add i32 [[VAL1]], [[VAL2]] 58; CHECK-NEXT: [[CMP:%.*]] = icmp sgt i32 [[RESULT]], 0 59; CHECK-NEXT: br i1 [[CMP]], label [[POSITIVE:%.*]], label [[NEGATIVE:%.*]] 60; CHECK: positive: 61; CHECK-NEXT: br label [[CONDFREE:%.*]] 62; CHECK: negative: 63; CHECK-NEXT: [[CMP2:%.*]] = icmp sgt i32 [[VAL1]], 0 64; CHECK-NEXT: br i1 [[CMP2]], label [[VAL1_POSITIVE:%.*]], label [[VAL1_NEGATIVE:%.*]] 65; CHECK: val1_positive: 66; CHECK-NEXT: br label [[CONDFREE]] 67; CHECK: val1_negative: 68; CHECK-NEXT: br label [[CONDFREE]] 69; CHECK: CondFree: 70; CHECK-NEXT: call void @llvm.amdgcn.s.barrier() 71; CHECK-NEXT: br i1 [[XYZCOND]], label [[FREE:%.*]], label [[END:%.*]] 72; CHECK: Free: 73; CHECK-NEXT: [[TMP22:%.*]] = call ptr @llvm.returnaddress(i32 0) 74; CHECK-NEXT: [[TMP23:%.*]] = ptrtoint ptr [[TMP22]] to i64 75; CHECK-NEXT: [[TMP24:%.*]] = ptrtoint ptr addrspace(1) [[TMP21]] to i64 76; CHECK-NEXT: call void @__asan_free_impl(i64 [[TMP24]], i64 [[TMP23]]) 77; CHECK-NEXT: br label [[END]] 78; CHECK: End: 79; CHECK-NEXT: ret void 80; 81%val1 = load i32, ptr addrspace(1) addrspacecast (ptr addrspace(3) @lds_1 to ptr addrspace(1)) 82%val2 = load i32, ptr addrspace(1) addrspacecast (ptr addrspace(3) @lds_2 to ptr addrspace(1)) 83 84%result = add i32 %val1, %val2 85%cmp = icmp sgt i32 %result, 0 86br i1 %cmp, label %positive, label %negative 87 88positive: 89ret void 90 91negative: 92%cmp2 = icmp sgt i32 %val1, 0 93br i1 %cmp2, label %val1_positive, label %val1_negative 94 95val1_positive: 96ret void 97 98val1_negative: 99ret void 100} 101 102!llvm.module.flags = !{!0} 103!0 = !{i32 4, !"nosanitize_address", i32 1} 104 105;. 106; CHECK: attributes #[[ATTR0]] = { sanitize_address "amdgpu-lds-size"="8" } 107; CHECK: attributes #[[ATTR1:[0-9]+]] = { nocallback nofree nosync nounwind speculatable willreturn memory(none) } 108; CHECK: attributes #[[ATTR2:[0-9]+]] = { nocallback nofree nosync nounwind willreturn memory(none) } 109; CHECK: attributes #[[ATTR3:[0-9]+]] = { convergent nocallback nofree nounwind willreturn } 110;. 111; CHECK: [[META0]] = !{i32 0, i32 1} 112;. 113