xref: /llvm-project/llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-insert.mir (revision 87503fa51c8d726510d48e707a7d2885a5b5936c) 
1# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
2# RUN: llc -mtriple=amdgcn -mcpu=gfx908 -run-pass=regbankselect %s -verify-machineinstrs -o - -regbankselect-fast | FileCheck %s
3# RUN: llc -mtriple=amdgcn -mcpu=gfx908 -run-pass=regbankselect %s -verify-machineinstrs -o - -regbankselect-greedy | FileCheck %s
4
5---
6name: insert_lo32_i64_ss
7legalized: true
8
9body: |
10  bb.0:
11    liveins: $sgpr0_sgpr1, $sgpr2
12    ; CHECK-LABEL: name: insert_lo32_i64_ss
13    ; CHECK: liveins: $sgpr0_sgpr1, $sgpr2
14    ; CHECK-NEXT: {{  $}}
15    ; CHECK-NEXT: [[COPY:%[0-9]+]]:sgpr(s64) = COPY $sgpr0_sgpr1
16    ; CHECK-NEXT: [[COPY1:%[0-9]+]]:sgpr(s32) = COPY $sgpr2
17    ; CHECK-NEXT: [[INSERT:%[0-9]+]]:sgpr(s64) = G_INSERT [[COPY]], [[COPY1]](s32), 0
18    %0:_(s64) = COPY $sgpr0_sgpr1
19    %1:_(s32) = COPY $sgpr2
20    %2:_(s64) = G_INSERT %0, %1, 0
21...
22
23---
24name: insert_lo32_i64_sv
25legalized: true
26
27body: |
28  bb.0:
29    liveins: $sgpr0_sgpr1, $vgpr2
30    ; CHECK-LABEL: name: insert_lo32_i64_sv
31    ; CHECK: liveins: $sgpr0_sgpr1, $vgpr2
32    ; CHECK-NEXT: {{  $}}
33    ; CHECK-NEXT: [[COPY:%[0-9]+]]:sgpr(s64) = COPY $sgpr0_sgpr1
34    ; CHECK-NEXT: [[COPY1:%[0-9]+]]:vgpr(s32) = COPY $vgpr2
35    ; CHECK-NEXT: [[COPY2:%[0-9]+]]:vgpr(s64) = COPY [[COPY]](s64)
36    ; CHECK-NEXT: [[INSERT:%[0-9]+]]:vgpr(s64) = G_INSERT [[COPY2]], [[COPY1]](s32), 0
37    %0:_(s64) = COPY $sgpr0_sgpr1
38    %1:_(s32) = COPY $vgpr2
39    %2:_(s64) = G_INSERT %0, %1, 0
40...
41---
42name: insert_lo32_i64_vs
43legalized: true
44
45body: |
46  bb.0:
47    liveins: $vgpr0_vgpr1, $sgpr2
48    ; CHECK-LABEL: name: insert_lo32_i64_vs
49    ; CHECK: liveins: $vgpr0_vgpr1, $sgpr2
50    ; CHECK-NEXT: {{  $}}
51    ; CHECK-NEXT: [[COPY:%[0-9]+]]:vgpr(s64) = COPY $vgpr0_vgpr1
52    ; CHECK-NEXT: [[COPY1:%[0-9]+]]:sgpr(s32) = COPY $sgpr2
53    ; CHECK-NEXT: [[COPY2:%[0-9]+]]:vgpr(s32) = COPY [[COPY1]](s32)
54    ; CHECK-NEXT: [[INSERT:%[0-9]+]]:vgpr(s64) = G_INSERT [[COPY]], [[COPY2]](s32), 0
55    %0:_(s64) = COPY $vgpr0_vgpr1
56    %1:_(s32) = COPY $sgpr2
57    %2:_(s64) = G_INSERT %0, %1, 0
58...
59---
60name: insert_lo32_i64_vv
61legalized: true
62
63body: |
64  bb.0:
65    liveins: $vgpr0_vgpr1, $vgpr2
66    ; CHECK-LABEL: name: insert_lo32_i64_vv
67    ; CHECK: liveins: $vgpr0_vgpr1, $vgpr2
68    ; CHECK-NEXT: {{  $}}
69    ; CHECK-NEXT: [[COPY:%[0-9]+]]:sgpr(s64) = COPY $sgpr0_sgpr1
70    ; CHECK-NEXT: [[COPY1:%[0-9]+]]:sgpr(s32) = COPY $sgpr2
71    ; CHECK-NEXT: [[INSERT:%[0-9]+]]:sgpr(s64) = G_INSERT [[COPY]], [[COPY1]](s32), 0
72    %0:_(s64) = COPY $sgpr0_sgpr1
73    %1:_(s32) = COPY $sgpr2
74    %2:_(s64) = G_INSERT %0, %1, 0
75...
76
77---
78name: insert_lo32_i96_v
79legalized: true
80
81body: |
82  bb.0:
83    liveins: $vgpr0_vgpr1_vgpr2, $vgpr3
84    ; CHECK-LABEL: name: insert_lo32_i96_v
85    ; CHECK: liveins: $vgpr0_vgpr1_vgpr2, $vgpr3
86    ; CHECK-NEXT: {{  $}}
87    ; CHECK-NEXT: [[COPY:%[0-9]+]]:vgpr(s96) = COPY $vgpr0_vgpr1_vgpr2
88    ; CHECK-NEXT: [[COPY1:%[0-9]+]]:vgpr(s32) = COPY $vgpr3
89    ; CHECK-NEXT: [[INSERT:%[0-9]+]]:vgpr(s96) = G_INSERT [[COPY]], [[COPY1]](s32), 0
90    %0:_(s96) = COPY $vgpr0_vgpr1_vgpr2
91    %1:_(s32) = COPY $vgpr3
92    %2:_(s96) = G_INSERT %0, %1, 0
93...
94
95---
96name: insert_lo32_i64_aa
97legalized: true
98
99body: |
100  bb.0:
101    liveins: $agpr0_agpr1, $agpr2
102    ; CHECK-LABEL: name: insert_lo32_i64_aa
103    ; CHECK: liveins: $agpr0_agpr1, $agpr2
104    ; CHECK-NEXT: {{  $}}
105    ; CHECK-NEXT: [[COPY:%[0-9]+]]:agpr(s64) = COPY $agpr0_agpr1
106    ; CHECK-NEXT: [[COPY1:%[0-9]+]]:agpr(s32) = COPY $agpr2
107    ; CHECK-NEXT: [[INSERT:%[0-9]+]]:agpr(s64) = G_INSERT [[COPY]], [[COPY1]](s32), 0
108    %0:_(s64) = COPY $agpr0_agpr1
109    %1:_(s32) = COPY $agpr2
110    %2:_(s64) = G_INSERT %0, %1, 0
111...
112
113---
114name: insert_lo32_i64_av
115legalized: true
116
117body: |
118  bb.0:
119    liveins: $agpr0_agpr1, $vgpr2
120    ; CHECK-LABEL: name: insert_lo32_i64_av
121    ; CHECK: liveins: $agpr0_agpr1, $vgpr2
122    ; CHECK-NEXT: {{  $}}
123    ; CHECK-NEXT: [[COPY:%[0-9]+]]:agpr(s64) = COPY $agpr0_agpr1
124    ; CHECK-NEXT: [[COPY1:%[0-9]+]]:vgpr(s32) = COPY $vgpr2
125    ; CHECK-NEXT: [[COPY2:%[0-9]+]]:vgpr(s64) = COPY [[COPY]](s64)
126    ; CHECK-NEXT: [[INSERT:%[0-9]+]]:vgpr(s64) = G_INSERT [[COPY2]], [[COPY1]](s32), 0
127    %0:_(s64) = COPY $agpr0_agpr1
128    %1:_(s32) = COPY $vgpr2
129    %2:_(s64) = G_INSERT %0, %1, 0
130...
131---
132name: insert_lo32_i64_va
133legalized: true
134
135body: |
136  bb.0:
137    liveins: $vgpr0_vgpr1, $agpr2
138    ; CHECK-LABEL: name: insert_lo32_i64_va
139    ; CHECK: liveins: $vgpr0_vgpr1, $agpr2
140    ; CHECK-NEXT: {{  $}}
141    ; CHECK-NEXT: [[COPY:%[0-9]+]]:vgpr(s64) = COPY $vgpr0_vgpr1
142    ; CHECK-NEXT: [[COPY1:%[0-9]+]]:agpr(s32) = COPY $agpr2
143    ; CHECK-NEXT: [[COPY2:%[0-9]+]]:vgpr(s32) = COPY [[COPY1]](s32)
144    ; CHECK-NEXT: [[INSERT:%[0-9]+]]:vgpr(s64) = G_INSERT [[COPY]], [[COPY2]](s32), 0
145    %0:_(s64) = COPY $vgpr0_vgpr1
146    %1:_(s32) = COPY $agpr2
147    %2:_(s64) = G_INSERT %0, %1, 0
148...
149
150---
151name: insert_lo32_i64_as
152legalized: true
153
154body: |
155  bb.0:
156    liveins: $agpr0_agpr1, $sgpr2
157    ; CHECK-LABEL: name: insert_lo32_i64_as
158    ; CHECK: liveins: $agpr0_agpr1, $sgpr2
159    ; CHECK-NEXT: {{  $}}
160    ; CHECK-NEXT: [[COPY:%[0-9]+]]:agpr(s64) = COPY $agpr0_agpr1
161    ; CHECK-NEXT: [[COPY1:%[0-9]+]]:sgpr(s32) = COPY $sgpr2
162    ; CHECK-NEXT: [[COPY2:%[0-9]+]]:vgpr(s64) = COPY [[COPY]](s64)
163    ; CHECK-NEXT: [[COPY3:%[0-9]+]]:vgpr(s32) = COPY [[COPY1]](s32)
164    ; CHECK-NEXT: [[INSERT:%[0-9]+]]:vgpr(s64) = G_INSERT [[COPY2]], [[COPY3]](s32), 0
165    %0:_(s64) = COPY $agpr0_agpr1
166    %1:_(s32) = COPY $sgpr2
167    %2:_(s64) = G_INSERT %0, %1, 0
168...
169---
170name: insert_lo32_i64_sa
171legalized: true
172
173body: |
174  bb.0:
175    liveins: $sgpr0_sgpr1, $agpr2
176    ; CHECK-LABEL: name: insert_lo32_i64_sa
177    ; CHECK: liveins: $sgpr0_sgpr1, $agpr2
178    ; CHECK-NEXT: {{  $}}
179    ; CHECK-NEXT: [[COPY:%[0-9]+]]:sgpr(s64) = COPY $sgpr0_sgpr1
180    ; CHECK-NEXT: [[COPY1:%[0-9]+]]:agpr(s32) = COPY $agpr2
181    ; CHECK-NEXT: [[COPY2:%[0-9]+]]:vgpr(s64) = COPY [[COPY]](s64)
182    ; CHECK-NEXT: [[COPY3:%[0-9]+]]:vgpr(s32) = COPY [[COPY1]](s32)
183    ; CHECK-NEXT: [[INSERT:%[0-9]+]]:vgpr(s64) = G_INSERT [[COPY2]], [[COPY3]](s32), 0
184    %0:_(s64) = COPY $sgpr0_sgpr1
185    %1:_(s32) = COPY $agpr2
186    %2:_(s64) = G_INSERT %0, %1, 0
187...
188