xref: /llvm-project/llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-constant.mir (revision 87503fa51c8d726510d48e707a7d2885a5b5936c)
1# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
2# RUN: llc -mtriple=amdgcn -mcpu=hawaii -run-pass=regbankselect -regbankselect-fast -verify-machineinstrs -o - %s | FileCheck %s
3# RUN: llc -mtriple=amdgcn -mcpu=hawaii -run-pass=regbankselect -regbankselect-greedy -verify-machineinstrs -o - %s | FileCheck %s
4
5---
6name: test_constant_s32_vgpr_use
7legalized:       true
8body: |
9  bb.0:
10    liveins: $vgpr0_vgpr1
11    ; CHECK-LABEL: name: test_constant_s32_vgpr_use
12    ; CHECK: liveins: $vgpr0_vgpr1
13    ; CHECK-NEXT: {{  $}}
14    ; CHECK-NEXT: [[COPY:%[0-9]+]]:vgpr(p1) = COPY $vgpr0_vgpr1
15    ; CHECK-NEXT: [[C:%[0-9]+]]:sgpr(s32) = G_CONSTANT i32 1
16    ; CHECK-NEXT: [[COPY1:%[0-9]+]]:vgpr(s32) = COPY [[C]](s32)
17    ; CHECK-NEXT: G_STORE [[COPY1]](s32), [[COPY]](p1) :: (store (s32))
18    %0:_(p1) = COPY $vgpr0_vgpr1
19    %1:_(s32) = G_CONSTANT i32 1
20    G_STORE %1, %0 :: (store (s32))
21
22...
23
24---
25name: test_constant_s32_sgpr_use
26legalized:       true
27body: |
28  bb.0:
29    ; CHECK-LABEL: name: test_constant_s32_sgpr_use
30    ; CHECK: [[C:%[0-9]+]]:sgpr(s32) = G_CONSTANT i32 1
31    ; CHECK-NEXT: G_INTRINSIC_W_SIDE_EFFECTS intrinsic(@llvm.amdgcn.s.sendmsg), 0, [[C]](s32)
32    %0:_(s32) = G_CONSTANT i32 1
33    G_INTRINSIC_W_SIDE_EFFECTS intrinsic(@llvm.amdgcn.s.sendmsg), 0, %0
34
35...
36