1; RUN: opt -mtriple=amdgcn-amd-amdhsa -passes=amdgpu-attributor %s -o %t.bc 2; RUN: llc -global-isel -mtriple=amdgcn-- -mcpu=hawaii < %t.bc | FileCheck --check-prefixes=ALL,UNKNOWN-OS %s 3; RUN: llc -global-isel -mtriple=amdgcn-- -mcpu=tonga < %t.bc | FileCheck --check-prefixes=ALL,UNKNOWN-OS %s 4; RUN: llc -global-isel -mtriple=amdgcn-unknown-mesa3d -mcpu=hawaii < %t.bc | FileCheck -check-prefixes=ALL,MESA3D %s 5; RUN: llc -global-isel -mtriple=amdgcn-unknown-mesa3d -mcpu=tonga < %t.bc | FileCheck -check-prefixes=ALL,MESA3D %s 6 7declare i32 @llvm.amdgcn.workgroup.id.x() #0 8declare i32 @llvm.amdgcn.workgroup.id.y() #0 9declare i32 @llvm.amdgcn.workgroup.id.z() #0 10 11; ALL-LABEL: {{^}}test_workgroup_id_x: 12 13; MESA3D: .amd_kernel_code_t 14; MESA3D: user_sgpr_count = 6 15; MESA3D: enable_sgpr_workgroup_id_x = 1 16; MESA3D: enable_sgpr_workgroup_id_y = 0 17; MESA3D: enable_sgpr_workgroup_id_z = 0 18; MESA3D: enable_sgpr_workgroup_info = 0 19; MESA3D: enable_vgpr_workitem_id = 0 20; MESA3D: enable_sgpr_grid_workgroup_count_x = 0 21; MESA3D: enable_sgpr_grid_workgroup_count_y = 0 22; MESA3D: enable_sgpr_grid_workgroup_count_z = 0 23; MESA3D: .end_amd_kernel_code_t 24 25; UNKNOWN-OS: v_mov_b32_e32 [[VCOPY:v[0-9]+]], s2{{$}} 26; MESA3D: v_mov_b32_e32 [[VCOPY:v[0-9]+]], s6{{$}} 27 28; ALL: {{buffer|flat}}_store_dword {{.*}}[[VCOPY]] 29 30; MESA3D: COMPUTE_PGM_RSRC2:USER_SGPR: 6 31; ALL-NOMESA3D: COMPUTE_PGM_RSRC2:USER_SGPR: 2 32; ALL: COMPUTE_PGM_RSRC2:TGID_X_EN: 1 33; ALL: COMPUTE_PGM_RSRC2:TGID_Y_EN: 0 34; ALL: COMPUTE_PGM_RSRC2:TGID_Z_EN: 0 35; ALL: COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0 36define amdgpu_kernel void @test_workgroup_id_x(ptr addrspace(1) %out) #1 { 37 %id = call i32 @llvm.amdgcn.workgroup.id.x() 38 store i32 %id, ptr addrspace(1) %out 39 ret void 40} 41 42; ALL-LABEL: {{^}}test_workgroup_id_y: 43; MESA3D: user_sgpr_count = 6 44; MESA3D: enable_sgpr_workgroup_id_x = 1 45; MESA3D: enable_sgpr_workgroup_id_y = 1 46; MESA3D: enable_sgpr_workgroup_id_z = 0 47; MESA3D: enable_sgpr_workgroup_info = 0 48; MESA3D: enable_sgpr_grid_workgroup_count_x = 0 49; MESA3D: enable_sgpr_grid_workgroup_count_y = 0 50; MESA3D: enable_sgpr_grid_workgroup_count_z = 0 51 52; UNKNOWN-OS: v_mov_b32_e32 [[VCOPY:v[0-9]+]], s3{{$}} 53; HSA: v_mov_b32_e32 [[VCOPY:v[0-9]+]], s7{{$}} 54 55; ALL: {{buffer|flat}}_store_dword {{.*}}[[VCOPY]] 56 57; MESA3D: COMPUTE_PGM_RSRC2:USER_SGPR: 6 58; ALL-NOMESA3D: COMPUTE_PGM_RSRC2:USER_SGPR: 2 59; ALL: COMPUTE_PGM_RSRC2:TGID_X_EN: 1 60; ALL: COMPUTE_PGM_RSRC2:TGID_Y_EN: 1 61; ALL: COMPUTE_PGM_RSRC2:TGID_Z_EN: 0 62; ALL: COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0 63define amdgpu_kernel void @test_workgroup_id_y(ptr addrspace(1) %out) #1 { 64 %id = call i32 @llvm.amdgcn.workgroup.id.y() 65 store i32 %id, ptr addrspace(1) %out 66 ret void 67} 68 69; ALL-LABEL: {{^}}test_workgroup_id_z: 70; MESA3D: user_sgpr_count = 6 71; MESA3D: enable_sgpr_workgroup_id_x = 1 72; MESA3D: enable_sgpr_workgroup_id_y = 0 73; MESA3D: enable_sgpr_workgroup_id_z = 1 74; MESA3D: enable_sgpr_workgroup_info = 0 75; MESA3D: enable_vgpr_workitem_id = 0 76; MESA3D: enable_sgpr_private_segment_buffer = 1 77; MESA3D: enable_sgpr_dispatch_ptr = 0 78; MESA3D: enable_sgpr_queue_ptr = 0 79; MESA3D: enable_sgpr_kernarg_segment_ptr = 1 80; MESA3D: enable_sgpr_dispatch_id = 0 81; MESA3D: enable_sgpr_flat_scratch_init = 0 82; MESA3D: enable_sgpr_private_segment_size = 0 83; MESA3D: enable_sgpr_grid_workgroup_count_x = 0 84; MESA3D: enable_sgpr_grid_workgroup_count_y = 0 85; MESA3D: enable_sgpr_grid_workgroup_count_z = 0 86 87; UNKNOWN-OS: v_mov_b32_e32 [[VCOPY:v[0-9]+]], s3{{$}} 88; HSA: v_mov_b32_e32 [[VCOPY:v[0-9]+]], s7{{$}} 89 90; ALL: {{buffer|flat}}_store_dword {{.*}}[[VCOPY]] 91 92; MESA3D: COMPUTE_PGM_RSRC2:USER_SGPR: 6 93; ALL-NOMESA3D: COMPUTE_PGM_RSRC2:USER_SGPR: 2 94; ALL: COMPUTE_PGM_RSRC2:TGID_X_EN: 1 95; ALL: COMPUTE_PGM_RSRC2:TGID_Y_EN: 0 96; ALL: COMPUTE_PGM_RSRC2:TGID_Z_EN: 1 97; ALL: COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0 98define amdgpu_kernel void @test_workgroup_id_z(ptr addrspace(1) %out) #1 { 99 %id = call i32 @llvm.amdgcn.workgroup.id.z() 100 store i32 %id, ptr addrspace(1) %out 101 ret void 102} 103 104attributes #0 = { nounwind readnone } 105attributes #1 = { nounwind } 106 107!llvm.module.flags = !{!0} 108!0 = !{i32 1, !"amdhsa_code_object_version", i32 400} 109