1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py 2; RUN: llc -global-isel -mtriple=amdgcn -mcpu=tahiti -verify-machineinstrs < %s | FileCheck --check-prefix=GFX6 %s 3; RUN: llc -global-isel -mtriple=amdgcn -mcpu=tonga -verify-machineinstrs < %s | FileCheck --check-prefix=GFX8 %s 4; RUN: llc -global-isel -mtriple=amdgcn -mcpu=gfx900 -verify-machineinstrs < %s | FileCheck --check-prefix=GFX9 %s 5; RUN: llc -global-isel -mtriple=amdgcn -mcpu=gfx1010 -verify-machineinstrs < %s | FileCheck --check-prefix=GFX101 %s 6; RUN: llc -global-isel -mtriple=amdgcn -mcpu=gfx1030 -verify-machineinstrs < %s | FileCheck --check-prefix=GFX103 %s 7; RUN: llc -global-isel -mtriple=amdgcn -mcpu=gfx1100 -verify-machineinstrs < %s | FileCheck --check-prefix=GFX11 %s 8 9define float @v_mul_legacy_f32(float %a, float %b) { 10; GFX6-LABEL: v_mul_legacy_f32: 11; GFX6: ; %bb.0: 12; GFX6-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) 13; GFX6-NEXT: v_mul_legacy_f32_e32 v0, v0, v1 14; GFX6-NEXT: s_setpc_b64 s[30:31] 15; 16; GFX8-LABEL: v_mul_legacy_f32: 17; GFX8: ; %bb.0: 18; GFX8-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) 19; GFX8-NEXT: v_mul_legacy_f32_e32 v0, v0, v1 20; GFX8-NEXT: s_setpc_b64 s[30:31] 21; 22; GFX9-LABEL: v_mul_legacy_f32: 23; GFX9: ; %bb.0: 24; GFX9-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) 25; GFX9-NEXT: v_mul_legacy_f32_e32 v0, v0, v1 26; GFX9-NEXT: s_setpc_b64 s[30:31] 27; 28; GFX101-LABEL: v_mul_legacy_f32: 29; GFX101: ; %bb.0: 30; GFX101-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) 31; GFX101-NEXT: v_mul_legacy_f32_e32 v0, v0, v1 32; GFX101-NEXT: s_setpc_b64 s[30:31] 33; 34; GFX103-LABEL: v_mul_legacy_f32: 35; GFX103: ; %bb.0: 36; GFX103-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) 37; GFX103-NEXT: v_mul_legacy_f32_e32 v0, v0, v1 38; GFX103-NEXT: s_setpc_b64 s[30:31] 39; 40; GFX11-LABEL: v_mul_legacy_f32: 41; GFX11: ; %bb.0: 42; GFX11-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) 43; GFX11-NEXT: v_mul_dx9_zero_f32_e32 v0, v0, v1 44; GFX11-NEXT: s_setpc_b64 s[30:31] 45 %result = call float @llvm.amdgcn.fmul.legacy(float %a, float %b) 46 ret float %result 47} 48 49define float @v_mul_legacy_undef0_f32(float %a) { 50; GFX6-LABEL: v_mul_legacy_undef0_f32: 51; GFX6: ; %bb.0: 52; GFX6-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) 53; GFX6-NEXT: v_mul_legacy_f32_e32 v0, s4, v0 54; GFX6-NEXT: s_setpc_b64 s[30:31] 55; 56; GFX8-LABEL: v_mul_legacy_undef0_f32: 57; GFX8: ; %bb.0: 58; GFX8-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) 59; GFX8-NEXT: v_mul_legacy_f32_e32 v0, s4, v0 60; GFX8-NEXT: s_setpc_b64 s[30:31] 61; 62; GFX9-LABEL: v_mul_legacy_undef0_f32: 63; GFX9: ; %bb.0: 64; GFX9-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) 65; GFX9-NEXT: v_mul_legacy_f32_e32 v0, s4, v0 66; GFX9-NEXT: s_setpc_b64 s[30:31] 67; 68; GFX101-LABEL: v_mul_legacy_undef0_f32: 69; GFX101: ; %bb.0: 70; GFX101-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) 71; GFX101-NEXT: v_mul_legacy_f32_e32 v0, s4, v0 72; GFX101-NEXT: s_setpc_b64 s[30:31] 73; 74; GFX103-LABEL: v_mul_legacy_undef0_f32: 75; GFX103: ; %bb.0: 76; GFX103-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) 77; GFX103-NEXT: v_mul_legacy_f32_e32 v0, s4, v0 78; GFX103-NEXT: s_setpc_b64 s[30:31] 79; 80; GFX11-LABEL: v_mul_legacy_undef0_f32: 81; GFX11: ; %bb.0: 82; GFX11-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) 83; GFX11-NEXT: v_mul_dx9_zero_f32_e32 v0, s0, v0 84; GFX11-NEXT: s_setpc_b64 s[30:31] 85 %result = call float @llvm.amdgcn.fmul.legacy(float undef, float %a) 86 ret float %result 87} 88 89define float @v_mul_legacy_undef1_f32(float %a) { 90; GFX6-LABEL: v_mul_legacy_undef1_f32: 91; GFX6: ; %bb.0: 92; GFX6-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) 93; GFX6-NEXT: v_mul_legacy_f32_e32 v0, s4, v0 94; GFX6-NEXT: s_setpc_b64 s[30:31] 95; 96; GFX8-LABEL: v_mul_legacy_undef1_f32: 97; GFX8: ; %bb.0: 98; GFX8-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) 99; GFX8-NEXT: v_mul_legacy_f32_e32 v0, s4, v0 100; GFX8-NEXT: s_setpc_b64 s[30:31] 101; 102; GFX9-LABEL: v_mul_legacy_undef1_f32: 103; GFX9: ; %bb.0: 104; GFX9-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) 105; GFX9-NEXT: v_mul_legacy_f32_e32 v0, s4, v0 106; GFX9-NEXT: s_setpc_b64 s[30:31] 107; 108; GFX101-LABEL: v_mul_legacy_undef1_f32: 109; GFX101: ; %bb.0: 110; GFX101-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) 111; GFX101-NEXT: v_mul_legacy_f32_e32 v0, s4, v0 112; GFX101-NEXT: s_setpc_b64 s[30:31] 113; 114; GFX103-LABEL: v_mul_legacy_undef1_f32: 115; GFX103: ; %bb.0: 116; GFX103-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) 117; GFX103-NEXT: v_mul_legacy_f32_e32 v0, s4, v0 118; GFX103-NEXT: s_setpc_b64 s[30:31] 119; 120; GFX11-LABEL: v_mul_legacy_undef1_f32: 121; GFX11: ; %bb.0: 122; GFX11-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) 123; GFX11-NEXT: v_mul_dx9_zero_f32_e32 v0, s0, v0 124; GFX11-NEXT: s_setpc_b64 s[30:31] 125 %result = call float @llvm.amdgcn.fmul.legacy(float %a, float undef) 126 ret float %result 127} 128 129define float @v_mul_legacy_undef_f32() { 130; GFX6-LABEL: v_mul_legacy_undef_f32: 131; GFX6: ; %bb.0: 132; GFX6-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) 133; GFX6-NEXT: v_mul_legacy_f32_e64 v0, s4, s4 134; GFX6-NEXT: s_setpc_b64 s[30:31] 135; 136; GFX8-LABEL: v_mul_legacy_undef_f32: 137; GFX8: ; %bb.0: 138; GFX8-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) 139; GFX8-NEXT: v_mul_legacy_f32_e64 v0, s4, s4 140; GFX8-NEXT: s_setpc_b64 s[30:31] 141; 142; GFX9-LABEL: v_mul_legacy_undef_f32: 143; GFX9: ; %bb.0: 144; GFX9-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) 145; GFX9-NEXT: v_mul_legacy_f32_e64 v0, s4, s4 146; GFX9-NEXT: s_setpc_b64 s[30:31] 147; 148; GFX101-LABEL: v_mul_legacy_undef_f32: 149; GFX101: ; %bb.0: 150; GFX101-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) 151; GFX101-NEXT: v_mul_legacy_f32_e64 v0, s4, s4 152; GFX101-NEXT: s_setpc_b64 s[30:31] 153; 154; GFX103-LABEL: v_mul_legacy_undef_f32: 155; GFX103: ; %bb.0: 156; GFX103-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) 157; GFX103-NEXT: v_mul_legacy_f32_e64 v0, s4, s4 158; GFX103-NEXT: s_setpc_b64 s[30:31] 159; 160; GFX11-LABEL: v_mul_legacy_undef_f32: 161; GFX11: ; %bb.0: 162; GFX11-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) 163; GFX11-NEXT: v_mul_dx9_zero_f32_e64 v0, s0, s0 164; GFX11-NEXT: s_setpc_b64 s[30:31] 165 %result = call float @llvm.amdgcn.fmul.legacy(float undef, float undef) 166 ret float %result 167} 168 169define float @v_mul_legacy_fabs_f32(float %a, float %b) { 170; GFX6-LABEL: v_mul_legacy_fabs_f32: 171; GFX6: ; %bb.0: 172; GFX6-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) 173; GFX6-NEXT: v_mul_legacy_f32_e64 v0, |v0|, |v1| 174; GFX6-NEXT: s_setpc_b64 s[30:31] 175; 176; GFX8-LABEL: v_mul_legacy_fabs_f32: 177; GFX8: ; %bb.0: 178; GFX8-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) 179; GFX8-NEXT: v_mul_legacy_f32_e64 v0, |v0|, |v1| 180; GFX8-NEXT: s_setpc_b64 s[30:31] 181; 182; GFX9-LABEL: v_mul_legacy_fabs_f32: 183; GFX9: ; %bb.0: 184; GFX9-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) 185; GFX9-NEXT: v_mul_legacy_f32_e64 v0, |v0|, |v1| 186; GFX9-NEXT: s_setpc_b64 s[30:31] 187; 188; GFX101-LABEL: v_mul_legacy_fabs_f32: 189; GFX101: ; %bb.0: 190; GFX101-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) 191; GFX101-NEXT: v_mul_legacy_f32_e64 v0, |v0|, |v1| 192; GFX101-NEXT: s_setpc_b64 s[30:31] 193; 194; GFX103-LABEL: v_mul_legacy_fabs_f32: 195; GFX103: ; %bb.0: 196; GFX103-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) 197; GFX103-NEXT: v_mul_legacy_f32_e64 v0, |v0|, |v1| 198; GFX103-NEXT: s_setpc_b64 s[30:31] 199; 200; GFX11-LABEL: v_mul_legacy_fabs_f32: 201; GFX11: ; %bb.0: 202; GFX11-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) 203; GFX11-NEXT: v_mul_dx9_zero_f32_e64 v0, |v0|, |v1| 204; GFX11-NEXT: s_setpc_b64 s[30:31] 205 %a.fabs = call float @llvm.fabs.f32(float %a) 206 %b.fabs = call float @llvm.fabs.f32(float %b) 207 %result = call float @llvm.amdgcn.fmul.legacy(float %a.fabs, float %b.fabs) 208 ret float %result 209} 210 211define float @v_mul_legacy_fneg_f32(float %a, float %b) { 212; GFX6-LABEL: v_mul_legacy_fneg_f32: 213; GFX6: ; %bb.0: 214; GFX6-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) 215; GFX6-NEXT: v_mul_legacy_f32_e64 v0, -v0, -v1 216; GFX6-NEXT: s_setpc_b64 s[30:31] 217; 218; GFX8-LABEL: v_mul_legacy_fneg_f32: 219; GFX8: ; %bb.0: 220; GFX8-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) 221; GFX8-NEXT: v_mul_legacy_f32_e64 v0, -v0, -v1 222; GFX8-NEXT: s_setpc_b64 s[30:31] 223; 224; GFX9-LABEL: v_mul_legacy_fneg_f32: 225; GFX9: ; %bb.0: 226; GFX9-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) 227; GFX9-NEXT: v_mul_legacy_f32_e64 v0, -v0, -v1 228; GFX9-NEXT: s_setpc_b64 s[30:31] 229; 230; GFX101-LABEL: v_mul_legacy_fneg_f32: 231; GFX101: ; %bb.0: 232; GFX101-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) 233; GFX101-NEXT: v_mul_legacy_f32_e64 v0, -v0, -v1 234; GFX101-NEXT: s_setpc_b64 s[30:31] 235; 236; GFX103-LABEL: v_mul_legacy_fneg_f32: 237; GFX103: ; %bb.0: 238; GFX103-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) 239; GFX103-NEXT: v_mul_legacy_f32_e64 v0, -v0, -v1 240; GFX103-NEXT: s_setpc_b64 s[30:31] 241; 242; GFX11-LABEL: v_mul_legacy_fneg_f32: 243; GFX11: ; %bb.0: 244; GFX11-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) 245; GFX11-NEXT: v_mul_dx9_zero_f32_e64 v0, -v0, -v1 246; GFX11-NEXT: s_setpc_b64 s[30:31] 247 %a.fneg = fneg float %a 248 %b.fneg = fneg float %b 249 %result = call float @llvm.amdgcn.fmul.legacy(float %a.fneg, float %b.fneg) 250 ret float %result 251} 252 253; Don't form mad/mac instructions because they don't support denormals. 254define float @v_add_mul_legacy_f32(float %a, float %b, float %c) { 255; GFX6-LABEL: v_add_mul_legacy_f32: 256; GFX6: ; %bb.0: 257; GFX6-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) 258; GFX6-NEXT: v_mul_legacy_f32_e32 v0, v0, v1 259; GFX6-NEXT: v_add_f32_e32 v0, v0, v2 260; GFX6-NEXT: s_setpc_b64 s[30:31] 261; 262; GFX8-LABEL: v_add_mul_legacy_f32: 263; GFX8: ; %bb.0: 264; GFX8-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) 265; GFX8-NEXT: v_mul_legacy_f32_e32 v0, v0, v1 266; GFX8-NEXT: v_add_f32_e32 v0, v0, v2 267; GFX8-NEXT: s_setpc_b64 s[30:31] 268; 269; GFX9-LABEL: v_add_mul_legacy_f32: 270; GFX9: ; %bb.0: 271; GFX9-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) 272; GFX9-NEXT: v_mul_legacy_f32_e32 v0, v0, v1 273; GFX9-NEXT: v_add_f32_e32 v0, v0, v2 274; GFX9-NEXT: s_setpc_b64 s[30:31] 275; 276; GFX101-LABEL: v_add_mul_legacy_f32: 277; GFX101: ; %bb.0: 278; GFX101-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) 279; GFX101-NEXT: v_mul_legacy_f32_e32 v0, v0, v1 280; GFX101-NEXT: v_add_f32_e32 v0, v0, v2 281; GFX101-NEXT: s_setpc_b64 s[30:31] 282; 283; GFX103-LABEL: v_add_mul_legacy_f32: 284; GFX103: ; %bb.0: 285; GFX103-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) 286; GFX103-NEXT: v_mul_legacy_f32_e32 v0, v0, v1 287; GFX103-NEXT: v_add_f32_e32 v0, v0, v2 288; GFX103-NEXT: s_setpc_b64 s[30:31] 289; 290; GFX11-LABEL: v_add_mul_legacy_f32: 291; GFX11: ; %bb.0: 292; GFX11-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) 293; GFX11-NEXT: v_mul_dx9_zero_f32_e32 v0, v0, v1 294; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1) 295; GFX11-NEXT: v_add_f32_e32 v0, v0, v2 296; GFX11-NEXT: s_setpc_b64 s[30:31] 297 %mul = call float @llvm.amdgcn.fmul.legacy(float %a, float %b) 298 %add = fadd float %mul, %c 299 ret float %add 300} 301 302define float @v_mad_legacy_f32(float %a, float %b, float %c) #2 { 303; GFX6-LABEL: v_mad_legacy_f32: 304; GFX6: ; %bb.0: 305; GFX6-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) 306; GFX6-NEXT: v_mad_legacy_f32 v0, v0, v1, v2 307; GFX6-NEXT: s_setpc_b64 s[30:31] 308; 309; GFX8-LABEL: v_mad_legacy_f32: 310; GFX8: ; %bb.0: 311; GFX8-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) 312; GFX8-NEXT: v_mad_legacy_f32 v0, v0, v1, v2 313; GFX8-NEXT: s_setpc_b64 s[30:31] 314; 315; GFX9-LABEL: v_mad_legacy_f32: 316; GFX9: ; %bb.0: 317; GFX9-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) 318; GFX9-NEXT: v_mad_legacy_f32 v0, v0, v1, v2 319; GFX9-NEXT: s_setpc_b64 s[30:31] 320; 321; GFX101-LABEL: v_mad_legacy_f32: 322; GFX101: ; %bb.0: 323; GFX101-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) 324; GFX101-NEXT: v_mad_legacy_f32 v0, v0, v1, v2 325; GFX101-NEXT: s_setpc_b64 s[30:31] 326; 327; GFX103-LABEL: v_mad_legacy_f32: 328; GFX103: ; %bb.0: 329; GFX103-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) 330; GFX103-NEXT: v_mul_legacy_f32_e32 v0, v0, v1 331; GFX103-NEXT: v_add_f32_e32 v0, v0, v2 332; GFX103-NEXT: s_setpc_b64 s[30:31] 333; 334; GFX11-LABEL: v_mad_legacy_f32: 335; GFX11: ; %bb.0: 336; GFX11-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) 337; GFX11-NEXT: v_mul_dx9_zero_f32_e32 v0, v0, v1 338; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1) 339; GFX11-NEXT: v_add_f32_e32 v0, v0, v2 340; GFX11-NEXT: s_setpc_b64 s[30:31] 341 %mul = call float @llvm.amdgcn.fmul.legacy(float %a, float %b) 342 %add = fadd float %mul, %c 343 ret float %add 344} 345 346define float @v_mad_legacy_fneg_f32(float %a, float %b, float %c) #2 { 347; GFX6-LABEL: v_mad_legacy_fneg_f32: 348; GFX6: ; %bb.0: 349; GFX6-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) 350; GFX6-NEXT: v_mad_legacy_f32 v0, -v0, -v1, v2 351; GFX6-NEXT: s_setpc_b64 s[30:31] 352; 353; GFX8-LABEL: v_mad_legacy_fneg_f32: 354; GFX8: ; %bb.0: 355; GFX8-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) 356; GFX8-NEXT: v_mad_legacy_f32 v0, -v0, -v1, v2 357; GFX8-NEXT: s_setpc_b64 s[30:31] 358; 359; GFX9-LABEL: v_mad_legacy_fneg_f32: 360; GFX9: ; %bb.0: 361; GFX9-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) 362; GFX9-NEXT: v_mad_legacy_f32 v0, -v0, -v1, v2 363; GFX9-NEXT: s_setpc_b64 s[30:31] 364; 365; GFX101-LABEL: v_mad_legacy_fneg_f32: 366; GFX101: ; %bb.0: 367; GFX101-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) 368; GFX101-NEXT: v_mad_legacy_f32 v0, -v0, -v1, v2 369; GFX101-NEXT: s_setpc_b64 s[30:31] 370; 371; GFX103-LABEL: v_mad_legacy_fneg_f32: 372; GFX103: ; %bb.0: 373; GFX103-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) 374; GFX103-NEXT: v_mul_legacy_f32_e64 v0, -v0, -v1 375; GFX103-NEXT: v_add_f32_e32 v0, v0, v2 376; GFX103-NEXT: s_setpc_b64 s[30:31] 377; 378; GFX11-LABEL: v_mad_legacy_fneg_f32: 379; GFX11: ; %bb.0: 380; GFX11-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) 381; GFX11-NEXT: v_mul_dx9_zero_f32_e64 v0, -v0, -v1 382; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1) 383; GFX11-NEXT: v_add_f32_e32 v0, v0, v2 384; GFX11-NEXT: s_setpc_b64 s[30:31] 385 %a.fneg = fneg float %a 386 %b.fneg = fneg float %b 387 %mul = call float @llvm.amdgcn.fmul.legacy(float %a.fneg, float %b.fneg) 388 %add = fadd float %mul, %c 389 ret float %add 390} 391 392define amdgpu_ps float @s_mul_legacy_f32(float inreg %a, float inreg %b) { 393; GFX6-LABEL: s_mul_legacy_f32: 394; GFX6: ; %bb.0: 395; GFX6-NEXT: v_mov_b32_e32 v0, s1 396; GFX6-NEXT: v_mul_legacy_f32_e32 v0, s0, v0 397; GFX6-NEXT: ; return to shader part epilog 398; 399; GFX8-LABEL: s_mul_legacy_f32: 400; GFX8: ; %bb.0: 401; GFX8-NEXT: v_mov_b32_e32 v0, s1 402; GFX8-NEXT: v_mul_legacy_f32_e32 v0, s0, v0 403; GFX8-NEXT: ; return to shader part epilog 404; 405; GFX9-LABEL: s_mul_legacy_f32: 406; GFX9: ; %bb.0: 407; GFX9-NEXT: v_mov_b32_e32 v0, s1 408; GFX9-NEXT: v_mul_legacy_f32_e32 v0, s0, v0 409; GFX9-NEXT: ; return to shader part epilog 410; 411; GFX101-LABEL: s_mul_legacy_f32: 412; GFX101: ; %bb.0: 413; GFX101-NEXT: v_mul_legacy_f32_e64 v0, s0, s1 414; GFX101-NEXT: ; return to shader part epilog 415; 416; GFX103-LABEL: s_mul_legacy_f32: 417; GFX103: ; %bb.0: 418; GFX103-NEXT: v_mul_legacy_f32_e64 v0, s0, s1 419; GFX103-NEXT: ; return to shader part epilog 420; 421; GFX11-LABEL: s_mul_legacy_f32: 422; GFX11: ; %bb.0: 423; GFX11-NEXT: v_mul_dx9_zero_f32_e64 v0, s0, s1 424; GFX11-NEXT: ; return to shader part epilog 425 %result = call float @llvm.amdgcn.fmul.legacy(float %a, float %b) 426 ret float %result 427} 428 429define float @v_mul_legacy_f32_1.0(float %a) { 430; GFX6-LABEL: v_mul_legacy_f32_1.0: 431; GFX6: ; %bb.0: 432; GFX6-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) 433; GFX6-NEXT: v_mul_legacy_f32_e32 v0, 1.0, v0 434; GFX6-NEXT: s_setpc_b64 s[30:31] 435; 436; GFX8-LABEL: v_mul_legacy_f32_1.0: 437; GFX8: ; %bb.0: 438; GFX8-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) 439; GFX8-NEXT: v_mul_legacy_f32_e32 v0, 1.0, v0 440; GFX8-NEXT: s_setpc_b64 s[30:31] 441; 442; GFX9-LABEL: v_mul_legacy_f32_1.0: 443; GFX9: ; %bb.0: 444; GFX9-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) 445; GFX9-NEXT: v_mul_legacy_f32_e32 v0, 1.0, v0 446; GFX9-NEXT: s_setpc_b64 s[30:31] 447; 448; GFX101-LABEL: v_mul_legacy_f32_1.0: 449; GFX101: ; %bb.0: 450; GFX101-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) 451; GFX101-NEXT: v_mul_legacy_f32_e32 v0, 1.0, v0 452; GFX101-NEXT: s_setpc_b64 s[30:31] 453; 454; GFX103-LABEL: v_mul_legacy_f32_1.0: 455; GFX103: ; %bb.0: 456; GFX103-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) 457; GFX103-NEXT: v_mul_legacy_f32_e32 v0, 1.0, v0 458; GFX103-NEXT: s_setpc_b64 s[30:31] 459; 460; GFX11-LABEL: v_mul_legacy_f32_1.0: 461; GFX11: ; %bb.0: 462; GFX11-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) 463; GFX11-NEXT: v_mul_dx9_zero_f32_e32 v0, 1.0, v0 464; GFX11-NEXT: s_setpc_b64 s[30:31] 465 %result = call float @llvm.amdgcn.fmul.legacy(float %a, float 1.0) 466 ret float %result 467} 468 469define float @v_mul_legacy_f32_1.0_swap(float %b) { 470; GFX6-LABEL: v_mul_legacy_f32_1.0_swap: 471; GFX6: ; %bb.0: 472; GFX6-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) 473; GFX6-NEXT: v_mul_legacy_f32_e32 v0, 1.0, v0 474; GFX6-NEXT: s_setpc_b64 s[30:31] 475; 476; GFX8-LABEL: v_mul_legacy_f32_1.0_swap: 477; GFX8: ; %bb.0: 478; GFX8-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) 479; GFX8-NEXT: v_mul_legacy_f32_e32 v0, 1.0, v0 480; GFX8-NEXT: s_setpc_b64 s[30:31] 481; 482; GFX9-LABEL: v_mul_legacy_f32_1.0_swap: 483; GFX9: ; %bb.0: 484; GFX9-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) 485; GFX9-NEXT: v_mul_legacy_f32_e32 v0, 1.0, v0 486; GFX9-NEXT: s_setpc_b64 s[30:31] 487; 488; GFX101-LABEL: v_mul_legacy_f32_1.0_swap: 489; GFX101: ; %bb.0: 490; GFX101-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) 491; GFX101-NEXT: v_mul_legacy_f32_e32 v0, 1.0, v0 492; GFX101-NEXT: s_setpc_b64 s[30:31] 493; 494; GFX103-LABEL: v_mul_legacy_f32_1.0_swap: 495; GFX103: ; %bb.0: 496; GFX103-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) 497; GFX103-NEXT: v_mul_legacy_f32_e32 v0, 1.0, v0 498; GFX103-NEXT: s_setpc_b64 s[30:31] 499; 500; GFX11-LABEL: v_mul_legacy_f32_1.0_swap: 501; GFX11: ; %bb.0: 502; GFX11-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) 503; GFX11-NEXT: v_mul_dx9_zero_f32_e32 v0, 1.0, v0 504; GFX11-NEXT: s_setpc_b64 s[30:31] 505 %result = call float @llvm.amdgcn.fmul.legacy(float 1.0, float %b) 506 ret float %result 507} 508 509define float @v_mul_legacy_f32_2.0(float %a) { 510; GFX6-LABEL: v_mul_legacy_f32_2.0: 511; GFX6: ; %bb.0: 512; GFX6-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) 513; GFX6-NEXT: v_mul_legacy_f32_e32 v0, 2.0, v0 514; GFX6-NEXT: s_setpc_b64 s[30:31] 515; 516; GFX8-LABEL: v_mul_legacy_f32_2.0: 517; GFX8: ; %bb.0: 518; GFX8-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) 519; GFX8-NEXT: v_mul_legacy_f32_e32 v0, 2.0, v0 520; GFX8-NEXT: s_setpc_b64 s[30:31] 521; 522; GFX9-LABEL: v_mul_legacy_f32_2.0: 523; GFX9: ; %bb.0: 524; GFX9-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) 525; GFX9-NEXT: v_mul_legacy_f32_e32 v0, 2.0, v0 526; GFX9-NEXT: s_setpc_b64 s[30:31] 527; 528; GFX101-LABEL: v_mul_legacy_f32_2.0: 529; GFX101: ; %bb.0: 530; GFX101-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) 531; GFX101-NEXT: v_mul_legacy_f32_e32 v0, 2.0, v0 532; GFX101-NEXT: s_setpc_b64 s[30:31] 533; 534; GFX103-LABEL: v_mul_legacy_f32_2.0: 535; GFX103: ; %bb.0: 536; GFX103-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) 537; GFX103-NEXT: v_mul_legacy_f32_e32 v0, 2.0, v0 538; GFX103-NEXT: s_setpc_b64 s[30:31] 539; 540; GFX11-LABEL: v_mul_legacy_f32_2.0: 541; GFX11: ; %bb.0: 542; GFX11-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) 543; GFX11-NEXT: v_mul_dx9_zero_f32_e32 v0, 2.0, v0 544; GFX11-NEXT: s_setpc_b64 s[30:31] 545 %result = call float @llvm.amdgcn.fmul.legacy(float %a, float 2.0) 546 ret float %result 547} 548 549define float @v_mul_legacy_f32_2.0_swap(float %b) { 550; GFX6-LABEL: v_mul_legacy_f32_2.0_swap: 551; GFX6: ; %bb.0: 552; GFX6-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) 553; GFX6-NEXT: v_mul_legacy_f32_e32 v0, 2.0, v0 554; GFX6-NEXT: s_setpc_b64 s[30:31] 555; 556; GFX8-LABEL: v_mul_legacy_f32_2.0_swap: 557; GFX8: ; %bb.0: 558; GFX8-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) 559; GFX8-NEXT: v_mul_legacy_f32_e32 v0, 2.0, v0 560; GFX8-NEXT: s_setpc_b64 s[30:31] 561; 562; GFX9-LABEL: v_mul_legacy_f32_2.0_swap: 563; GFX9: ; %bb.0: 564; GFX9-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) 565; GFX9-NEXT: v_mul_legacy_f32_e32 v0, 2.0, v0 566; GFX9-NEXT: s_setpc_b64 s[30:31] 567; 568; GFX101-LABEL: v_mul_legacy_f32_2.0_swap: 569; GFX101: ; %bb.0: 570; GFX101-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) 571; GFX101-NEXT: v_mul_legacy_f32_e32 v0, 2.0, v0 572; GFX101-NEXT: s_setpc_b64 s[30:31] 573; 574; GFX103-LABEL: v_mul_legacy_f32_2.0_swap: 575; GFX103: ; %bb.0: 576; GFX103-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) 577; GFX103-NEXT: v_mul_legacy_f32_e32 v0, 2.0, v0 578; GFX103-NEXT: s_setpc_b64 s[30:31] 579; 580; GFX11-LABEL: v_mul_legacy_f32_2.0_swap: 581; GFX11: ; %bb.0: 582; GFX11-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) 583; GFX11-NEXT: v_mul_dx9_zero_f32_e32 v0, 2.0, v0 584; GFX11-NEXT: s_setpc_b64 s[30:31] 585 %result = call float @llvm.amdgcn.fmul.legacy(float 2.0, float %b) 586 ret float %result 587} 588 589declare float @llvm.fabs.f32(float) #0 590declare float @llvm.amdgcn.fmul.legacy(float, float) #1 591 592attributes #0 = { nounwind readnone speculatable willreturn } 593attributes #1 = { nounwind readnone speculatable } 594attributes #2 = { "denormal-fp-math-f32"="preserve-sign" } 595