1# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py 2# RUN: llc -mtriple=amdgcn-mesa-mesa3d -run-pass=legalizer -global-isel-abort=0 %s -o - | FileCheck %s 3 4--- 5name: test_insert_s64_s32_offset0 6body: | 7 bb.0: 8 liveins: $vgpr0_vgpr1, $vgpr2 9 10 ; CHECK-LABEL: name: test_insert_s64_s32_offset0 11 ; CHECK: liveins: $vgpr0_vgpr1, $vgpr2 12 ; CHECK-NEXT: {{ $}} 13 ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(s64) = COPY $vgpr0_vgpr1 14 ; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(s32) = COPY $vgpr2 15 ; CHECK-NEXT: [[INSERT:%[0-9]+]]:_(s64) = G_INSERT [[COPY]], [[COPY1]](s32), 0 16 ; CHECK-NEXT: $vgpr0_vgpr1 = COPY [[INSERT]](s64) 17 %0:_(s64) = COPY $vgpr0_vgpr1 18 %1:_(s32) = COPY $vgpr2 19 %2:_(s64) = G_INSERT %0, %1, 0 20 $vgpr0_vgpr1 = COPY %2 21... 22--- 23name: test_insert_s64_s32_offset32 24body: | 25 bb.0: 26 liveins: $vgpr0_vgpr1, $vgpr2 27 28 ; CHECK-LABEL: name: test_insert_s64_s32_offset32 29 ; CHECK: liveins: $vgpr0_vgpr1, $vgpr2 30 ; CHECK-NEXT: {{ $}} 31 ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(s64) = COPY $vgpr0_vgpr1 32 ; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(s32) = COPY $vgpr2 33 ; CHECK-NEXT: [[INSERT:%[0-9]+]]:_(s64) = G_INSERT [[COPY]], [[COPY1]](s32), 32 34 ; CHECK-NEXT: $vgpr0_vgpr1 = COPY [[INSERT]](s64) 35 %0:_(s64) = COPY $vgpr0_vgpr1 36 %1:_(s32) = COPY $vgpr2 37 %2:_(s64) = G_INSERT %0, %1, 32 38 $vgpr0_vgpr1 = COPY %2 39... 40 41--- 42name: test_insert_s64_s32_offset16 43body: | 44 bb.0: 45 liveins: $vgpr0_vgpr1, $vgpr2 46 47 ; CHECK-LABEL: name: test_insert_s64_s32_offset16 48 ; CHECK: liveins: $vgpr0_vgpr1, $vgpr2 49 ; CHECK-NEXT: {{ $}} 50 ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(s64) = COPY $vgpr0_vgpr1 51 ; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(s32) = COPY $vgpr2 52 ; CHECK-NEXT: [[INSERT:%[0-9]+]]:_(s64) = G_INSERT [[COPY]], [[COPY1]](s32), 16 53 ; CHECK-NEXT: $vgpr0_vgpr1 = COPY [[INSERT]](s64) 54 %0:_(s64) = COPY $vgpr0_vgpr1 55 %1:_(s32) = COPY $vgpr2 56 %2:_(s64) = G_INSERT %0, %1, 16 57 $vgpr0_vgpr1 = COPY %2 58... 59 60--- 61name: test_insert_s96_s32_offset0 62body: | 63 bb.0: 64 liveins: $vgpr0_vgpr1_vgpr2, $vgpr3 65 66 ; CHECK-LABEL: name: test_insert_s96_s32_offset0 67 ; CHECK: liveins: $vgpr0_vgpr1_vgpr2, $vgpr3 68 ; CHECK-NEXT: {{ $}} 69 ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(s96) = COPY $vgpr0_vgpr1_vgpr2 70 ; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(s32) = COPY $vgpr3 71 ; CHECK-NEXT: [[INSERT:%[0-9]+]]:_(s96) = G_INSERT [[COPY]], [[COPY1]](s32), 0 72 ; CHECK-NEXT: $vgpr0_vgpr1_vgpr2 = COPY [[INSERT]](s96) 73 %0:_(s96) = COPY $vgpr0_vgpr1_vgpr2 74 %1:_(s32) = COPY $vgpr3 75 %2:_(s96) = G_INSERT %0, %1, 0 76 $vgpr0_vgpr1_vgpr2 = COPY %2 77... 78--- 79name: test_insert_s96_s32_offset32 80body: | 81 bb.0: 82 liveins: $vgpr0_vgpr1_vgpr2, $vgpr3 83 84 ; CHECK-LABEL: name: test_insert_s96_s32_offset32 85 ; CHECK: liveins: $vgpr0_vgpr1_vgpr2, $vgpr3 86 ; CHECK-NEXT: {{ $}} 87 ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(s96) = COPY $vgpr0_vgpr1_vgpr2 88 ; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(s32) = COPY $vgpr3 89 ; CHECK-NEXT: [[INSERT:%[0-9]+]]:_(s96) = G_INSERT [[COPY]], [[COPY1]](s32), 32 90 ; CHECK-NEXT: $vgpr0_vgpr1_vgpr2 = COPY [[INSERT]](s96) 91 %0:_(s96) = COPY $vgpr0_vgpr1_vgpr2 92 %1:_(s32) = COPY $vgpr3 93 %2:_(s96) = G_INSERT %0, %1, 32 94 $vgpr0_vgpr1_vgpr2 = COPY %2 95... 96--- 97name: test_insert_s96_s32_offset64 98body: | 99 bb.0: 100 liveins: $vgpr0_vgpr1_vgpr2, $vgpr3 101 102 ; CHECK-LABEL: name: test_insert_s96_s32_offset64 103 ; CHECK: liveins: $vgpr0_vgpr1_vgpr2, $vgpr3 104 ; CHECK-NEXT: {{ $}} 105 ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(s96) = COPY $vgpr0_vgpr1_vgpr2 106 ; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(s32) = COPY $vgpr3 107 ; CHECK-NEXT: [[INSERT:%[0-9]+]]:_(s96) = G_INSERT [[COPY]], [[COPY1]](s32), 64 108 ; CHECK-NEXT: $vgpr0_vgpr1_vgpr2 = COPY [[INSERT]](s96) 109 %0:_(s96) = COPY $vgpr0_vgpr1_vgpr2 110 %1:_(s32) = COPY $vgpr3 111 %2:_(s96) = G_INSERT %0, %1, 64 112 $vgpr0_vgpr1_vgpr2 = COPY %2 113... 114--- 115name: test_insert_s128_s32_offset0 116body: | 117 bb.0: 118 liveins: $vgpr0_vgpr1_vgpr2_vgpr3, $vgpr4 119 120 ; CHECK-LABEL: name: test_insert_s128_s32_offset0 121 ; CHECK: liveins: $vgpr0_vgpr1_vgpr2_vgpr3, $vgpr4 122 ; CHECK-NEXT: {{ $}} 123 ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(s128) = COPY $vgpr0_vgpr1_vgpr2_vgpr3 124 ; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(s32) = COPY $vgpr4 125 ; CHECK-NEXT: [[INSERT:%[0-9]+]]:_(s128) = G_INSERT [[COPY]], [[COPY1]](s32), 0 126 ; CHECK-NEXT: $vgpr0_vgpr1_vgpr2_vgpr3 = COPY [[INSERT]](s128) 127 %0:_(s128) = COPY $vgpr0_vgpr1_vgpr2_vgpr3 128 %1:_(s32) = COPY $vgpr4 129 %2:_(s128) = G_INSERT %0, %1, 0 130 $vgpr0_vgpr1_vgpr2_vgpr3 = COPY %2 131... 132--- 133name: test_insert_s128_s32_offset32 134body: | 135 bb.0: 136 liveins: $vgpr0_vgpr1_vgpr2_vgpr3, $vgpr4 137 138 ; CHECK-LABEL: name: test_insert_s128_s32_offset32 139 ; CHECK: liveins: $vgpr0_vgpr1_vgpr2_vgpr3, $vgpr4 140 ; CHECK-NEXT: {{ $}} 141 ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(s128) = COPY $vgpr0_vgpr1_vgpr2_vgpr3 142 ; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(s32) = COPY $vgpr4 143 ; CHECK-NEXT: [[INSERT:%[0-9]+]]:_(s128) = G_INSERT [[COPY]], [[COPY1]](s32), 32 144 ; CHECK-NEXT: $vgpr0_vgpr1_vgpr2_vgpr3 = COPY [[INSERT]](s128) 145 %0:_(s128) = COPY $vgpr0_vgpr1_vgpr2_vgpr3 146 %1:_(s32) = COPY $vgpr4 147 %2:_(s128) = G_INSERT %0, %1, 32 148 $vgpr0_vgpr1_vgpr2_vgpr3 = COPY %2 149... 150--- 151name: test_insert_s128_s32_offset64 152body: | 153 bb.0: 154 liveins: $vgpr0_vgpr1_vgpr2_vgpr3, $vgpr4 155 156 ; CHECK-LABEL: name: test_insert_s128_s32_offset64 157 ; CHECK: liveins: $vgpr0_vgpr1_vgpr2_vgpr3, $vgpr4 158 ; CHECK-NEXT: {{ $}} 159 ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(s128) = COPY $vgpr0_vgpr1_vgpr2_vgpr3 160 ; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(s32) = COPY $vgpr4 161 ; CHECK-NEXT: [[INSERT:%[0-9]+]]:_(s128) = G_INSERT [[COPY]], [[COPY1]](s32), 64 162 ; CHECK-NEXT: $vgpr0_vgpr1_vgpr2_vgpr3 = COPY [[INSERT]](s128) 163 %0:_(s128) = COPY $vgpr0_vgpr1_vgpr2_vgpr3 164 %1:_(s32) = COPY $vgpr4 165 %2:_(s128) = G_INSERT %0, %1, 64 166 $vgpr0_vgpr1_vgpr2_vgpr3 = COPY %2 167... 168--- 169name: test_insert_s128_s32_offset96 170body: | 171 bb.0: 172 liveins: $vgpr0_vgpr1_vgpr2_vgpr3, $vgpr4 173 174 ; CHECK-LABEL: name: test_insert_s128_s32_offset96 175 ; CHECK: liveins: $vgpr0_vgpr1_vgpr2_vgpr3, $vgpr4 176 ; CHECK-NEXT: {{ $}} 177 ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(s128) = COPY $vgpr0_vgpr1_vgpr2_vgpr3 178 ; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(s32) = COPY $vgpr4 179 ; CHECK-NEXT: [[INSERT:%[0-9]+]]:_(s128) = G_INSERT [[COPY]], [[COPY1]](s32), 96 180 ; CHECK-NEXT: $vgpr0_vgpr1_vgpr2_vgpr3 = COPY [[INSERT]](s128) 181 %0:_(s128) = COPY $vgpr0_vgpr1_vgpr2_vgpr3 182 %1:_(s32) = COPY $vgpr4 183 %2:_(s128) = G_INSERT %0, %1, 96 184 $vgpr0_vgpr1_vgpr2_vgpr3 = COPY %2 185... 186--- 187name: test_insert_s128_s64_offset0 188body: | 189 bb.0: 190 liveins: $vgpr0_vgpr1_vgpr2_vgpr3, $vgpr4_vgpr5 191 192 ; CHECK-LABEL: name: test_insert_s128_s64_offset0 193 ; CHECK: liveins: $vgpr0_vgpr1_vgpr2_vgpr3, $vgpr4_vgpr5 194 ; CHECK-NEXT: {{ $}} 195 ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(s128) = COPY $vgpr0_vgpr1_vgpr2_vgpr3 196 ; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(s64) = COPY $vgpr4_vgpr5 197 ; CHECK-NEXT: [[INSERT:%[0-9]+]]:_(s128) = G_INSERT [[COPY]], [[COPY1]](s64), 0 198 ; CHECK-NEXT: $vgpr0_vgpr1_vgpr2_vgpr3 = COPY [[INSERT]](s128) 199 %0:_(s128) = COPY $vgpr0_vgpr1_vgpr2_vgpr3 200 %1:_(s64) = COPY $vgpr4_vgpr5 201 %2:_(s128) = G_INSERT %0, %1, 0 202 $vgpr0_vgpr1_vgpr2_vgpr3 = COPY %2 203... 204--- 205name: test_insert_s128_s64_offset32 206body: | 207 bb.0: 208 liveins: $vgpr0_vgpr1_vgpr2_vgpr3, $vgpr4_vgpr5 209 210 ; CHECK-LABEL: name: test_insert_s128_s64_offset32 211 ; CHECK: liveins: $vgpr0_vgpr1_vgpr2_vgpr3, $vgpr4_vgpr5 212 ; CHECK-NEXT: {{ $}} 213 ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(s128) = COPY $vgpr0_vgpr1_vgpr2_vgpr3 214 ; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(s64) = COPY $vgpr4_vgpr5 215 ; CHECK-NEXT: [[INSERT:%[0-9]+]]:_(s128) = G_INSERT [[COPY]], [[COPY1]](s64), 32 216 ; CHECK-NEXT: $vgpr0_vgpr1_vgpr2_vgpr3 = COPY [[INSERT]](s128) 217 %0:_(s128) = COPY $vgpr0_vgpr1_vgpr2_vgpr3 218 %1:_(s64) = COPY $vgpr4_vgpr5 219 %2:_(s128) = G_INSERT %0, %1, 32 220 $vgpr0_vgpr1_vgpr2_vgpr3 = COPY %2 221... 222--- 223name: test_insert_s128_s64_offset64 224body: | 225 bb.0: 226 liveins: $vgpr0_vgpr1_vgpr2_vgpr3, $vgpr4_vgpr5 227 228 ; CHECK-LABEL: name: test_insert_s128_s64_offset64 229 ; CHECK: liveins: $vgpr0_vgpr1_vgpr2_vgpr3, $vgpr4_vgpr5 230 ; CHECK-NEXT: {{ $}} 231 ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(s128) = COPY $vgpr0_vgpr1_vgpr2_vgpr3 232 ; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(s64) = COPY $vgpr4_vgpr5 233 ; CHECK-NEXT: [[INSERT:%[0-9]+]]:_(s128) = G_INSERT [[COPY]], [[COPY1]](s64), 64 234 ; CHECK-NEXT: $vgpr0_vgpr1_vgpr2_vgpr3 = COPY [[INSERT]](s128) 235 %0:_(s128) = COPY $vgpr0_vgpr1_vgpr2_vgpr3 236 %1:_(s64) = COPY $vgpr4_vgpr5 237 %2:_(s128) = G_INSERT %0, %1, 64 238 $vgpr0_vgpr1_vgpr2_vgpr3 = COPY %2 239... 240--- 241name: test_insert_s128_s96_offset0 242body: | 243 bb.0: 244 liveins: $vgpr0_vgpr1_vgpr2_vgpr3, $vgpr4_vgpr5_vgpr6 245 246 ; CHECK-LABEL: name: test_insert_s128_s96_offset0 247 ; CHECK: liveins: $vgpr0_vgpr1_vgpr2_vgpr3, $vgpr4_vgpr5_vgpr6 248 ; CHECK-NEXT: {{ $}} 249 ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(s128) = COPY $vgpr0_vgpr1_vgpr2_vgpr3 250 ; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(s96) = COPY $vgpr4_vgpr5_vgpr6 251 ; CHECK-NEXT: [[INSERT:%[0-9]+]]:_(s128) = G_INSERT [[COPY]], [[COPY1]](s96), 0 252 ; CHECK-NEXT: $vgpr0_vgpr1_vgpr2_vgpr3 = COPY [[INSERT]](s128) 253 %0:_(s128) = COPY $vgpr0_vgpr1_vgpr2_vgpr3 254 %1:_(s96) = COPY $vgpr4_vgpr5_vgpr6 255 %2:_(s128) = G_INSERT %0, %1, 0 256 $vgpr0_vgpr1_vgpr2_vgpr3 = COPY %2 257... 258--- 259name: test_insert_s128_s96_offset32 260body: | 261 bb.0: 262 liveins: $vgpr0_vgpr1_vgpr2_vgpr3, $vgpr4_vgpr5_vgpr6 263 264 ; CHECK-LABEL: name: test_insert_s128_s96_offset32 265 ; CHECK: liveins: $vgpr0_vgpr1_vgpr2_vgpr3, $vgpr4_vgpr5_vgpr6 266 ; CHECK-NEXT: {{ $}} 267 ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(s128) = COPY $vgpr0_vgpr1_vgpr2_vgpr3 268 ; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(s96) = COPY $vgpr4_vgpr5_vgpr6 269 ; CHECK-NEXT: [[INSERT:%[0-9]+]]:_(s128) = G_INSERT [[COPY]], [[COPY1]](s96), 32 270 ; CHECK-NEXT: $vgpr0_vgpr1_vgpr2_vgpr3 = COPY [[INSERT]](s128) 271 %0:_(s128) = COPY $vgpr0_vgpr1_vgpr2_vgpr3 272 %1:_(s96) = COPY $vgpr4_vgpr5_vgpr6 273 %2:_(s128) = G_INSERT %0, %1, 32 274 $vgpr0_vgpr1_vgpr2_vgpr3 = COPY %2 275... 276--- 277name: test_insert_p0_s32_offset0 278body: | 279 bb.0: 280 liveins: $vgpr0_vgpr1, $vgpr2 281 282 ; CHECK-LABEL: name: test_insert_p0_s32_offset0 283 ; CHECK: liveins: $vgpr0_vgpr1, $vgpr2 284 ; CHECK-NEXT: {{ $}} 285 ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(p0) = COPY $vgpr0_vgpr1 286 ; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(s32) = COPY $vgpr2 287 ; CHECK-NEXT: [[INSERT:%[0-9]+]]:_(p0) = G_INSERT [[COPY]], [[COPY1]](s32), 0 288 ; CHECK-NEXT: $vgpr0_vgpr1 = COPY [[INSERT]](p0) 289 %0:_(p0) = COPY $vgpr0_vgpr1 290 %1:_(s32) = COPY $vgpr2 291 %2:_(p0) = G_INSERT %0, %1, 0 292 $vgpr0_vgpr1 = COPY %2 293... 294--- 295name: test_insert_p0_s32_offset32 296body: | 297 bb.0: 298 liveins: $vgpr0_vgpr1, $vgpr2 299 300 ; CHECK-LABEL: name: test_insert_p0_s32_offset32 301 ; CHECK: liveins: $vgpr0_vgpr1, $vgpr2 302 ; CHECK-NEXT: {{ $}} 303 ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(p0) = COPY $vgpr0_vgpr1 304 ; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(s32) = COPY $vgpr2 305 ; CHECK-NEXT: [[INSERT:%[0-9]+]]:_(p0) = G_INSERT [[COPY]], [[COPY1]](s32), 32 306 ; CHECK-NEXT: $vgpr0_vgpr1 = COPY [[INSERT]](p0) 307 %0:_(p0) = COPY $vgpr0_vgpr1 308 %1:_(s32) = COPY $vgpr2 309 %2:_(p0) = G_INSERT %0, %1, 32 310 $vgpr0_vgpr1 = COPY %2 311... 312--- 313name: test_insert_s128_p0_offset0 314body: | 315 bb.0: 316 liveins: $vgpr0_vgpr1_vgpr2_vgpr3, $vgpr4_vgpr5 317 318 ; CHECK-LABEL: name: test_insert_s128_p0_offset0 319 ; CHECK: liveins: $vgpr0_vgpr1_vgpr2_vgpr3, $vgpr4_vgpr5 320 ; CHECK-NEXT: {{ $}} 321 ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(s128) = COPY $vgpr0_vgpr1_vgpr2_vgpr3 322 ; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(p0) = COPY $vgpr4_vgpr5 323 ; CHECK-NEXT: [[INSERT:%[0-9]+]]:_(s128) = G_INSERT [[COPY]], [[COPY1]](p0), 0 324 ; CHECK-NEXT: $vgpr0_vgpr1_vgpr2_vgpr3 = COPY [[INSERT]](s128) 325 %0:_(s128) = COPY $vgpr0_vgpr1_vgpr2_vgpr3 326 %1:_(p0) = COPY $vgpr4_vgpr5 327 %2:_(s128) = G_INSERT %0, %1, 0 328 $vgpr0_vgpr1_vgpr2_vgpr3 = COPY %2 329... 330--- 331name: test_insert_s128_p0_offset32 332body: | 333 bb.0: 334 liveins: $vgpr0_vgpr1_vgpr2_vgpr3, $vgpr4_vgpr5 335 336 ; CHECK-LABEL: name: test_insert_s128_p0_offset32 337 ; CHECK: liveins: $vgpr0_vgpr1_vgpr2_vgpr3, $vgpr4_vgpr5 338 ; CHECK-NEXT: {{ $}} 339 ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(s128) = COPY $vgpr0_vgpr1_vgpr2_vgpr3 340 ; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(p0) = COPY $vgpr4_vgpr5 341 ; CHECK-NEXT: [[INSERT:%[0-9]+]]:_(s128) = G_INSERT [[COPY]], [[COPY1]](p0), 32 342 ; CHECK-NEXT: $vgpr0_vgpr1_vgpr2_vgpr3 = COPY [[INSERT]](s128) 343 %0:_(s128) = COPY $vgpr0_vgpr1_vgpr2_vgpr3 344 %1:_(p0) = COPY $vgpr4_vgpr5 345 %2:_(s128) = G_INSERT %0, %1, 32 346 $vgpr0_vgpr1_vgpr2_vgpr3 = COPY %2 347... 348--- 349name: test_insert_s128_p0_offset64 350body: | 351 bb.0: 352 liveins: $vgpr0_vgpr1_vgpr2_vgpr3, $vgpr4_vgpr5 353 354 ; CHECK-LABEL: name: test_insert_s128_p0_offset64 355 ; CHECK: liveins: $vgpr0_vgpr1_vgpr2_vgpr3, $vgpr4_vgpr5 356 ; CHECK-NEXT: {{ $}} 357 ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(s128) = COPY $vgpr0_vgpr1_vgpr2_vgpr3 358 ; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(p0) = COPY $vgpr4_vgpr5 359 ; CHECK-NEXT: [[INSERT:%[0-9]+]]:_(s128) = G_INSERT [[COPY]], [[COPY1]](p0), 64 360 ; CHECK-NEXT: $vgpr0_vgpr1_vgpr2_vgpr3 = COPY [[INSERT]](s128) 361 %0:_(s128) = COPY $vgpr0_vgpr1_vgpr2_vgpr3 362 %1:_(p0) = COPY $vgpr4_vgpr5 363 %2:_(s128) = G_INSERT %0, %1, 64 364 $vgpr0_vgpr1_vgpr2_vgpr3 = COPY %2 365... 366 367--- 368name: test_insert_s128_s16_offset0 369body: | 370 bb.0: 371 liveins: $vgpr0_vgpr1_vgpr2_vgpr3, $vgpr4 372 373 ; CHECK-LABEL: name: test_insert_s128_s16_offset0 374 ; CHECK: liveins: $vgpr0_vgpr1_vgpr2_vgpr3, $vgpr4 375 ; CHECK-NEXT: {{ $}} 376 ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(s128) = COPY $vgpr0_vgpr1_vgpr2_vgpr3 377 ; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(s32) = COPY $vgpr4 378 ; CHECK-NEXT: [[TRUNC:%[0-9]+]]:_(s16) = G_TRUNC [[COPY1]](s32) 379 ; CHECK-NEXT: [[INSERT:%[0-9]+]]:_(s128) = G_INSERT [[COPY]], [[TRUNC]](s16), 0 380 ; CHECK-NEXT: $vgpr0_vgpr1_vgpr2_vgpr3 = COPY [[INSERT]](s128) 381 %0:_(s128) = COPY $vgpr0_vgpr1_vgpr2_vgpr3 382 %1:_(s32) = COPY $vgpr4 383 %2:_(s16) = G_TRUNC %1 384 %3:_(s128) = G_INSERT %0, %2, 0 385 $vgpr0_vgpr1_vgpr2_vgpr3 = COPY %3 386... 387 388--- 389name: test_insert_s128_s16_offset16 390body: | 391 bb.0: 392 liveins: $vgpr0_vgpr1_vgpr2_vgpr3, $vgpr4 393 394 ; CHECK-LABEL: name: test_insert_s128_s16_offset16 395 ; CHECK: liveins: $vgpr0_vgpr1_vgpr2_vgpr3, $vgpr4 396 ; CHECK-NEXT: {{ $}} 397 ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(s128) = COPY $vgpr0_vgpr1_vgpr2_vgpr3 398 ; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(s32) = COPY $vgpr4 399 ; CHECK-NEXT: [[TRUNC:%[0-9]+]]:_(s16) = G_TRUNC [[COPY1]](s32) 400 ; CHECK-NEXT: [[INSERT:%[0-9]+]]:_(s128) = G_INSERT [[COPY]], [[TRUNC]](s16), 16 401 ; CHECK-NEXT: $vgpr0_vgpr1_vgpr2_vgpr3 = COPY [[INSERT]](s128) 402 %0:_(s128) = COPY $vgpr0_vgpr1_vgpr2_vgpr3 403 %1:_(s32) = COPY $vgpr4 404 %2:_(s16) = G_TRUNC %1 405 %3:_(s128) = G_INSERT %0, %2, 16 406 $vgpr0_vgpr1_vgpr2_vgpr3 = COPY %3 407... 408 409--- 410name: test_insert_s128_s16_offset32 411body: | 412 bb.0: 413 liveins: $vgpr0_vgpr1_vgpr2_vgpr3, $vgpr4 414 415 ; CHECK-LABEL: name: test_insert_s128_s16_offset32 416 ; CHECK: liveins: $vgpr0_vgpr1_vgpr2_vgpr3, $vgpr4 417 ; CHECK-NEXT: {{ $}} 418 ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(s128) = COPY $vgpr0_vgpr1_vgpr2_vgpr3 419 ; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(s32) = COPY $vgpr4 420 ; CHECK-NEXT: [[TRUNC:%[0-9]+]]:_(s16) = G_TRUNC [[COPY1]](s32) 421 ; CHECK-NEXT: [[INSERT:%[0-9]+]]:_(s128) = G_INSERT [[COPY]], [[TRUNC]](s16), 32 422 ; CHECK-NEXT: $vgpr0_vgpr1_vgpr2_vgpr3 = COPY [[INSERT]](s128) 423 %0:_(s128) = COPY $vgpr0_vgpr1_vgpr2_vgpr3 424 %1:_(s32) = COPY $vgpr4 425 %2:_(s16) = G_TRUNC %1 426 %3:_(s128) = G_INSERT %0, %2, 32 427 $vgpr0_vgpr1_vgpr2_vgpr3 = COPY %3 428... 429 430--- 431name: test_insert_s128_s16_offset112 432body: | 433 bb.0: 434 liveins: $vgpr0_vgpr1_vgpr2_vgpr3, $vgpr4 435 436 ; CHECK-LABEL: name: test_insert_s128_s16_offset112 437 ; CHECK: liveins: $vgpr0_vgpr1_vgpr2_vgpr3, $vgpr4 438 ; CHECK-NEXT: {{ $}} 439 ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(s128) = COPY $vgpr0_vgpr1_vgpr2_vgpr3 440 ; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(s32) = COPY $vgpr4 441 ; CHECK-NEXT: [[TRUNC:%[0-9]+]]:_(s16) = G_TRUNC [[COPY1]](s32) 442 ; CHECK-NEXT: [[INSERT:%[0-9]+]]:_(s128) = G_INSERT [[COPY]], [[TRUNC]](s16), 112 443 ; CHECK-NEXT: $vgpr0_vgpr1_vgpr2_vgpr3 = COPY [[INSERT]](s128) 444 %0:_(s128) = COPY $vgpr0_vgpr1_vgpr2_vgpr3 445 %1:_(s32) = COPY $vgpr4 446 %2:_(s16) = G_TRUNC %1 447 %3:_(s128) = G_INSERT %0, %2, 112 448 $vgpr0_vgpr1_vgpr2_vgpr3 = COPY %3 449... 450 451--- 452name: test_insert_v2s32_s32_offset0 453body: | 454 bb.0: 455 liveins: $vgpr0_vgpr1, $vgpr2 456 457 ; CHECK-LABEL: name: test_insert_v2s32_s32_offset0 458 ; CHECK: liveins: $vgpr0_vgpr1, $vgpr2 459 ; CHECK-NEXT: {{ $}} 460 ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(<2 x s32>) = COPY $vgpr0_vgpr1 461 ; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(s32) = COPY $vgpr2 462 ; CHECK-NEXT: [[UV:%[0-9]+]]:_(s32), [[UV1:%[0-9]+]]:_(s32) = G_UNMERGE_VALUES [[COPY]](<2 x s32>) 463 ; CHECK-NEXT: [[BUILD_VECTOR:%[0-9]+]]:_(<2 x s32>) = G_BUILD_VECTOR [[COPY1]](s32), [[UV1]](s32) 464 ; CHECK-NEXT: $vgpr0_vgpr1 = COPY [[BUILD_VECTOR]](<2 x s32>) 465 %0:_(<2 x s32>) = COPY $vgpr0_vgpr1 466 %1:_(s32) = COPY $vgpr2 467 %2:_(<2 x s32>) = G_INSERT %0, %1, 0 468 $vgpr0_vgpr1 = COPY %2 469... 470--- 471name: test_insert_v2s32_s32_offset32 472body: | 473 bb.0: 474 liveins: $vgpr0_vgpr1, $vgpr2 475 476 ; CHECK-LABEL: name: test_insert_v2s32_s32_offset32 477 ; CHECK: liveins: $vgpr0_vgpr1, $vgpr2 478 ; CHECK-NEXT: {{ $}} 479 ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(<2 x s32>) = COPY $vgpr0_vgpr1 480 ; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(s32) = COPY $vgpr2 481 ; CHECK-NEXT: [[UV:%[0-9]+]]:_(s32), [[UV1:%[0-9]+]]:_(s32) = G_UNMERGE_VALUES [[COPY]](<2 x s32>) 482 ; CHECK-NEXT: [[BUILD_VECTOR:%[0-9]+]]:_(<2 x s32>) = G_BUILD_VECTOR [[UV]](s32), [[COPY1]](s32) 483 ; CHECK-NEXT: $vgpr0_vgpr1 = COPY [[BUILD_VECTOR]](<2 x s32>) 484 %0:_(<2 x s32>) = COPY $vgpr0_vgpr1 485 %1:_(s32) = COPY $vgpr2 486 %2:_(<2 x s32>) = G_INSERT %0, %1, 32 487 $vgpr0_vgpr1 = COPY %2 488... 489--- 490name: test_insert_v3s32_s32_offset0 491body: | 492 bb.0: 493 liveins: $vgpr0_vgpr1_vgpr2, $vgpr3 494 495 ; CHECK-LABEL: name: test_insert_v3s32_s32_offset0 496 ; CHECK: liveins: $vgpr0_vgpr1_vgpr2, $vgpr3 497 ; CHECK-NEXT: {{ $}} 498 ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(<3 x s32>) = COPY $vgpr0_vgpr1_vgpr2 499 ; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(s32) = COPY $vgpr3 500 ; CHECK-NEXT: [[UV:%[0-9]+]]:_(s32), [[UV1:%[0-9]+]]:_(s32), [[UV2:%[0-9]+]]:_(s32) = G_UNMERGE_VALUES [[COPY]](<3 x s32>) 501 ; CHECK-NEXT: [[BUILD_VECTOR:%[0-9]+]]:_(<3 x s32>) = G_BUILD_VECTOR [[COPY1]](s32), [[UV1]](s32), [[UV2]](s32) 502 ; CHECK-NEXT: $vgpr0_vgpr1_vgpr2 = COPY [[BUILD_VECTOR]](<3 x s32>) 503 %0:_(<3 x s32>) = COPY $vgpr0_vgpr1_vgpr2 504 %1:_(s32) = COPY $vgpr3 505 %2:_(<3 x s32>) = G_INSERT %0, %1, 0 506 $vgpr0_vgpr1_vgpr2 = COPY %2 507... 508--- 509name: test_insert_v3s32_s32_offset32 510body: | 511 bb.0: 512 liveins: $vgpr0_vgpr1_vgpr2, $vgpr3 513 514 ; CHECK-LABEL: name: test_insert_v3s32_s32_offset32 515 ; CHECK: liveins: $vgpr0_vgpr1_vgpr2, $vgpr3 516 ; CHECK-NEXT: {{ $}} 517 ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(<3 x s32>) = COPY $vgpr0_vgpr1_vgpr2 518 ; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(s32) = COPY $vgpr3 519 ; CHECK-NEXT: [[UV:%[0-9]+]]:_(s32), [[UV1:%[0-9]+]]:_(s32), [[UV2:%[0-9]+]]:_(s32) = G_UNMERGE_VALUES [[COPY]](<3 x s32>) 520 ; CHECK-NEXT: [[BUILD_VECTOR:%[0-9]+]]:_(<3 x s32>) = G_BUILD_VECTOR [[UV]](s32), [[COPY1]](s32), [[UV2]](s32) 521 ; CHECK-NEXT: $vgpr0_vgpr1_vgpr2 = COPY [[BUILD_VECTOR]](<3 x s32>) 522 %0:_(<3 x s32>) = COPY $vgpr0_vgpr1_vgpr2 523 %1:_(s32) = COPY $vgpr3 524 %2:_(<3 x s32>) = G_INSERT %0, %1, 32 525 $vgpr0_vgpr1_vgpr2 = COPY %2 526... 527--- 528name: test_insert_v3s32_s32_offset64 529body: | 530 bb.0: 531 liveins: $vgpr0_vgpr1_vgpr2, $vgpr3 532 533 ; CHECK-LABEL: name: test_insert_v3s32_s32_offset64 534 ; CHECK: liveins: $vgpr0_vgpr1_vgpr2, $vgpr3 535 ; CHECK-NEXT: {{ $}} 536 ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(<3 x s32>) = COPY $vgpr0_vgpr1_vgpr2 537 ; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(s32) = COPY $vgpr3 538 ; CHECK-NEXT: [[UV:%[0-9]+]]:_(s32), [[UV1:%[0-9]+]]:_(s32), [[UV2:%[0-9]+]]:_(s32) = G_UNMERGE_VALUES [[COPY]](<3 x s32>) 539 ; CHECK-NEXT: [[BUILD_VECTOR:%[0-9]+]]:_(<3 x s32>) = G_BUILD_VECTOR [[UV]](s32), [[UV1]](s32), [[COPY1]](s32) 540 ; CHECK-NEXT: $vgpr0_vgpr1_vgpr2 = COPY [[BUILD_VECTOR]](<3 x s32>) 541 %0:_(<3 x s32>) = COPY $vgpr0_vgpr1_vgpr2 542 %1:_(s32) = COPY $vgpr3 543 %2:_(<3 x s32>) = G_INSERT %0, %1, 64 544 $vgpr0_vgpr1_vgpr2 = COPY %2 545... 546--- 547name: test_insert_v4s32_s32_offset0 548body: | 549 bb.0: 550 liveins: $vgpr0_vgpr1_vgpr2_vgpr3, $vgpr4 551 552 ; CHECK-LABEL: name: test_insert_v4s32_s32_offset0 553 ; CHECK: liveins: $vgpr0_vgpr1_vgpr2_vgpr3, $vgpr4 554 ; CHECK-NEXT: {{ $}} 555 ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(<4 x s32>) = COPY $vgpr0_vgpr1_vgpr2_vgpr3 556 ; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(s32) = COPY $vgpr4 557 ; CHECK-NEXT: [[UV:%[0-9]+]]:_(s32), [[UV1:%[0-9]+]]:_(s32), [[UV2:%[0-9]+]]:_(s32), [[UV3:%[0-9]+]]:_(s32) = G_UNMERGE_VALUES [[COPY]](<4 x s32>) 558 ; CHECK-NEXT: [[BUILD_VECTOR:%[0-9]+]]:_(<4 x s32>) = G_BUILD_VECTOR [[COPY1]](s32), [[UV1]](s32), [[UV2]](s32), [[UV3]](s32) 559 ; CHECK-NEXT: $vgpr0_vgpr1_vgpr2_vgpr3 = COPY [[BUILD_VECTOR]](<4 x s32>) 560 %0:_(<4 x s32>) = COPY $vgpr0_vgpr1_vgpr2_vgpr3 561 %1:_(s32) = COPY $vgpr4 562 %2:_(<4 x s32>) = G_INSERT %0, %1, 0 563 $vgpr0_vgpr1_vgpr2_vgpr3 = COPY %2 564... 565--- 566name: test_insert_v4s32_s32_offset32 567body: | 568 bb.0: 569 liveins: $vgpr0_vgpr1_vgpr2_vgpr3, $vgpr4 570 571 ; CHECK-LABEL: name: test_insert_v4s32_s32_offset32 572 ; CHECK: liveins: $vgpr0_vgpr1_vgpr2_vgpr3, $vgpr4 573 ; CHECK-NEXT: {{ $}} 574 ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(<4 x s32>) = COPY $vgpr0_vgpr1_vgpr2_vgpr3 575 ; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(s32) = COPY $vgpr4 576 ; CHECK-NEXT: [[UV:%[0-9]+]]:_(s32), [[UV1:%[0-9]+]]:_(s32), [[UV2:%[0-9]+]]:_(s32), [[UV3:%[0-9]+]]:_(s32) = G_UNMERGE_VALUES [[COPY]](<4 x s32>) 577 ; CHECK-NEXT: [[BUILD_VECTOR:%[0-9]+]]:_(<4 x s32>) = G_BUILD_VECTOR [[UV]](s32), [[COPY1]](s32), [[UV2]](s32), [[UV3]](s32) 578 ; CHECK-NEXT: $vgpr0_vgpr1_vgpr2_vgpr3 = COPY [[BUILD_VECTOR]](<4 x s32>) 579 %0:_(<4 x s32>) = COPY $vgpr0_vgpr1_vgpr2_vgpr3 580 %1:_(s32) = COPY $vgpr4 581 %2:_(<4 x s32>) = G_INSERT %0, %1, 32 582 $vgpr0_vgpr1_vgpr2_vgpr3 = COPY %2 583... 584--- 585name: test_insert_v4s32_s32_offset64 586body: | 587 bb.0: 588 liveins: $vgpr0_vgpr1_vgpr2_vgpr3, $vgpr4 589 590 ; CHECK-LABEL: name: test_insert_v4s32_s32_offset64 591 ; CHECK: liveins: $vgpr0_vgpr1_vgpr2_vgpr3, $vgpr4 592 ; CHECK-NEXT: {{ $}} 593 ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(<4 x s32>) = COPY $vgpr0_vgpr1_vgpr2_vgpr3 594 ; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(s32) = COPY $vgpr4 595 ; CHECK-NEXT: [[UV:%[0-9]+]]:_(s32), [[UV1:%[0-9]+]]:_(s32), [[UV2:%[0-9]+]]:_(s32), [[UV3:%[0-9]+]]:_(s32) = G_UNMERGE_VALUES [[COPY]](<4 x s32>) 596 ; CHECK-NEXT: [[BUILD_VECTOR:%[0-9]+]]:_(<4 x s32>) = G_BUILD_VECTOR [[UV]](s32), [[UV1]](s32), [[COPY1]](s32), [[UV3]](s32) 597 ; CHECK-NEXT: $vgpr0_vgpr1_vgpr2_vgpr3 = COPY [[BUILD_VECTOR]](<4 x s32>) 598 %0:_(<4 x s32>) = COPY $vgpr0_vgpr1_vgpr2_vgpr3 599 %1:_(s32) = COPY $vgpr4 600 %2:_(<4 x s32>) = G_INSERT %0, %1, 64 601 $vgpr0_vgpr1_vgpr2_vgpr3 = COPY %2 602... 603--- 604name: test_insert_v4s32_s32_offset96 605body: | 606 bb.0: 607 liveins: $vgpr0_vgpr1_vgpr2_vgpr3, $vgpr4 608 609 ; CHECK-LABEL: name: test_insert_v4s32_s32_offset96 610 ; CHECK: liveins: $vgpr0_vgpr1_vgpr2_vgpr3, $vgpr4 611 ; CHECK-NEXT: {{ $}} 612 ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(<4 x s32>) = COPY $vgpr0_vgpr1_vgpr2_vgpr3 613 ; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(s32) = COPY $vgpr4 614 ; CHECK-NEXT: [[UV:%[0-9]+]]:_(s32), [[UV1:%[0-9]+]]:_(s32), [[UV2:%[0-9]+]]:_(s32), [[UV3:%[0-9]+]]:_(s32) = G_UNMERGE_VALUES [[COPY]](<4 x s32>) 615 ; CHECK-NEXT: [[BUILD_VECTOR:%[0-9]+]]:_(<4 x s32>) = G_BUILD_VECTOR [[UV]](s32), [[UV1]](s32), [[UV2]](s32), [[COPY1]](s32) 616 ; CHECK-NEXT: $vgpr0_vgpr1_vgpr2_vgpr3 = COPY [[BUILD_VECTOR]](<4 x s32>) 617 %0:_(<4 x s32>) = COPY $vgpr0_vgpr1_vgpr2_vgpr3 618 %1:_(s32) = COPY $vgpr4 619 %2:_(<4 x s32>) = G_INSERT %0, %1, 96 620 $vgpr0_vgpr1_vgpr2_vgpr3 = COPY %2 621... 622--- 623name: test_insert_v4s32_s64_offset0 624body: | 625 bb.0: 626 liveins: $vgpr0_vgpr1_vgpr2_vgpr3, $vgpr4_vgpr5 627 628 ; CHECK-LABEL: name: test_insert_v4s32_s64_offset0 629 ; CHECK: liveins: $vgpr0_vgpr1_vgpr2_vgpr3, $vgpr4_vgpr5 630 ; CHECK-NEXT: {{ $}} 631 ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(<4 x s32>) = COPY $vgpr0_vgpr1_vgpr2_vgpr3 632 ; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(s64) = COPY $vgpr4_vgpr5 633 ; CHECK-NEXT: [[UV:%[0-9]+]]:_(s32), [[UV1:%[0-9]+]]:_(s32), [[UV2:%[0-9]+]]:_(s32), [[UV3:%[0-9]+]]:_(s32) = G_UNMERGE_VALUES [[COPY]](<4 x s32>) 634 ; CHECK-NEXT: [[UV4:%[0-9]+]]:_(s32), [[UV5:%[0-9]+]]:_(s32) = G_UNMERGE_VALUES [[COPY1]](s64) 635 ; CHECK-NEXT: [[BUILD_VECTOR:%[0-9]+]]:_(<4 x s32>) = G_BUILD_VECTOR [[UV4]](s32), [[UV5]](s32), [[UV2]](s32), [[UV3]](s32) 636 ; CHECK-NEXT: $vgpr0_vgpr1_vgpr2_vgpr3 = COPY [[BUILD_VECTOR]](<4 x s32>) 637 %0:_(<4 x s32>) = COPY $vgpr0_vgpr1_vgpr2_vgpr3 638 %1:_(s64) = COPY $vgpr4_vgpr5 639 %2:_(<4 x s32>) = G_INSERT %0, %1, 0 640 $vgpr0_vgpr1_vgpr2_vgpr3 = COPY %2 641... 642--- 643name: test_insert_v4s32_s64_offset32 644body: | 645 bb.0: 646 liveins: $vgpr0_vgpr1_vgpr2_vgpr3, $vgpr4_vgpr5 647 648 ; CHECK-LABEL: name: test_insert_v4s32_s64_offset32 649 ; CHECK: liveins: $vgpr0_vgpr1_vgpr2_vgpr3, $vgpr4_vgpr5 650 ; CHECK-NEXT: {{ $}} 651 ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(<4 x s32>) = COPY $vgpr0_vgpr1_vgpr2_vgpr3 652 ; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(s64) = COPY $vgpr4_vgpr5 653 ; CHECK-NEXT: [[UV:%[0-9]+]]:_(s32), [[UV1:%[0-9]+]]:_(s32), [[UV2:%[0-9]+]]:_(s32), [[UV3:%[0-9]+]]:_(s32) = G_UNMERGE_VALUES [[COPY]](<4 x s32>) 654 ; CHECK-NEXT: [[UV4:%[0-9]+]]:_(s32), [[UV5:%[0-9]+]]:_(s32) = G_UNMERGE_VALUES [[COPY1]](s64) 655 ; CHECK-NEXT: [[BUILD_VECTOR:%[0-9]+]]:_(<4 x s32>) = G_BUILD_VECTOR [[UV]](s32), [[UV4]](s32), [[UV5]](s32), [[UV3]](s32) 656 ; CHECK-NEXT: $vgpr0_vgpr1_vgpr2_vgpr3 = COPY [[BUILD_VECTOR]](<4 x s32>) 657 %0:_(<4 x s32>) = COPY $vgpr0_vgpr1_vgpr2_vgpr3 658 %1:_(s64) = COPY $vgpr4_vgpr5 659 %2:_(<4 x s32>) = G_INSERT %0, %1, 32 660 $vgpr0_vgpr1_vgpr2_vgpr3 = COPY %2 661... 662--- 663name: test_insert_v4s32_s64_offset64 664body: | 665 bb.0: 666 liveins: $vgpr0_vgpr1_vgpr2_vgpr3, $vgpr4_vgpr5 667 668 ; CHECK-LABEL: name: test_insert_v4s32_s64_offset64 669 ; CHECK: liveins: $vgpr0_vgpr1_vgpr2_vgpr3, $vgpr4_vgpr5 670 ; CHECK-NEXT: {{ $}} 671 ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(<4 x s32>) = COPY $vgpr0_vgpr1_vgpr2_vgpr3 672 ; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(s64) = COPY $vgpr4_vgpr5 673 ; CHECK-NEXT: [[UV:%[0-9]+]]:_(s32), [[UV1:%[0-9]+]]:_(s32), [[UV2:%[0-9]+]]:_(s32), [[UV3:%[0-9]+]]:_(s32) = G_UNMERGE_VALUES [[COPY]](<4 x s32>) 674 ; CHECK-NEXT: [[UV4:%[0-9]+]]:_(s32), [[UV5:%[0-9]+]]:_(s32) = G_UNMERGE_VALUES [[COPY1]](s64) 675 ; CHECK-NEXT: [[BUILD_VECTOR:%[0-9]+]]:_(<4 x s32>) = G_BUILD_VECTOR [[UV]](s32), [[UV1]](s32), [[UV4]](s32), [[UV5]](s32) 676 ; CHECK-NEXT: $vgpr0_vgpr1_vgpr2_vgpr3 = COPY [[BUILD_VECTOR]](<4 x s32>) 677 %0:_(<4 x s32>) = COPY $vgpr0_vgpr1_vgpr2_vgpr3 678 %1:_(s64) = COPY $vgpr4_vgpr5 679 %2:_(<4 x s32>) = G_INSERT %0, %1, 64 680 $vgpr0_vgpr1_vgpr2_vgpr3 = COPY %2 681... 682--- 683name: test_insert_v4s32_s96_offset0 684body: | 685 bb.0: 686 liveins: $vgpr0_vgpr1_vgpr2_vgpr3, $vgpr4_vgpr5_vgpr6 687 688 ; CHECK-LABEL: name: test_insert_v4s32_s96_offset0 689 ; CHECK: liveins: $vgpr0_vgpr1_vgpr2_vgpr3, $vgpr4_vgpr5_vgpr6 690 ; CHECK-NEXT: {{ $}} 691 ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(<4 x s32>) = COPY $vgpr0_vgpr1_vgpr2_vgpr3 692 ; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(s96) = COPY $vgpr4_vgpr5_vgpr6 693 ; CHECK-NEXT: [[UV:%[0-9]+]]:_(s32), [[UV1:%[0-9]+]]:_(s32), [[UV2:%[0-9]+]]:_(s32), [[UV3:%[0-9]+]]:_(s32) = G_UNMERGE_VALUES [[COPY]](<4 x s32>) 694 ; CHECK-NEXT: [[UV4:%[0-9]+]]:_(s32), [[UV5:%[0-9]+]]:_(s32), [[UV6:%[0-9]+]]:_(s32) = G_UNMERGE_VALUES [[COPY1]](s96) 695 ; CHECK-NEXT: [[BUILD_VECTOR:%[0-9]+]]:_(<4 x s32>) = G_BUILD_VECTOR [[UV4]](s32), [[UV5]](s32), [[UV6]](s32), [[UV3]](s32) 696 ; CHECK-NEXT: $vgpr0_vgpr1_vgpr2_vgpr3 = COPY [[BUILD_VECTOR]](<4 x s32>) 697 %0:_(<4 x s32>) = COPY $vgpr0_vgpr1_vgpr2_vgpr3 698 %1:_(s96) = COPY $vgpr4_vgpr5_vgpr6 699 %2:_(<4 x s32>) = G_INSERT %0, %1, 0 700 $vgpr0_vgpr1_vgpr2_vgpr3 = COPY %2 701... 702--- 703name: test_insert_v4s32_s96_offset32 704body: | 705 bb.0: 706 liveins: $vgpr0_vgpr1_vgpr2_vgpr3, $vgpr4_vgpr5_vgpr6 707 708 ; CHECK-LABEL: name: test_insert_v4s32_s96_offset32 709 ; CHECK: liveins: $vgpr0_vgpr1_vgpr2_vgpr3, $vgpr4_vgpr5_vgpr6 710 ; CHECK-NEXT: {{ $}} 711 ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(<4 x s32>) = COPY $vgpr0_vgpr1_vgpr2_vgpr3 712 ; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(s96) = COPY $vgpr4_vgpr5_vgpr6 713 ; CHECK-NEXT: [[UV:%[0-9]+]]:_(s32), [[UV1:%[0-9]+]]:_(s32), [[UV2:%[0-9]+]]:_(s32), [[UV3:%[0-9]+]]:_(s32) = G_UNMERGE_VALUES [[COPY]](<4 x s32>) 714 ; CHECK-NEXT: [[UV4:%[0-9]+]]:_(s32), [[UV5:%[0-9]+]]:_(s32), [[UV6:%[0-9]+]]:_(s32) = G_UNMERGE_VALUES [[COPY1]](s96) 715 ; CHECK-NEXT: [[BUILD_VECTOR:%[0-9]+]]:_(<4 x s32>) = G_BUILD_VECTOR [[UV]](s32), [[UV4]](s32), [[UV5]](s32), [[UV6]](s32) 716 ; CHECK-NEXT: $vgpr0_vgpr1_vgpr2_vgpr3 = COPY [[BUILD_VECTOR]](<4 x s32>) 717 %0:_(<4 x s32>) = COPY $vgpr0_vgpr1_vgpr2_vgpr3 718 %1:_(s96) = COPY $vgpr4_vgpr5_vgpr6 719 %2:_(<4 x s32>) = G_INSERT %0, %1, 32 720 $vgpr0_vgpr1_vgpr2_vgpr3 = COPY %2 721... 722--- 723name: test_insert_v4s32_v2s32_offset0 724body: | 725 bb.0: 726 liveins: $vgpr0_vgpr1_vgpr2_vgpr3, $vgpr4_vgpr5 727 728 ; CHECK-LABEL: name: test_insert_v4s32_v2s32_offset0 729 ; CHECK: liveins: $vgpr0_vgpr1_vgpr2_vgpr3, $vgpr4_vgpr5 730 ; CHECK-NEXT: {{ $}} 731 ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(<4 x s32>) = COPY $vgpr0_vgpr1_vgpr2_vgpr3 732 ; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(<2 x s32>) = COPY $vgpr4_vgpr5 733 ; CHECK-NEXT: [[UV:%[0-9]+]]:_(s32), [[UV1:%[0-9]+]]:_(s32), [[UV2:%[0-9]+]]:_(s32), [[UV3:%[0-9]+]]:_(s32) = G_UNMERGE_VALUES [[COPY]](<4 x s32>) 734 ; CHECK-NEXT: [[UV4:%[0-9]+]]:_(s32), [[UV5:%[0-9]+]]:_(s32) = G_UNMERGE_VALUES [[COPY1]](<2 x s32>) 735 ; CHECK-NEXT: [[BUILD_VECTOR:%[0-9]+]]:_(<4 x s32>) = G_BUILD_VECTOR [[UV4]](s32), [[UV5]](s32), [[UV2]](s32), [[UV3]](s32) 736 ; CHECK-NEXT: $vgpr0_vgpr1_vgpr2_vgpr3 = COPY [[BUILD_VECTOR]](<4 x s32>) 737 %0:_(<4 x s32>) = COPY $vgpr0_vgpr1_vgpr2_vgpr3 738 %1:_(<2 x s32>) = COPY $vgpr4_vgpr5 739 %2:_(<4 x s32>) = G_INSERT %0, %1, 0 740 $vgpr0_vgpr1_vgpr2_vgpr3 = COPY %2 741... 742--- 743name: test_insert_v4s32_v2s32_offset32 744body: | 745 bb.0: 746 liveins: $vgpr0_vgpr1_vgpr2_vgpr3, $vgpr4_vgpr5 747 748 ; CHECK-LABEL: name: test_insert_v4s32_v2s32_offset32 749 ; CHECK: liveins: $vgpr0_vgpr1_vgpr2_vgpr3, $vgpr4_vgpr5 750 ; CHECK-NEXT: {{ $}} 751 ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(<4 x s32>) = COPY $vgpr0_vgpr1_vgpr2_vgpr3 752 ; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(<2 x s32>) = COPY $vgpr4_vgpr5 753 ; CHECK-NEXT: [[UV:%[0-9]+]]:_(s32), [[UV1:%[0-9]+]]:_(s32), [[UV2:%[0-9]+]]:_(s32), [[UV3:%[0-9]+]]:_(s32) = G_UNMERGE_VALUES [[COPY]](<4 x s32>) 754 ; CHECK-NEXT: [[UV4:%[0-9]+]]:_(s32), [[UV5:%[0-9]+]]:_(s32) = G_UNMERGE_VALUES [[COPY1]](<2 x s32>) 755 ; CHECK-NEXT: [[BUILD_VECTOR:%[0-9]+]]:_(<4 x s32>) = G_BUILD_VECTOR [[UV]](s32), [[UV4]](s32), [[UV5]](s32), [[UV3]](s32) 756 ; CHECK-NEXT: $vgpr0_vgpr1_vgpr2_vgpr3 = COPY [[BUILD_VECTOR]](<4 x s32>) 757 %0:_(<4 x s32>) = COPY $vgpr0_vgpr1_vgpr2_vgpr3 758 %1:_(<2 x s32>) = COPY $vgpr4_vgpr5 759 %2:_(<4 x s32>) = G_INSERT %0, %1, 32 760 $vgpr0_vgpr1_vgpr2_vgpr3 = COPY %2 761... 762--- 763name: test_insert_v4s32_v2s32_offset64 764body: | 765 bb.0: 766 liveins: $vgpr0_vgpr1_vgpr2_vgpr3, $vgpr4_vgpr5 767 768 ; CHECK-LABEL: name: test_insert_v4s32_v2s32_offset64 769 ; CHECK: liveins: $vgpr0_vgpr1_vgpr2_vgpr3, $vgpr4_vgpr5 770 ; CHECK-NEXT: {{ $}} 771 ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(<4 x s32>) = COPY $vgpr0_vgpr1_vgpr2_vgpr3 772 ; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(<2 x s32>) = COPY $vgpr4_vgpr5 773 ; CHECK-NEXT: [[UV:%[0-9]+]]:_(s32), [[UV1:%[0-9]+]]:_(s32), [[UV2:%[0-9]+]]:_(s32), [[UV3:%[0-9]+]]:_(s32) = G_UNMERGE_VALUES [[COPY]](<4 x s32>) 774 ; CHECK-NEXT: [[UV4:%[0-9]+]]:_(s32), [[UV5:%[0-9]+]]:_(s32) = G_UNMERGE_VALUES [[COPY1]](<2 x s32>) 775 ; CHECK-NEXT: [[BUILD_VECTOR:%[0-9]+]]:_(<4 x s32>) = G_BUILD_VECTOR [[UV]](s32), [[UV1]](s32), [[UV4]](s32), [[UV5]](s32) 776 ; CHECK-NEXT: $vgpr0_vgpr1_vgpr2_vgpr3 = COPY [[BUILD_VECTOR]](<4 x s32>) 777 %0:_(<4 x s32>) = COPY $vgpr0_vgpr1_vgpr2_vgpr3 778 %1:_(<2 x s32>) = COPY $vgpr4_vgpr5 779 %2:_(<4 x s32>) = G_INSERT %0, %1, 64 780 $vgpr0_vgpr1_vgpr2_vgpr3 = COPY %2 781... 782--- 783name: test_insert_v4s32_v3s32_offset0 784body: | 785 bb.0: 786 liveins: $vgpr0_vgpr1_vgpr2_vgpr3, $vgpr4_vgpr5_vgpr6 787 788 ; CHECK-LABEL: name: test_insert_v4s32_v3s32_offset0 789 ; CHECK: liveins: $vgpr0_vgpr1_vgpr2_vgpr3, $vgpr4_vgpr5_vgpr6 790 ; CHECK-NEXT: {{ $}} 791 ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(<4 x s32>) = COPY $vgpr0_vgpr1_vgpr2_vgpr3 792 ; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(<3 x s32>) = COPY $vgpr4_vgpr5_vgpr6 793 ; CHECK-NEXT: [[UV:%[0-9]+]]:_(s32), [[UV1:%[0-9]+]]:_(s32), [[UV2:%[0-9]+]]:_(s32), [[UV3:%[0-9]+]]:_(s32) = G_UNMERGE_VALUES [[COPY]](<4 x s32>) 794 ; CHECK-NEXT: [[UV4:%[0-9]+]]:_(s32), [[UV5:%[0-9]+]]:_(s32), [[UV6:%[0-9]+]]:_(s32) = G_UNMERGE_VALUES [[COPY1]](<3 x s32>) 795 ; CHECK-NEXT: [[BUILD_VECTOR:%[0-9]+]]:_(<4 x s32>) = G_BUILD_VECTOR [[UV4]](s32), [[UV5]](s32), [[UV6]](s32), [[UV3]](s32) 796 ; CHECK-NEXT: $vgpr0_vgpr1_vgpr2_vgpr3 = COPY [[BUILD_VECTOR]](<4 x s32>) 797 %0:_(<4 x s32>) = COPY $vgpr0_vgpr1_vgpr2_vgpr3 798 %1:_(<3 x s32>) = COPY $vgpr4_vgpr5_vgpr6 799 %2:_(<4 x s32>) = G_INSERT %0, %1, 0 800 $vgpr0_vgpr1_vgpr2_vgpr3 = COPY %2 801... 802--- 803name: test_insert_v4s32_v3s32_offset32 804body: | 805 bb.0: 806 liveins: $vgpr0_vgpr1_vgpr2_vgpr3, $vgpr4_vgpr5_vgpr6 807 808 ; CHECK-LABEL: name: test_insert_v4s32_v3s32_offset32 809 ; CHECK: liveins: $vgpr0_vgpr1_vgpr2_vgpr3, $vgpr4_vgpr5_vgpr6 810 ; CHECK-NEXT: {{ $}} 811 ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(<4 x s32>) = COPY $vgpr0_vgpr1_vgpr2_vgpr3 812 ; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(<3 x s32>) = COPY $vgpr4_vgpr5_vgpr6 813 ; CHECK-NEXT: [[UV:%[0-9]+]]:_(s32), [[UV1:%[0-9]+]]:_(s32), [[UV2:%[0-9]+]]:_(s32), [[UV3:%[0-9]+]]:_(s32) = G_UNMERGE_VALUES [[COPY]](<4 x s32>) 814 ; CHECK-NEXT: [[UV4:%[0-9]+]]:_(s32), [[UV5:%[0-9]+]]:_(s32), [[UV6:%[0-9]+]]:_(s32) = G_UNMERGE_VALUES [[COPY1]](<3 x s32>) 815 ; CHECK-NEXT: [[BUILD_VECTOR:%[0-9]+]]:_(<4 x s32>) = G_BUILD_VECTOR [[UV]](s32), [[UV4]](s32), [[UV5]](s32), [[UV6]](s32) 816 ; CHECK-NEXT: $vgpr0_vgpr1_vgpr2_vgpr3 = COPY [[BUILD_VECTOR]](<4 x s32>) 817 %0:_(<4 x s32>) = COPY $vgpr0_vgpr1_vgpr2_vgpr3 818 %1:_(<3 x s32>) = COPY $vgpr4_vgpr5_vgpr6 819 %2:_(<4 x s32>) = G_INSERT %0, %1, 32 820 $vgpr0_vgpr1_vgpr2_vgpr3 = COPY %2 821... 822--- 823name: test_insert_v4s32_p0_offset0 824body: | 825 bb.0: 826 liveins: $vgpr0_vgpr1_vgpr2_vgpr3, $vgpr4_vgpr5 827 828 ; CHECK-LABEL: name: test_insert_v4s32_p0_offset0 829 ; CHECK: liveins: $vgpr0_vgpr1_vgpr2_vgpr3, $vgpr4_vgpr5 830 ; CHECK-NEXT: {{ $}} 831 ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(<4 x s32>) = COPY $vgpr0_vgpr1_vgpr2_vgpr3 832 ; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(p0) = COPY $vgpr4_vgpr5 833 ; CHECK-NEXT: [[INSERT:%[0-9]+]]:_(<4 x s32>) = G_INSERT [[COPY]], [[COPY1]](p0), 0 834 ; CHECK-NEXT: $vgpr0_vgpr1_vgpr2_vgpr3 = COPY [[INSERT]](<4 x s32>) 835 %0:_(<4 x s32>) = COPY $vgpr0_vgpr1_vgpr2_vgpr3 836 %1:_(p0) = COPY $vgpr4_vgpr5 837 %2:_(<4 x s32>) = G_INSERT %0, %1, 0 838 $vgpr0_vgpr1_vgpr2_vgpr3 = COPY %2 839... 840--- 841name: test_insert_v4s32_p0_offset32 842body: | 843 bb.0: 844 liveins: $vgpr0_vgpr1_vgpr2_vgpr3, $vgpr4_vgpr5 845 846 ; CHECK-LABEL: name: test_insert_v4s32_p0_offset32 847 ; CHECK: liveins: $vgpr0_vgpr1_vgpr2_vgpr3, $vgpr4_vgpr5 848 ; CHECK-NEXT: {{ $}} 849 ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(<4 x s32>) = COPY $vgpr0_vgpr1_vgpr2_vgpr3 850 ; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(p0) = COPY $vgpr4_vgpr5 851 ; CHECK-NEXT: [[INSERT:%[0-9]+]]:_(<4 x s32>) = G_INSERT [[COPY]], [[COPY1]](p0), 32 852 ; CHECK-NEXT: $vgpr0_vgpr1_vgpr2_vgpr3 = COPY [[INSERT]](<4 x s32>) 853 %0:_(<4 x s32>) = COPY $vgpr0_vgpr1_vgpr2_vgpr3 854 %1:_(p0) = COPY $vgpr4_vgpr5 855 %2:_(<4 x s32>) = G_INSERT %0, %1, 32 856 $vgpr0_vgpr1_vgpr2_vgpr3 = COPY %2 857... 858--- 859name: test_insert_v4s32_p0_offset64 860body: | 861 bb.0: 862 liveins: $vgpr0_vgpr1_vgpr2_vgpr3, $vgpr4_vgpr5 863 864 ; CHECK-LABEL: name: test_insert_v4s32_p0_offset64 865 ; CHECK: liveins: $vgpr0_vgpr1_vgpr2_vgpr3, $vgpr4_vgpr5 866 ; CHECK-NEXT: {{ $}} 867 ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(<4 x s32>) = COPY $vgpr0_vgpr1_vgpr2_vgpr3 868 ; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(p0) = COPY $vgpr4_vgpr5 869 ; CHECK-NEXT: [[INSERT:%[0-9]+]]:_(<4 x s32>) = G_INSERT [[COPY]], [[COPY1]](p0), 64 870 ; CHECK-NEXT: $vgpr0_vgpr1_vgpr2_vgpr3 = COPY [[INSERT]](<4 x s32>) 871 %0:_(<4 x s32>) = COPY $vgpr0_vgpr1_vgpr2_vgpr3 872 %1:_(p0) = COPY $vgpr4_vgpr5 873 %2:_(<4 x s32>) = G_INSERT %0, %1, 64 874 $vgpr0_vgpr1_vgpr2_vgpr3 = COPY %2 875... 876 877--- 878name: test_insert_v2s16_s16_offset0 879body: | 880 bb.0: 881 liveins: $vgpr0, $vgpr1 882 883 ; CHECK-LABEL: name: test_insert_v2s16_s16_offset0 884 ; CHECK: liveins: $vgpr0, $vgpr1 885 ; CHECK-NEXT: {{ $}} 886 ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(<2 x s16>) = COPY $vgpr0 887 ; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(s32) = COPY $vgpr1 888 ; CHECK-NEXT: [[BITCAST:%[0-9]+]]:_(s32) = G_BITCAST [[COPY]](<2 x s16>) 889 ; CHECK-NEXT: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 16 890 ; CHECK-NEXT: [[LSHR:%[0-9]+]]:_(s32) = G_LSHR [[BITCAST]], [[C]](s32) 891 ; CHECK-NEXT: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 65535 892 ; CHECK-NEXT: [[AND:%[0-9]+]]:_(s32) = G_AND [[COPY1]], [[C1]] 893 ; CHECK-NEXT: [[SHL:%[0-9]+]]:_(s32) = G_SHL [[LSHR]], [[C]](s32) 894 ; CHECK-NEXT: [[OR:%[0-9]+]]:_(s32) = G_OR [[AND]], [[SHL]] 895 ; CHECK-NEXT: [[BITCAST1:%[0-9]+]]:_(<2 x s16>) = G_BITCAST [[OR]](s32) 896 ; CHECK-NEXT: $vgpr0 = COPY [[BITCAST1]](<2 x s16>) 897 %0:_(<2 x s16>) = COPY $vgpr0 898 %1:_(s32) = COPY $vgpr1 899 %2:_(s16) = G_TRUNC %1 900 %3:_(<2 x s16>) = G_INSERT %0, %2, 0 901 $vgpr0 = COPY %3 902... 903 904--- 905name: test_insert_v2s16_s16_offset1 906body: | 907 bb.0: 908 liveins: $vgpr0, $vgpr1 909 910 ; CHECK-LABEL: name: test_insert_v2s16_s16_offset1 911 ; CHECK: liveins: $vgpr0, $vgpr1 912 ; CHECK-NEXT: {{ $}} 913 ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(<2 x s16>) = COPY $vgpr0 914 ; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(s32) = COPY $vgpr1 915 ; CHECK-NEXT: [[BITCAST:%[0-9]+]]:_(s32) = G_BITCAST [[COPY]](<2 x s16>) 916 ; CHECK-NEXT: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 65535 917 ; CHECK-NEXT: [[AND:%[0-9]+]]:_(s32) = G_AND [[COPY1]], [[C]] 918 ; CHECK-NEXT: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 1 919 ; CHECK-NEXT: [[SHL:%[0-9]+]]:_(s32) = G_SHL [[AND]], [[C1]](s32) 920 ; CHECK-NEXT: [[C2:%[0-9]+]]:_(s32) = G_CONSTANT i32 -131071 921 ; CHECK-NEXT: [[AND1:%[0-9]+]]:_(s32) = G_AND [[BITCAST]], [[C2]] 922 ; CHECK-NEXT: [[OR:%[0-9]+]]:_(s32) = G_OR [[AND1]], [[SHL]] 923 ; CHECK-NEXT: [[BITCAST1:%[0-9]+]]:_(<2 x s16>) = G_BITCAST [[OR]](s32) 924 ; CHECK-NEXT: $vgpr0 = COPY [[BITCAST1]](<2 x s16>) 925 %0:_(<2 x s16>) = COPY $vgpr0 926 %1:_(s32) = COPY $vgpr1 927 %2:_(s16) = G_TRUNC %1 928 %3:_(<2 x s16>) = G_INSERT %0, %2, 1 929 $vgpr0 = COPY %3 930... 931--- 932name: test_insert_v2s16_s16_offset16 933body: | 934 bb.0: 935 liveins: $vgpr0, $vgpr1 936 937 ; CHECK-LABEL: name: test_insert_v2s16_s16_offset16 938 ; CHECK: liveins: $vgpr0, $vgpr1 939 ; CHECK-NEXT: {{ $}} 940 ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(<2 x s16>) = COPY $vgpr0 941 ; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(s32) = COPY $vgpr1 942 ; CHECK-NEXT: [[BITCAST:%[0-9]+]]:_(s32) = G_BITCAST [[COPY]](<2 x s16>) 943 ; CHECK-NEXT: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 65535 944 ; CHECK-NEXT: [[AND:%[0-9]+]]:_(s32) = G_AND [[BITCAST]], [[C]] 945 ; CHECK-NEXT: [[AND1:%[0-9]+]]:_(s32) = G_AND [[COPY1]], [[C]] 946 ; CHECK-NEXT: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 16 947 ; CHECK-NEXT: [[SHL:%[0-9]+]]:_(s32) = G_SHL [[AND1]], [[C1]](s32) 948 ; CHECK-NEXT: [[OR:%[0-9]+]]:_(s32) = G_OR [[AND]], [[SHL]] 949 ; CHECK-NEXT: [[BITCAST1:%[0-9]+]]:_(<2 x s16>) = G_BITCAST [[OR]](s32) 950 ; CHECK-NEXT: $vgpr0 = COPY [[BITCAST1]](<2 x s16>) 951 %0:_(<2 x s16>) = COPY $vgpr0 952 %1:_(s32) = COPY $vgpr1 953 %2:_(s16) = G_TRUNC %1 954 %3:_(<2 x s16>) = G_INSERT %0, %2, 16 955 $vgpr0 = COPY %3 956... 957--- 958name: test_insert_v3s16_s16_offset0 959body: | 960 bb.0: 961 liveins: $vgpr0_vgpr1, $vgpr2 962 963 ; CHECK-LABEL: name: test_insert_v3s16_s16_offset0 964 ; CHECK: liveins: $vgpr0_vgpr1, $vgpr2 965 ; CHECK-NEXT: {{ $}} 966 ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(<4 x s16>) = COPY $vgpr0_vgpr1 967 ; CHECK-NEXT: [[UV:%[0-9]+]]:_(<2 x s16>), [[UV1:%[0-9]+]]:_(<2 x s16>) = G_UNMERGE_VALUES [[COPY]](<4 x s16>) 968 ; CHECK-NEXT: [[BITCAST:%[0-9]+]]:_(s32) = G_BITCAST [[UV]](<2 x s16>) 969 ; CHECK-NEXT: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 16 970 ; CHECK-NEXT: [[LSHR:%[0-9]+]]:_(s32) = G_LSHR [[BITCAST]], [[C]](s32) 971 ; CHECK-NEXT: [[BITCAST1:%[0-9]+]]:_(s32) = G_BITCAST [[UV1]](<2 x s16>) 972 ; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(s32) = COPY $vgpr2 973 ; CHECK-NEXT: [[DEF:%[0-9]+]]:_(<4 x s16>) = G_IMPLICIT_DEF 974 ; CHECK-NEXT: [[UV2:%[0-9]+]]:_(<2 x s16>), [[UV3:%[0-9]+]]:_(<2 x s16>) = G_UNMERGE_VALUES [[DEF]](<4 x s16>) 975 ; CHECK-NEXT: [[BITCAST2:%[0-9]+]]:_(s32) = G_BITCAST [[UV3]](<2 x s16>) 976 ; CHECK-NEXT: [[LSHR1:%[0-9]+]]:_(s32) = G_LSHR [[BITCAST2]], [[C]](s32) 977 ; CHECK-NEXT: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 65535 978 ; CHECK-NEXT: [[AND:%[0-9]+]]:_(s32) = G_AND [[COPY1]], [[C1]] 979 ; CHECK-NEXT: [[SHL:%[0-9]+]]:_(s32) = G_SHL [[LSHR]], [[C]](s32) 980 ; CHECK-NEXT: [[OR:%[0-9]+]]:_(s32) = G_OR [[AND]], [[SHL]] 981 ; CHECK-NEXT: [[BITCAST3:%[0-9]+]]:_(<2 x s16>) = G_BITCAST [[OR]](s32) 982 ; CHECK-NEXT: [[AND1:%[0-9]+]]:_(s32) = G_AND [[BITCAST1]], [[C1]] 983 ; CHECK-NEXT: [[SHL1:%[0-9]+]]:_(s32) = G_SHL [[LSHR1]], [[C]](s32) 984 ; CHECK-NEXT: [[OR1:%[0-9]+]]:_(s32) = G_OR [[AND1]], [[SHL1]] 985 ; CHECK-NEXT: [[BITCAST4:%[0-9]+]]:_(<2 x s16>) = G_BITCAST [[OR1]](s32) 986 ; CHECK-NEXT: [[CONCAT_VECTORS:%[0-9]+]]:_(<4 x s16>) = G_CONCAT_VECTORS [[BITCAST3]](<2 x s16>), [[BITCAST4]](<2 x s16>) 987 ; CHECK-NEXT: $vgpr0_vgpr1 = COPY [[CONCAT_VECTORS]](<4 x s16>) 988 %0:_(<4 x s16>) = COPY $vgpr0_vgpr1 989 %1:_(<3 x s16>) = G_EXTRACT %0, 0 990 %2:_(s32) = COPY $vgpr2 991 %3:_(s16) = G_TRUNC %2 992 %4:_(<3 x s16>) = G_INSERT %1, %3, 0 993 %5:_(<4 x s16>) = G_IMPLICIT_DEF 994 %6:_(<4 x s16>) = G_INSERT %5, %4, 0 995 $vgpr0_vgpr1 = COPY %6 996... 997--- 998name: test_insert_v3s16_s16_offset16 999body: | 1000 bb.0: 1001 liveins: $vgpr0_vgpr1, $vgpr2 1002 1003 ; CHECK-LABEL: name: test_insert_v3s16_s16_offset16 1004 ; CHECK: liveins: $vgpr0_vgpr1, $vgpr2 1005 ; CHECK-NEXT: {{ $}} 1006 ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(<4 x s16>) = COPY $vgpr0_vgpr1 1007 ; CHECK-NEXT: [[UV:%[0-9]+]]:_(<2 x s16>), [[UV1:%[0-9]+]]:_(<2 x s16>) = G_UNMERGE_VALUES [[COPY]](<4 x s16>) 1008 ; CHECK-NEXT: [[BITCAST:%[0-9]+]]:_(s32) = G_BITCAST [[UV]](<2 x s16>) 1009 ; CHECK-NEXT: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 16 1010 ; CHECK-NEXT: [[BITCAST1:%[0-9]+]]:_(s32) = G_BITCAST [[UV1]](<2 x s16>) 1011 ; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(s32) = COPY $vgpr2 1012 ; CHECK-NEXT: [[DEF:%[0-9]+]]:_(<4 x s16>) = G_IMPLICIT_DEF 1013 ; CHECK-NEXT: [[UV2:%[0-9]+]]:_(<2 x s16>), [[UV3:%[0-9]+]]:_(<2 x s16>) = G_UNMERGE_VALUES [[DEF]](<4 x s16>) 1014 ; CHECK-NEXT: [[BITCAST2:%[0-9]+]]:_(s32) = G_BITCAST [[UV3]](<2 x s16>) 1015 ; CHECK-NEXT: [[LSHR:%[0-9]+]]:_(s32) = G_LSHR [[BITCAST2]], [[C]](s32) 1016 ; CHECK-NEXT: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 65535 1017 ; CHECK-NEXT: [[AND:%[0-9]+]]:_(s32) = G_AND [[BITCAST]], [[C1]] 1018 ; CHECK-NEXT: [[AND1:%[0-9]+]]:_(s32) = G_AND [[COPY1]], [[C1]] 1019 ; CHECK-NEXT: [[SHL:%[0-9]+]]:_(s32) = G_SHL [[AND1]], [[C]](s32) 1020 ; CHECK-NEXT: [[OR:%[0-9]+]]:_(s32) = G_OR [[AND]], [[SHL]] 1021 ; CHECK-NEXT: [[BITCAST3:%[0-9]+]]:_(<2 x s16>) = G_BITCAST [[OR]](s32) 1022 ; CHECK-NEXT: [[AND2:%[0-9]+]]:_(s32) = G_AND [[BITCAST1]], [[C1]] 1023 ; CHECK-NEXT: [[SHL1:%[0-9]+]]:_(s32) = G_SHL [[LSHR]], [[C]](s32) 1024 ; CHECK-NEXT: [[OR1:%[0-9]+]]:_(s32) = G_OR [[AND2]], [[SHL1]] 1025 ; CHECK-NEXT: [[BITCAST4:%[0-9]+]]:_(<2 x s16>) = G_BITCAST [[OR1]](s32) 1026 ; CHECK-NEXT: [[CONCAT_VECTORS:%[0-9]+]]:_(<4 x s16>) = G_CONCAT_VECTORS [[BITCAST3]](<2 x s16>), [[BITCAST4]](<2 x s16>) 1027 ; CHECK-NEXT: $vgpr0_vgpr1 = COPY [[CONCAT_VECTORS]](<4 x s16>) 1028 %0:_(<4 x s16>) = COPY $vgpr0_vgpr1 1029 %1:_(<3 x s16>) = G_EXTRACT %0, 0 1030 %2:_(s32) = COPY $vgpr2 1031 %3:_(s16) = G_TRUNC %2 1032 %4:_(<3 x s16>) = G_INSERT %1, %3, 16 1033 %5:_(<4 x s16>) = G_IMPLICIT_DEF 1034 %6:_(<4 x s16>) = G_INSERT %5, %4, 0 1035 $vgpr0_vgpr1 = COPY %6 1036... 1037--- 1038name: test_insert_v3s16_s16_offset32 1039body: | 1040 bb.0: 1041 liveins: $vgpr0_vgpr1, $vgpr2 1042 1043 ; CHECK-LABEL: name: test_insert_v3s16_s16_offset32 1044 ; CHECK: liveins: $vgpr0_vgpr1, $vgpr2 1045 ; CHECK-NEXT: {{ $}} 1046 ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(<4 x s16>) = COPY $vgpr0_vgpr1 1047 ; CHECK-NEXT: [[UV:%[0-9]+]]:_(<2 x s16>), [[UV1:%[0-9]+]]:_(<2 x s16>) = G_UNMERGE_VALUES [[COPY]](<4 x s16>) 1048 ; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(s32) = COPY $vgpr2 1049 ; CHECK-NEXT: [[DEF:%[0-9]+]]:_(<4 x s16>) = G_IMPLICIT_DEF 1050 ; CHECK-NEXT: [[UV2:%[0-9]+]]:_(<2 x s16>), [[UV3:%[0-9]+]]:_(<2 x s16>) = G_UNMERGE_VALUES [[DEF]](<4 x s16>) 1051 ; CHECK-NEXT: [[BITCAST:%[0-9]+]]:_(s32) = G_BITCAST [[UV3]](<2 x s16>) 1052 ; CHECK-NEXT: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 16 1053 ; CHECK-NEXT: [[LSHR:%[0-9]+]]:_(s32) = G_LSHR [[BITCAST]], [[C]](s32) 1054 ; CHECK-NEXT: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 65535 1055 ; CHECK-NEXT: [[AND:%[0-9]+]]:_(s32) = G_AND [[COPY1]], [[C1]] 1056 ; CHECK-NEXT: [[SHL:%[0-9]+]]:_(s32) = G_SHL [[LSHR]], [[C]](s32) 1057 ; CHECK-NEXT: [[OR:%[0-9]+]]:_(s32) = G_OR [[AND]], [[SHL]] 1058 ; CHECK-NEXT: [[BITCAST1:%[0-9]+]]:_(<2 x s16>) = G_BITCAST [[OR]](s32) 1059 ; CHECK-NEXT: [[CONCAT_VECTORS:%[0-9]+]]:_(<4 x s16>) = G_CONCAT_VECTORS [[UV]](<2 x s16>), [[BITCAST1]](<2 x s16>) 1060 ; CHECK-NEXT: $vgpr0_vgpr1 = COPY [[CONCAT_VECTORS]](<4 x s16>) 1061 %0:_(<4 x s16>) = COPY $vgpr0_vgpr1 1062 %1:_(<3 x s16>) = G_EXTRACT %0, 0 1063 %2:_(s32) = COPY $vgpr2 1064 %3:_(s16) = G_TRUNC %2 1065 %4:_(<3 x s16>) = G_INSERT %1, %3, 32 1066 %5:_(<4 x s16>) = G_IMPLICIT_DEF 1067 %6:_(<4 x s16>) = G_INSERT %5, %4, 0 1068 $vgpr0_vgpr1 = COPY %6 1069... 1070--- 1071name: test_insert_v3s16_v2s16_offset0 1072body: | 1073 bb.0: 1074 liveins: $vgpr0_vgpr1, $vgpr2 1075 1076 ; CHECK-LABEL: name: test_insert_v3s16_v2s16_offset0 1077 ; CHECK: liveins: $vgpr0_vgpr1, $vgpr2 1078 ; CHECK-NEXT: {{ $}} 1079 ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(<4 x s16>) = COPY $vgpr0_vgpr1 1080 ; CHECK-NEXT: [[UV:%[0-9]+]]:_(<2 x s16>), [[UV1:%[0-9]+]]:_(<2 x s16>) = G_UNMERGE_VALUES [[COPY]](<4 x s16>) 1081 ; CHECK-NEXT: [[BITCAST:%[0-9]+]]:_(s32) = G_BITCAST [[UV1]](<2 x s16>) 1082 ; CHECK-NEXT: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 16 1083 ; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(<2 x s16>) = COPY $vgpr2 1084 ; CHECK-NEXT: [[BITCAST1:%[0-9]+]]:_(s32) = G_BITCAST [[COPY1]](<2 x s16>) 1085 ; CHECK-NEXT: [[LSHR:%[0-9]+]]:_(s32) = G_LSHR [[BITCAST1]], [[C]](s32) 1086 ; CHECK-NEXT: [[DEF:%[0-9]+]]:_(<4 x s16>) = G_IMPLICIT_DEF 1087 ; CHECK-NEXT: [[UV2:%[0-9]+]]:_(<2 x s16>), [[UV3:%[0-9]+]]:_(<2 x s16>) = G_UNMERGE_VALUES [[DEF]](<4 x s16>) 1088 ; CHECK-NEXT: [[BITCAST2:%[0-9]+]]:_(s32) = G_BITCAST [[UV3]](<2 x s16>) 1089 ; CHECK-NEXT: [[LSHR1:%[0-9]+]]:_(s32) = G_LSHR [[BITCAST2]], [[C]](s32) 1090 ; CHECK-NEXT: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 65535 1091 ; CHECK-NEXT: [[AND:%[0-9]+]]:_(s32) = G_AND [[BITCAST1]], [[C1]] 1092 ; CHECK-NEXT: [[SHL:%[0-9]+]]:_(s32) = G_SHL [[LSHR]], [[C]](s32) 1093 ; CHECK-NEXT: [[OR:%[0-9]+]]:_(s32) = G_OR [[AND]], [[SHL]] 1094 ; CHECK-NEXT: [[BITCAST3:%[0-9]+]]:_(<2 x s16>) = G_BITCAST [[OR]](s32) 1095 ; CHECK-NEXT: [[AND1:%[0-9]+]]:_(s32) = G_AND [[BITCAST]], [[C1]] 1096 ; CHECK-NEXT: [[SHL1:%[0-9]+]]:_(s32) = G_SHL [[LSHR1]], [[C]](s32) 1097 ; CHECK-NEXT: [[OR1:%[0-9]+]]:_(s32) = G_OR [[AND1]], [[SHL1]] 1098 ; CHECK-NEXT: [[BITCAST4:%[0-9]+]]:_(<2 x s16>) = G_BITCAST [[OR1]](s32) 1099 ; CHECK-NEXT: [[CONCAT_VECTORS:%[0-9]+]]:_(<4 x s16>) = G_CONCAT_VECTORS [[BITCAST3]](<2 x s16>), [[BITCAST4]](<2 x s16>) 1100 ; CHECK-NEXT: $vgpr0_vgpr1 = COPY [[CONCAT_VECTORS]](<4 x s16>) 1101 %0:_(<4 x s16>) = COPY $vgpr0_vgpr1 1102 %1:_(<3 x s16>) = G_EXTRACT %0, 0 1103 %2:_(<2 x s16>) = COPY $vgpr2 1104 %4:_(<3 x s16>) = G_INSERT %1, %2, 0 1105 %5:_(<4 x s16>) = G_IMPLICIT_DEF 1106 %6:_(<4 x s16>) = G_INSERT %5, %4, 0 1107 $vgpr0_vgpr1 = COPY %6 1108... 1109--- 1110name: test_insert_v3s16_v2s16_offset16 1111body: | 1112 bb.0: 1113 liveins: $vgpr0_vgpr1, $vgpr2 1114 1115 ; CHECK-LABEL: name: test_insert_v3s16_v2s16_offset16 1116 ; CHECK: liveins: $vgpr0_vgpr1, $vgpr2 1117 ; CHECK-NEXT: {{ $}} 1118 ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(<4 x s16>) = COPY $vgpr0_vgpr1 1119 ; CHECK-NEXT: [[UV:%[0-9]+]]:_(<2 x s16>), [[UV1:%[0-9]+]]:_(<2 x s16>) = G_UNMERGE_VALUES [[COPY]](<4 x s16>) 1120 ; CHECK-NEXT: [[BITCAST:%[0-9]+]]:_(s32) = G_BITCAST [[UV]](<2 x s16>) 1121 ; CHECK-NEXT: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 16 1122 ; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(<2 x s16>) = COPY $vgpr2 1123 ; CHECK-NEXT: [[BITCAST1:%[0-9]+]]:_(s32) = G_BITCAST [[COPY1]](<2 x s16>) 1124 ; CHECK-NEXT: [[LSHR:%[0-9]+]]:_(s32) = G_LSHR [[BITCAST1]], [[C]](s32) 1125 ; CHECK-NEXT: [[DEF:%[0-9]+]]:_(<4 x s16>) = G_IMPLICIT_DEF 1126 ; CHECK-NEXT: [[UV2:%[0-9]+]]:_(<2 x s16>), [[UV3:%[0-9]+]]:_(<2 x s16>) = G_UNMERGE_VALUES [[DEF]](<4 x s16>) 1127 ; CHECK-NEXT: [[BITCAST2:%[0-9]+]]:_(s32) = G_BITCAST [[UV3]](<2 x s16>) 1128 ; CHECK-NEXT: [[LSHR1:%[0-9]+]]:_(s32) = G_LSHR [[BITCAST2]], [[C]](s32) 1129 ; CHECK-NEXT: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 65535 1130 ; CHECK-NEXT: [[AND:%[0-9]+]]:_(s32) = G_AND [[BITCAST]], [[C1]] 1131 ; CHECK-NEXT: [[AND1:%[0-9]+]]:_(s32) = G_AND [[BITCAST1]], [[C1]] 1132 ; CHECK-NEXT: [[SHL:%[0-9]+]]:_(s32) = G_SHL [[AND1]], [[C]](s32) 1133 ; CHECK-NEXT: [[OR:%[0-9]+]]:_(s32) = G_OR [[AND]], [[SHL]] 1134 ; CHECK-NEXT: [[BITCAST3:%[0-9]+]]:_(<2 x s16>) = G_BITCAST [[OR]](s32) 1135 ; CHECK-NEXT: [[SHL1:%[0-9]+]]:_(s32) = G_SHL [[LSHR1]], [[C]](s32) 1136 ; CHECK-NEXT: [[OR1:%[0-9]+]]:_(s32) = G_OR [[LSHR]], [[SHL1]] 1137 ; CHECK-NEXT: [[BITCAST4:%[0-9]+]]:_(<2 x s16>) = G_BITCAST [[OR1]](s32) 1138 ; CHECK-NEXT: [[CONCAT_VECTORS:%[0-9]+]]:_(<4 x s16>) = G_CONCAT_VECTORS [[BITCAST3]](<2 x s16>), [[BITCAST4]](<2 x s16>) 1139 ; CHECK-NEXT: $vgpr0_vgpr1 = COPY [[CONCAT_VECTORS]](<4 x s16>) 1140 %0:_(<4 x s16>) = COPY $vgpr0_vgpr1 1141 %1:_(<3 x s16>) = G_EXTRACT %0, 0 1142 %2:_(<2 x s16>) = COPY $vgpr2 1143 %4:_(<3 x s16>) = G_INSERT %1, %2, 16 1144 %5:_(<4 x s16>) = G_IMPLICIT_DEF 1145 %6:_(<4 x s16>) = G_INSERT %5, %4, 0 1146 $vgpr0_vgpr1 = COPY %6 1147... 1148--- 1149name: test_insert_v3s16_s32_offset0 1150body: | 1151 bb.0: 1152 liveins: $vgpr0_vgpr1, $vgpr2 1153 1154 ; CHECK-LABEL: name: test_insert_v3s16_s32_offset0 1155 ; CHECK: liveins: $vgpr0_vgpr1, $vgpr2 1156 ; CHECK-NEXT: {{ $}} 1157 ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(<4 x s16>) = COPY $vgpr0_vgpr1 1158 ; CHECK-NEXT: [[UV:%[0-9]+]]:_(<2 x s16>), [[UV1:%[0-9]+]]:_(<2 x s16>) = G_UNMERGE_VALUES [[COPY]](<4 x s16>) 1159 ; CHECK-NEXT: [[BITCAST:%[0-9]+]]:_(s32) = G_BITCAST [[UV1]](<2 x s16>) 1160 ; CHECK-NEXT: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 16 1161 ; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(s32) = COPY $vgpr2 1162 ; CHECK-NEXT: [[LSHR:%[0-9]+]]:_(s32) = G_LSHR [[COPY1]], [[C]](s32) 1163 ; CHECK-NEXT: [[DEF:%[0-9]+]]:_(<4 x s16>) = G_IMPLICIT_DEF 1164 ; CHECK-NEXT: [[UV2:%[0-9]+]]:_(<2 x s16>), [[UV3:%[0-9]+]]:_(<2 x s16>) = G_UNMERGE_VALUES [[DEF]](<4 x s16>) 1165 ; CHECK-NEXT: [[BITCAST1:%[0-9]+]]:_(s32) = G_BITCAST [[UV3]](<2 x s16>) 1166 ; CHECK-NEXT: [[LSHR1:%[0-9]+]]:_(s32) = G_LSHR [[BITCAST1]], [[C]](s32) 1167 ; CHECK-NEXT: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 65535 1168 ; CHECK-NEXT: [[AND:%[0-9]+]]:_(s32) = G_AND [[COPY1]], [[C1]] 1169 ; CHECK-NEXT: [[SHL:%[0-9]+]]:_(s32) = G_SHL [[LSHR]], [[C]](s32) 1170 ; CHECK-NEXT: [[OR:%[0-9]+]]:_(s32) = G_OR [[AND]], [[SHL]] 1171 ; CHECK-NEXT: [[BITCAST2:%[0-9]+]]:_(<2 x s16>) = G_BITCAST [[OR]](s32) 1172 ; CHECK-NEXT: [[AND1:%[0-9]+]]:_(s32) = G_AND [[BITCAST]], [[C1]] 1173 ; CHECK-NEXT: [[SHL1:%[0-9]+]]:_(s32) = G_SHL [[LSHR1]], [[C]](s32) 1174 ; CHECK-NEXT: [[OR1:%[0-9]+]]:_(s32) = G_OR [[AND1]], [[SHL1]] 1175 ; CHECK-NEXT: [[BITCAST3:%[0-9]+]]:_(<2 x s16>) = G_BITCAST [[OR1]](s32) 1176 ; CHECK-NEXT: [[CONCAT_VECTORS:%[0-9]+]]:_(<4 x s16>) = G_CONCAT_VECTORS [[BITCAST2]](<2 x s16>), [[BITCAST3]](<2 x s16>) 1177 ; CHECK-NEXT: $vgpr0_vgpr1 = COPY [[CONCAT_VECTORS]](<4 x s16>) 1178 %0:_(<4 x s16>) = COPY $vgpr0_vgpr1 1179 %1:_(<3 x s16>) = G_EXTRACT %0, 0 1180 %2:_(s32) = COPY $vgpr2 1181 %4:_(<3 x s16>) = G_INSERT %1, %2, 0 1182 %5:_(<4 x s16>) = G_IMPLICIT_DEF 1183 %6:_(<4 x s16>) = G_INSERT %5, %4, 0 1184 $vgpr0_vgpr1 = COPY %6 1185... 1186--- 1187name: test_insert_v3s16_s32_offset16 1188body: | 1189 bb.0: 1190 liveins: $vgpr0_vgpr1, $vgpr2 1191 1192 ; CHECK-LABEL: name: test_insert_v3s16_s32_offset16 1193 ; CHECK: liveins: $vgpr0_vgpr1, $vgpr2 1194 ; CHECK-NEXT: {{ $}} 1195 ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(<4 x s16>) = COPY $vgpr0_vgpr1 1196 ; CHECK-NEXT: [[UV:%[0-9]+]]:_(<2 x s16>), [[UV1:%[0-9]+]]:_(<2 x s16>) = G_UNMERGE_VALUES [[COPY]](<4 x s16>) 1197 ; CHECK-NEXT: [[BITCAST:%[0-9]+]]:_(s32) = G_BITCAST [[UV]](<2 x s16>) 1198 ; CHECK-NEXT: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 16 1199 ; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(s32) = COPY $vgpr2 1200 ; CHECK-NEXT: [[LSHR:%[0-9]+]]:_(s32) = G_LSHR [[COPY1]], [[C]](s32) 1201 ; CHECK-NEXT: [[DEF:%[0-9]+]]:_(<4 x s16>) = G_IMPLICIT_DEF 1202 ; CHECK-NEXT: [[UV2:%[0-9]+]]:_(<2 x s16>), [[UV3:%[0-9]+]]:_(<2 x s16>) = G_UNMERGE_VALUES [[DEF]](<4 x s16>) 1203 ; CHECK-NEXT: [[BITCAST1:%[0-9]+]]:_(s32) = G_BITCAST [[UV3]](<2 x s16>) 1204 ; CHECK-NEXT: [[LSHR1:%[0-9]+]]:_(s32) = G_LSHR [[BITCAST1]], [[C]](s32) 1205 ; CHECK-NEXT: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 65535 1206 ; CHECK-NEXT: [[AND:%[0-9]+]]:_(s32) = G_AND [[BITCAST]], [[C1]] 1207 ; CHECK-NEXT: [[AND1:%[0-9]+]]:_(s32) = G_AND [[COPY1]], [[C1]] 1208 ; CHECK-NEXT: [[SHL:%[0-9]+]]:_(s32) = G_SHL [[AND1]], [[C]](s32) 1209 ; CHECK-NEXT: [[OR:%[0-9]+]]:_(s32) = G_OR [[AND]], [[SHL]] 1210 ; CHECK-NEXT: [[BITCAST2:%[0-9]+]]:_(<2 x s16>) = G_BITCAST [[OR]](s32) 1211 ; CHECK-NEXT: [[SHL1:%[0-9]+]]:_(s32) = G_SHL [[LSHR1]], [[C]](s32) 1212 ; CHECK-NEXT: [[OR1:%[0-9]+]]:_(s32) = G_OR [[LSHR]], [[SHL1]] 1213 ; CHECK-NEXT: [[BITCAST3:%[0-9]+]]:_(<2 x s16>) = G_BITCAST [[OR1]](s32) 1214 ; CHECK-NEXT: [[CONCAT_VECTORS:%[0-9]+]]:_(<4 x s16>) = G_CONCAT_VECTORS [[BITCAST2]](<2 x s16>), [[BITCAST3]](<2 x s16>) 1215 ; CHECK-NEXT: $vgpr0_vgpr1 = COPY [[CONCAT_VECTORS]](<4 x s16>) 1216 %0:_(<4 x s16>) = COPY $vgpr0_vgpr1 1217 %1:_(<3 x s16>) = G_EXTRACT %0, 0 1218 %2:_(s32) = COPY $vgpr2 1219 %4:_(<3 x s16>) = G_INSERT %1, %2, 16 1220 %5:_(<4 x s16>) = G_IMPLICIT_DEF 1221 %6:_(<4 x s16>) = G_INSERT %5, %4, 0 1222 $vgpr0_vgpr1 = COPY %6 1223... 1224--- 1225name: test_insert_v4s16_s16_offset0 1226body: | 1227 bb.0: 1228 liveins: $vgpr0_vgpr1, $vgpr2 1229 1230 ; CHECK-LABEL: name: test_insert_v4s16_s16_offset0 1231 ; CHECK: liveins: $vgpr0_vgpr1, $vgpr2 1232 ; CHECK-NEXT: {{ $}} 1233 ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(<4 x s16>) = COPY $vgpr0_vgpr1 1234 ; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(s32) = COPY $vgpr2 1235 ; CHECK-NEXT: [[UV:%[0-9]+]]:_(<2 x s16>), [[UV1:%[0-9]+]]:_(<2 x s16>) = G_UNMERGE_VALUES [[COPY]](<4 x s16>) 1236 ; CHECK-NEXT: [[BITCAST:%[0-9]+]]:_(s32) = G_BITCAST [[UV]](<2 x s16>) 1237 ; CHECK-NEXT: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 16 1238 ; CHECK-NEXT: [[LSHR:%[0-9]+]]:_(s32) = G_LSHR [[BITCAST]], [[C]](s32) 1239 ; CHECK-NEXT: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 65535 1240 ; CHECK-NEXT: [[AND:%[0-9]+]]:_(s32) = G_AND [[COPY1]], [[C1]] 1241 ; CHECK-NEXT: [[SHL:%[0-9]+]]:_(s32) = G_SHL [[LSHR]], [[C]](s32) 1242 ; CHECK-NEXT: [[OR:%[0-9]+]]:_(s32) = G_OR [[AND]], [[SHL]] 1243 ; CHECK-NEXT: [[BITCAST1:%[0-9]+]]:_(<2 x s16>) = G_BITCAST [[OR]](s32) 1244 ; CHECK-NEXT: [[CONCAT_VECTORS:%[0-9]+]]:_(<4 x s16>) = G_CONCAT_VECTORS [[BITCAST1]](<2 x s16>), [[UV1]](<2 x s16>) 1245 ; CHECK-NEXT: $vgpr0_vgpr1 = COPY [[CONCAT_VECTORS]](<4 x s16>) 1246 %0:_(<4 x s16>) = COPY $vgpr0_vgpr1 1247 %1:_(s32) = COPY $vgpr2 1248 %2:_(s16) = G_TRUNC %1 1249 %3:_(<4 x s16>) = G_INSERT %0, %2, 0 1250 $vgpr0_vgpr1 = COPY %3 1251... 1252--- 1253name: test_insert_v4s16_s16_offset16 1254body: | 1255 bb.0: 1256 liveins: $vgpr0_vgpr1, $vgpr2 1257 1258 ; CHECK-LABEL: name: test_insert_v4s16_s16_offset16 1259 ; CHECK: liveins: $vgpr0_vgpr1, $vgpr2 1260 ; CHECK-NEXT: {{ $}} 1261 ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(<4 x s16>) = COPY $vgpr0_vgpr1 1262 ; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(s32) = COPY $vgpr2 1263 ; CHECK-NEXT: [[UV:%[0-9]+]]:_(<2 x s16>), [[UV1:%[0-9]+]]:_(<2 x s16>) = G_UNMERGE_VALUES [[COPY]](<4 x s16>) 1264 ; CHECK-NEXT: [[BITCAST:%[0-9]+]]:_(s32) = G_BITCAST [[UV]](<2 x s16>) 1265 ; CHECK-NEXT: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 65535 1266 ; CHECK-NEXT: [[AND:%[0-9]+]]:_(s32) = G_AND [[BITCAST]], [[C]] 1267 ; CHECK-NEXT: [[AND1:%[0-9]+]]:_(s32) = G_AND [[COPY1]], [[C]] 1268 ; CHECK-NEXT: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 16 1269 ; CHECK-NEXT: [[SHL:%[0-9]+]]:_(s32) = G_SHL [[AND1]], [[C1]](s32) 1270 ; CHECK-NEXT: [[OR:%[0-9]+]]:_(s32) = G_OR [[AND]], [[SHL]] 1271 ; CHECK-NEXT: [[BITCAST1:%[0-9]+]]:_(<2 x s16>) = G_BITCAST [[OR]](s32) 1272 ; CHECK-NEXT: [[CONCAT_VECTORS:%[0-9]+]]:_(<4 x s16>) = G_CONCAT_VECTORS [[BITCAST1]](<2 x s16>), [[UV1]](<2 x s16>) 1273 ; CHECK-NEXT: $vgpr0_vgpr1 = COPY [[CONCAT_VECTORS]](<4 x s16>) 1274 %0:_(<4 x s16>) = COPY $vgpr0_vgpr1 1275 %1:_(s32) = COPY $vgpr2 1276 %2:_(s16) = G_TRUNC %1 1277 %3:_(<4 x s16>) = G_INSERT %0, %2, 16 1278 $vgpr0_vgpr1 = COPY %3 1279... 1280--- 1281name: test_insert_v4s16_s16_offset32 1282body: | 1283 bb.0: 1284 liveins: $vgpr0_vgpr1, $vgpr2 1285 1286 ; CHECK-LABEL: name: test_insert_v4s16_s16_offset32 1287 ; CHECK: liveins: $vgpr0_vgpr1, $vgpr2 1288 ; CHECK-NEXT: {{ $}} 1289 ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(<4 x s16>) = COPY $vgpr0_vgpr1 1290 ; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(s32) = COPY $vgpr2 1291 ; CHECK-NEXT: [[UV:%[0-9]+]]:_(<2 x s16>), [[UV1:%[0-9]+]]:_(<2 x s16>) = G_UNMERGE_VALUES [[COPY]](<4 x s16>) 1292 ; CHECK-NEXT: [[BITCAST:%[0-9]+]]:_(s32) = G_BITCAST [[UV1]](<2 x s16>) 1293 ; CHECK-NEXT: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 16 1294 ; CHECK-NEXT: [[LSHR:%[0-9]+]]:_(s32) = G_LSHR [[BITCAST]], [[C]](s32) 1295 ; CHECK-NEXT: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 65535 1296 ; CHECK-NEXT: [[AND:%[0-9]+]]:_(s32) = G_AND [[COPY1]], [[C1]] 1297 ; CHECK-NEXT: [[SHL:%[0-9]+]]:_(s32) = G_SHL [[LSHR]], [[C]](s32) 1298 ; CHECK-NEXT: [[OR:%[0-9]+]]:_(s32) = G_OR [[AND]], [[SHL]] 1299 ; CHECK-NEXT: [[BITCAST1:%[0-9]+]]:_(<2 x s16>) = G_BITCAST [[OR]](s32) 1300 ; CHECK-NEXT: [[CONCAT_VECTORS:%[0-9]+]]:_(<4 x s16>) = G_CONCAT_VECTORS [[UV]](<2 x s16>), [[BITCAST1]](<2 x s16>) 1301 ; CHECK-NEXT: $vgpr0_vgpr1 = COPY [[CONCAT_VECTORS]](<4 x s16>) 1302 %0:_(<4 x s16>) = COPY $vgpr0_vgpr1 1303 %1:_(s32) = COPY $vgpr2 1304 %2:_(s16) = G_TRUNC %1 1305 %3:_(<4 x s16>) = G_INSERT %0, %2, 32 1306 $vgpr0_vgpr1 = COPY %3 1307... 1308--- 1309name: test_insert_v4s16_s16_offset48 1310body: | 1311 bb.0: 1312 liveins: $vgpr0_vgpr1, $vgpr2 1313 1314 ; CHECK-LABEL: name: test_insert_v4s16_s16_offset48 1315 ; CHECK: liveins: $vgpr0_vgpr1, $vgpr2 1316 ; CHECK-NEXT: {{ $}} 1317 ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(<4 x s16>) = COPY $vgpr0_vgpr1 1318 ; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(s32) = COPY $vgpr2 1319 ; CHECK-NEXT: [[UV:%[0-9]+]]:_(<2 x s16>), [[UV1:%[0-9]+]]:_(<2 x s16>) = G_UNMERGE_VALUES [[COPY]](<4 x s16>) 1320 ; CHECK-NEXT: [[BITCAST:%[0-9]+]]:_(s32) = G_BITCAST [[UV1]](<2 x s16>) 1321 ; CHECK-NEXT: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 65535 1322 ; CHECK-NEXT: [[AND:%[0-9]+]]:_(s32) = G_AND [[BITCAST]], [[C]] 1323 ; CHECK-NEXT: [[AND1:%[0-9]+]]:_(s32) = G_AND [[COPY1]], [[C]] 1324 ; CHECK-NEXT: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 16 1325 ; CHECK-NEXT: [[SHL:%[0-9]+]]:_(s32) = G_SHL [[AND1]], [[C1]](s32) 1326 ; CHECK-NEXT: [[OR:%[0-9]+]]:_(s32) = G_OR [[AND]], [[SHL]] 1327 ; CHECK-NEXT: [[BITCAST1:%[0-9]+]]:_(<2 x s16>) = G_BITCAST [[OR]](s32) 1328 ; CHECK-NEXT: [[CONCAT_VECTORS:%[0-9]+]]:_(<4 x s16>) = G_CONCAT_VECTORS [[UV]](<2 x s16>), [[BITCAST1]](<2 x s16>) 1329 ; CHECK-NEXT: $vgpr0_vgpr1 = COPY [[CONCAT_VECTORS]](<4 x s16>) 1330 %0:_(<4 x s16>) = COPY $vgpr0_vgpr1 1331 %1:_(s32) = COPY $vgpr2 1332 %2:_(s16) = G_TRUNC %1 1333 %3:_(<4 x s16>) = G_INSERT %0, %2, 48 1334 $vgpr0_vgpr1 = COPY %3 1335... 1336--- 1337name: test_insert_v4s16_v2s16_offset0 1338body: | 1339 bb.0: 1340 liveins: $vgpr0_vgpr1, $vgpr2 1341 1342 ; CHECK-LABEL: name: test_insert_v4s16_v2s16_offset0 1343 ; CHECK: liveins: $vgpr0_vgpr1, $vgpr2 1344 ; CHECK-NEXT: {{ $}} 1345 ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(<4 x s16>) = COPY $vgpr0_vgpr1 1346 ; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(<2 x s16>) = COPY $vgpr2 1347 ; CHECK-NEXT: [[UV:%[0-9]+]]:_(<2 x s16>), [[UV1:%[0-9]+]]:_(<2 x s16>) = G_UNMERGE_VALUES [[COPY]](<4 x s16>) 1348 ; CHECK-NEXT: [[BITCAST:%[0-9]+]]:_(s32) = G_BITCAST [[COPY1]](<2 x s16>) 1349 ; CHECK-NEXT: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 16 1350 ; CHECK-NEXT: [[LSHR:%[0-9]+]]:_(s32) = G_LSHR [[BITCAST]], [[C]](s32) 1351 ; CHECK-NEXT: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 65535 1352 ; CHECK-NEXT: [[AND:%[0-9]+]]:_(s32) = G_AND [[BITCAST]], [[C1]] 1353 ; CHECK-NEXT: [[SHL:%[0-9]+]]:_(s32) = G_SHL [[LSHR]], [[C]](s32) 1354 ; CHECK-NEXT: [[OR:%[0-9]+]]:_(s32) = G_OR [[AND]], [[SHL]] 1355 ; CHECK-NEXT: [[BITCAST1:%[0-9]+]]:_(<2 x s16>) = G_BITCAST [[OR]](s32) 1356 ; CHECK-NEXT: [[CONCAT_VECTORS:%[0-9]+]]:_(<4 x s16>) = G_CONCAT_VECTORS [[BITCAST1]](<2 x s16>), [[UV1]](<2 x s16>) 1357 ; CHECK-NEXT: $vgpr0_vgpr1 = COPY [[CONCAT_VECTORS]](<4 x s16>) 1358 %0:_(<4 x s16>) = COPY $vgpr0_vgpr1 1359 %1:_(<2 x s16>) = COPY $vgpr2 1360 %2:_(<4 x s16>) = G_INSERT %0, %1, 0 1361 $vgpr0_vgpr1 = COPY %2 1362... 1363--- 1364name: test_insert_v4s16_v2s16_offset16 1365body: | 1366 bb.0: 1367 liveins: $vgpr0_vgpr1, $vgpr2 1368 1369 ; CHECK-LABEL: name: test_insert_v4s16_v2s16_offset16 1370 ; CHECK: liveins: $vgpr0_vgpr1, $vgpr2 1371 ; CHECK-NEXT: {{ $}} 1372 ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(<4 x s16>) = COPY $vgpr0_vgpr1 1373 ; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(<2 x s16>) = COPY $vgpr2 1374 ; CHECK-NEXT: [[UV:%[0-9]+]]:_(<2 x s16>), [[UV1:%[0-9]+]]:_(<2 x s16>) = G_UNMERGE_VALUES [[COPY]](<4 x s16>) 1375 ; CHECK-NEXT: [[BITCAST:%[0-9]+]]:_(s32) = G_BITCAST [[UV]](<2 x s16>) 1376 ; CHECK-NEXT: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 16 1377 ; CHECK-NEXT: [[BITCAST1:%[0-9]+]]:_(s32) = G_BITCAST [[UV1]](<2 x s16>) 1378 ; CHECK-NEXT: [[LSHR:%[0-9]+]]:_(s32) = G_LSHR [[BITCAST1]], [[C]](s32) 1379 ; CHECK-NEXT: [[BITCAST2:%[0-9]+]]:_(s32) = G_BITCAST [[COPY1]](<2 x s16>) 1380 ; CHECK-NEXT: [[LSHR1:%[0-9]+]]:_(s32) = G_LSHR [[BITCAST2]], [[C]](s32) 1381 ; CHECK-NEXT: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 65535 1382 ; CHECK-NEXT: [[AND:%[0-9]+]]:_(s32) = G_AND [[BITCAST]], [[C1]] 1383 ; CHECK-NEXT: [[AND1:%[0-9]+]]:_(s32) = G_AND [[BITCAST2]], [[C1]] 1384 ; CHECK-NEXT: [[SHL:%[0-9]+]]:_(s32) = G_SHL [[AND1]], [[C]](s32) 1385 ; CHECK-NEXT: [[OR:%[0-9]+]]:_(s32) = G_OR [[AND]], [[SHL]] 1386 ; CHECK-NEXT: [[BITCAST3:%[0-9]+]]:_(<2 x s16>) = G_BITCAST [[OR]](s32) 1387 ; CHECK-NEXT: [[SHL1:%[0-9]+]]:_(s32) = G_SHL [[LSHR]], [[C]](s32) 1388 ; CHECK-NEXT: [[OR1:%[0-9]+]]:_(s32) = G_OR [[LSHR1]], [[SHL1]] 1389 ; CHECK-NEXT: [[BITCAST4:%[0-9]+]]:_(<2 x s16>) = G_BITCAST [[OR1]](s32) 1390 ; CHECK-NEXT: [[CONCAT_VECTORS:%[0-9]+]]:_(<4 x s16>) = G_CONCAT_VECTORS [[BITCAST3]](<2 x s16>), [[BITCAST4]](<2 x s16>) 1391 ; CHECK-NEXT: $vgpr0_vgpr1 = COPY [[CONCAT_VECTORS]](<4 x s16>) 1392 %0:_(<4 x s16>) = COPY $vgpr0_vgpr1 1393 %1:_(<2 x s16>) = COPY $vgpr2 1394 %2:_(<4 x s16>) = G_INSERT %0, %1, 16 1395 $vgpr0_vgpr1 = COPY %2 1396... 1397--- 1398name: test_insert_v4s16_v2s16_offset32 1399body: | 1400 bb.0: 1401 liveins: $vgpr0_vgpr1, $vgpr2 1402 1403 ; CHECK-LABEL: name: test_insert_v4s16_v2s16_offset32 1404 ; CHECK: liveins: $vgpr0_vgpr1, $vgpr2 1405 ; CHECK-NEXT: {{ $}} 1406 ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(<4 x s16>) = COPY $vgpr0_vgpr1 1407 ; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(<2 x s16>) = COPY $vgpr2 1408 ; CHECK-NEXT: [[UV:%[0-9]+]]:_(<2 x s16>), [[UV1:%[0-9]+]]:_(<2 x s16>) = G_UNMERGE_VALUES [[COPY]](<4 x s16>) 1409 ; CHECK-NEXT: [[BITCAST:%[0-9]+]]:_(s32) = G_BITCAST [[COPY1]](<2 x s16>) 1410 ; CHECK-NEXT: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 16 1411 ; CHECK-NEXT: [[LSHR:%[0-9]+]]:_(s32) = G_LSHR [[BITCAST]], [[C]](s32) 1412 ; CHECK-NEXT: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 65535 1413 ; CHECK-NEXT: [[AND:%[0-9]+]]:_(s32) = G_AND [[BITCAST]], [[C1]] 1414 ; CHECK-NEXT: [[SHL:%[0-9]+]]:_(s32) = G_SHL [[LSHR]], [[C]](s32) 1415 ; CHECK-NEXT: [[OR:%[0-9]+]]:_(s32) = G_OR [[AND]], [[SHL]] 1416 ; CHECK-NEXT: [[BITCAST1:%[0-9]+]]:_(<2 x s16>) = G_BITCAST [[OR]](s32) 1417 ; CHECK-NEXT: [[CONCAT_VECTORS:%[0-9]+]]:_(<4 x s16>) = G_CONCAT_VECTORS [[UV]](<2 x s16>), [[BITCAST1]](<2 x s16>) 1418 ; CHECK-NEXT: $vgpr0_vgpr1 = COPY [[CONCAT_VECTORS]](<4 x s16>) 1419 %0:_(<4 x s16>) = COPY $vgpr0_vgpr1 1420 %1:_(<2 x s16>) = COPY $vgpr2 1421 %2:_(<4 x s16>) = G_INSERT %0, %1, 32 1422 $vgpr0_vgpr1 = COPY %2 1423... 1424--- 1425name: test_insert_v4s16_v3s16_offset0 1426body: | 1427 bb.0: 1428 liveins: $vgpr0_vgpr1, $vgpr2_vgpr3 1429 1430 ; CHECK-LABEL: name: test_insert_v4s16_v3s16_offset0 1431 ; CHECK: liveins: $vgpr0_vgpr1, $vgpr2_vgpr3 1432 ; CHECK-NEXT: {{ $}} 1433 ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(<4 x s16>) = COPY $vgpr0_vgpr1 1434 ; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(<4 x s16>) = COPY $vgpr2_vgpr3 1435 ; CHECK-NEXT: [[UV:%[0-9]+]]:_(<2 x s16>), [[UV1:%[0-9]+]]:_(<2 x s16>) = G_UNMERGE_VALUES [[COPY1]](<4 x s16>) 1436 ; CHECK-NEXT: [[BITCAST:%[0-9]+]]:_(s32) = G_BITCAST [[UV1]](<2 x s16>) 1437 ; CHECK-NEXT: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 16 1438 ; CHECK-NEXT: [[UV2:%[0-9]+]]:_(<2 x s16>), [[UV3:%[0-9]+]]:_(<2 x s16>) = G_UNMERGE_VALUES [[COPY]](<4 x s16>) 1439 ; CHECK-NEXT: [[BITCAST1:%[0-9]+]]:_(s32) = G_BITCAST [[UV3]](<2 x s16>) 1440 ; CHECK-NEXT: [[LSHR:%[0-9]+]]:_(s32) = G_LSHR [[BITCAST1]], [[C]](s32) 1441 ; CHECK-NEXT: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 65535 1442 ; CHECK-NEXT: [[AND:%[0-9]+]]:_(s32) = G_AND [[BITCAST]], [[C1]] 1443 ; CHECK-NEXT: [[SHL:%[0-9]+]]:_(s32) = G_SHL [[LSHR]], [[C]](s32) 1444 ; CHECK-NEXT: [[OR:%[0-9]+]]:_(s32) = G_OR [[AND]], [[SHL]] 1445 ; CHECK-NEXT: [[BITCAST2:%[0-9]+]]:_(<2 x s16>) = G_BITCAST [[OR]](s32) 1446 ; CHECK-NEXT: [[CONCAT_VECTORS:%[0-9]+]]:_(<4 x s16>) = G_CONCAT_VECTORS [[UV]](<2 x s16>), [[BITCAST2]](<2 x s16>) 1447 ; CHECK-NEXT: $vgpr0_vgpr1 = COPY [[CONCAT_VECTORS]](<4 x s16>) 1448 %0:_(<4 x s16>) = COPY $vgpr0_vgpr1 1449 %1:_(<4 x s16>) = COPY $vgpr2_vgpr3 1450 %2:_(<3 x s16>) = G_EXTRACT %1, 0 1451 %3:_(<4 x s16>) = G_INSERT %0, %2, 0 1452 $vgpr0_vgpr1 = COPY %3 1453... 1454--- 1455name: test_insert_v4s16_v3s16_offset16 1456body: | 1457 bb.0: 1458 liveins: $vgpr0_vgpr1, $vgpr2_vgpr3 1459 1460 ; CHECK-LABEL: name: test_insert_v4s16_v3s16_offset16 1461 ; CHECK: liveins: $vgpr0_vgpr1, $vgpr2_vgpr3 1462 ; CHECK-NEXT: {{ $}} 1463 ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(<4 x s16>) = COPY $vgpr0_vgpr1 1464 ; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(<4 x s16>) = COPY $vgpr2_vgpr3 1465 ; CHECK-NEXT: [[UV:%[0-9]+]]:_(<2 x s16>), [[UV1:%[0-9]+]]:_(<2 x s16>) = G_UNMERGE_VALUES [[COPY1]](<4 x s16>) 1466 ; CHECK-NEXT: [[BITCAST:%[0-9]+]]:_(s32) = G_BITCAST [[UV]](<2 x s16>) 1467 ; CHECK-NEXT: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 16 1468 ; CHECK-NEXT: [[LSHR:%[0-9]+]]:_(s32) = G_LSHR [[BITCAST]], [[C]](s32) 1469 ; CHECK-NEXT: [[BITCAST1:%[0-9]+]]:_(s32) = G_BITCAST [[UV1]](<2 x s16>) 1470 ; CHECK-NEXT: [[UV2:%[0-9]+]]:_(<2 x s16>), [[UV3:%[0-9]+]]:_(<2 x s16>) = G_UNMERGE_VALUES [[COPY]](<4 x s16>) 1471 ; CHECK-NEXT: [[BITCAST2:%[0-9]+]]:_(s32) = G_BITCAST [[UV2]](<2 x s16>) 1472 ; CHECK-NEXT: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 65535 1473 ; CHECK-NEXT: [[AND:%[0-9]+]]:_(s32) = G_AND [[BITCAST2]], [[C1]] 1474 ; CHECK-NEXT: [[AND1:%[0-9]+]]:_(s32) = G_AND [[BITCAST]], [[C1]] 1475 ; CHECK-NEXT: [[SHL:%[0-9]+]]:_(s32) = G_SHL [[AND1]], [[C]](s32) 1476 ; CHECK-NEXT: [[OR:%[0-9]+]]:_(s32) = G_OR [[AND]], [[SHL]] 1477 ; CHECK-NEXT: [[BITCAST3:%[0-9]+]]:_(<2 x s16>) = G_BITCAST [[OR]](s32) 1478 ; CHECK-NEXT: [[AND2:%[0-9]+]]:_(s32) = G_AND [[BITCAST1]], [[C1]] 1479 ; CHECK-NEXT: [[SHL1:%[0-9]+]]:_(s32) = G_SHL [[AND2]], [[C]](s32) 1480 ; CHECK-NEXT: [[OR1:%[0-9]+]]:_(s32) = G_OR [[LSHR]], [[SHL1]] 1481 ; CHECK-NEXT: [[BITCAST4:%[0-9]+]]:_(<2 x s16>) = G_BITCAST [[OR1]](s32) 1482 ; CHECK-NEXT: [[CONCAT_VECTORS:%[0-9]+]]:_(<4 x s16>) = G_CONCAT_VECTORS [[BITCAST3]](<2 x s16>), [[BITCAST4]](<2 x s16>) 1483 ; CHECK-NEXT: $vgpr0_vgpr1 = COPY [[CONCAT_VECTORS]](<4 x s16>) 1484 %0:_(<4 x s16>) = COPY $vgpr0_vgpr1 1485 %1:_(<4 x s16>) = COPY $vgpr2_vgpr3 1486 %2:_(<3 x s16>) = G_EXTRACT %1, 0 1487 %3:_(<4 x s16>) = G_INSERT %0, %2, 16 1488 $vgpr0_vgpr1 = COPY %3 1489... 1490--- 1491name: test_insert_v4s16_s32_offset0 1492body: | 1493 bb.0: 1494 liveins: $vgpr0_vgpr1, $vgpr2 1495 1496 ; CHECK-LABEL: name: test_insert_v4s16_s32_offset0 1497 ; CHECK: liveins: $vgpr0_vgpr1, $vgpr2 1498 ; CHECK-NEXT: {{ $}} 1499 ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(<4 x s16>) = COPY $vgpr0_vgpr1 1500 ; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(s32) = COPY $vgpr2 1501 ; CHECK-NEXT: [[UV:%[0-9]+]]:_(<2 x s16>), [[UV1:%[0-9]+]]:_(<2 x s16>) = G_UNMERGE_VALUES [[COPY]](<4 x s16>) 1502 ; CHECK-NEXT: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 16 1503 ; CHECK-NEXT: [[LSHR:%[0-9]+]]:_(s32) = G_LSHR [[COPY1]], [[C]](s32) 1504 ; CHECK-NEXT: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 65535 1505 ; CHECK-NEXT: [[AND:%[0-9]+]]:_(s32) = G_AND [[COPY1]], [[C1]] 1506 ; CHECK-NEXT: [[SHL:%[0-9]+]]:_(s32) = G_SHL [[LSHR]], [[C]](s32) 1507 ; CHECK-NEXT: [[OR:%[0-9]+]]:_(s32) = G_OR [[AND]], [[SHL]] 1508 ; CHECK-NEXT: [[BITCAST:%[0-9]+]]:_(<2 x s16>) = G_BITCAST [[OR]](s32) 1509 ; CHECK-NEXT: [[CONCAT_VECTORS:%[0-9]+]]:_(<4 x s16>) = G_CONCAT_VECTORS [[BITCAST]](<2 x s16>), [[UV1]](<2 x s16>) 1510 ; CHECK-NEXT: $vgpr0_vgpr1 = COPY [[CONCAT_VECTORS]](<4 x s16>) 1511 %0:_(<4 x s16>) = COPY $vgpr0_vgpr1 1512 %1:_(s32) = COPY $vgpr2 1513 %2:_(<4 x s16>) = G_INSERT %0, %1, 0 1514 $vgpr0_vgpr1 = COPY %2 1515... 1516--- 1517name: test_insert_v4s16_s32_offset16 1518body: | 1519 bb.0: 1520 liveins: $vgpr0_vgpr1, $vgpr2 1521 1522 ; CHECK-LABEL: name: test_insert_v4s16_s32_offset16 1523 ; CHECK: liveins: $vgpr0_vgpr1, $vgpr2 1524 ; CHECK-NEXT: {{ $}} 1525 ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(<4 x s16>) = COPY $vgpr0_vgpr1 1526 ; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(s32) = COPY $vgpr2 1527 ; CHECK-NEXT: [[UV:%[0-9]+]]:_(<2 x s16>), [[UV1:%[0-9]+]]:_(<2 x s16>) = G_UNMERGE_VALUES [[COPY]](<4 x s16>) 1528 ; CHECK-NEXT: [[BITCAST:%[0-9]+]]:_(s32) = G_BITCAST [[UV]](<2 x s16>) 1529 ; CHECK-NEXT: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 16 1530 ; CHECK-NEXT: [[BITCAST1:%[0-9]+]]:_(s32) = G_BITCAST [[UV1]](<2 x s16>) 1531 ; CHECK-NEXT: [[LSHR:%[0-9]+]]:_(s32) = G_LSHR [[BITCAST1]], [[C]](s32) 1532 ; CHECK-NEXT: [[LSHR1:%[0-9]+]]:_(s32) = G_LSHR [[COPY1]], [[C]](s32) 1533 ; CHECK-NEXT: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 65535 1534 ; CHECK-NEXT: [[AND:%[0-9]+]]:_(s32) = G_AND [[BITCAST]], [[C1]] 1535 ; CHECK-NEXT: [[AND1:%[0-9]+]]:_(s32) = G_AND [[COPY1]], [[C1]] 1536 ; CHECK-NEXT: [[SHL:%[0-9]+]]:_(s32) = G_SHL [[AND1]], [[C]](s32) 1537 ; CHECK-NEXT: [[OR:%[0-9]+]]:_(s32) = G_OR [[AND]], [[SHL]] 1538 ; CHECK-NEXT: [[BITCAST2:%[0-9]+]]:_(<2 x s16>) = G_BITCAST [[OR]](s32) 1539 ; CHECK-NEXT: [[SHL1:%[0-9]+]]:_(s32) = G_SHL [[LSHR]], [[C]](s32) 1540 ; CHECK-NEXT: [[OR1:%[0-9]+]]:_(s32) = G_OR [[LSHR1]], [[SHL1]] 1541 ; CHECK-NEXT: [[BITCAST3:%[0-9]+]]:_(<2 x s16>) = G_BITCAST [[OR1]](s32) 1542 ; CHECK-NEXT: [[CONCAT_VECTORS:%[0-9]+]]:_(<4 x s16>) = G_CONCAT_VECTORS [[BITCAST2]](<2 x s16>), [[BITCAST3]](<2 x s16>) 1543 ; CHECK-NEXT: $vgpr0_vgpr1 = COPY [[CONCAT_VECTORS]](<4 x s16>) 1544 %0:_(<4 x s16>) = COPY $vgpr0_vgpr1 1545 %1:_(s32) = COPY $vgpr2 1546 %2:_(<4 x s16>) = G_INSERT %0, %1, 16 1547 $vgpr0_vgpr1 = COPY %2 1548... 1549--- 1550name: test_insert_v4s16_s32_offset32 1551body: | 1552 bb.0: 1553 liveins: $vgpr0_vgpr1, $vgpr2 1554 1555 ; CHECK-LABEL: name: test_insert_v4s16_s32_offset32 1556 ; CHECK: liveins: $vgpr0_vgpr1, $vgpr2 1557 ; CHECK-NEXT: {{ $}} 1558 ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(<4 x s16>) = COPY $vgpr0_vgpr1 1559 ; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(s32) = COPY $vgpr2 1560 ; CHECK-NEXT: [[UV:%[0-9]+]]:_(<2 x s16>), [[UV1:%[0-9]+]]:_(<2 x s16>) = G_UNMERGE_VALUES [[COPY]](<4 x s16>) 1561 ; CHECK-NEXT: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 16 1562 ; CHECK-NEXT: [[LSHR:%[0-9]+]]:_(s32) = G_LSHR [[COPY1]], [[C]](s32) 1563 ; CHECK-NEXT: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 65535 1564 ; CHECK-NEXT: [[AND:%[0-9]+]]:_(s32) = G_AND [[COPY1]], [[C1]] 1565 ; CHECK-NEXT: [[SHL:%[0-9]+]]:_(s32) = G_SHL [[LSHR]], [[C]](s32) 1566 ; CHECK-NEXT: [[OR:%[0-9]+]]:_(s32) = G_OR [[AND]], [[SHL]] 1567 ; CHECK-NEXT: [[BITCAST:%[0-9]+]]:_(<2 x s16>) = G_BITCAST [[OR]](s32) 1568 ; CHECK-NEXT: [[CONCAT_VECTORS:%[0-9]+]]:_(<4 x s16>) = G_CONCAT_VECTORS [[UV]](<2 x s16>), [[BITCAST]](<2 x s16>) 1569 ; CHECK-NEXT: $vgpr0_vgpr1 = COPY [[CONCAT_VECTORS]](<4 x s16>) 1570 %0:_(<4 x s16>) = COPY $vgpr0_vgpr1 1571 %1:_(s32) = COPY $vgpr2 1572 %2:_(<4 x s16>) = G_INSERT %0, %1, 32 1573 $vgpr0_vgpr1 = COPY %2 1574... 1575 1576--- 1577name: test_insert_s64_s16_offset0 1578body: | 1579 bb.0: 1580 liveins: $vgpr0_vgpr1, $vgpr2 1581 1582 ; CHECK-LABEL: name: test_insert_s64_s16_offset0 1583 ; CHECK: liveins: $vgpr0_vgpr1, $vgpr2 1584 ; CHECK-NEXT: {{ $}} 1585 ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(s64) = COPY $vgpr0_vgpr1 1586 ; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(s32) = COPY $vgpr2 1587 ; CHECK-NEXT: [[TRUNC:%[0-9]+]]:_(s16) = G_TRUNC [[COPY1]](s32) 1588 ; CHECK-NEXT: [[INSERT:%[0-9]+]]:_(s64) = G_INSERT [[COPY]], [[TRUNC]](s16), 0 1589 ; CHECK-NEXT: $vgpr0_vgpr1 = COPY [[INSERT]](s64) 1590 %0:_(s64) = COPY $vgpr0_vgpr1 1591 %1:_(s32) = COPY $vgpr2 1592 %2:_(s16) = G_TRUNC %1 1593 %3:_(s64) = G_INSERT %0, %2, 0 1594 $vgpr0_vgpr1 = COPY %3 1595... 1596--- 1597name: test_insert_s64_s16_offset16 1598body: | 1599 bb.0: 1600 liveins: $vgpr0_vgpr1, $vgpr2 1601 1602 ; CHECK-LABEL: name: test_insert_s64_s16_offset16 1603 ; CHECK: liveins: $vgpr0_vgpr1, $vgpr2 1604 ; CHECK-NEXT: {{ $}} 1605 ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(s64) = COPY $vgpr0_vgpr1 1606 ; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(s32) = COPY $vgpr2 1607 ; CHECK-NEXT: [[TRUNC:%[0-9]+]]:_(s16) = G_TRUNC [[COPY1]](s32) 1608 ; CHECK-NEXT: [[INSERT:%[0-9]+]]:_(s64) = G_INSERT [[COPY]], [[TRUNC]](s16), 16 1609 ; CHECK-NEXT: $vgpr0_vgpr1 = COPY [[INSERT]](s64) 1610 %0:_(s64) = COPY $vgpr0_vgpr1 1611 %1:_(s32) = COPY $vgpr2 1612 %2:_(s16) = G_TRUNC %1 1613 %3:_(s64) = G_INSERT %0, %2, 16 1614 $vgpr0_vgpr1 = COPY %3 1615... 1616--- 1617name: test_insert_s64_s16_offset32 1618body: | 1619 bb.0: 1620 liveins: $vgpr0_vgpr1, $vgpr2 1621 1622 ; CHECK-LABEL: name: test_insert_s64_s16_offset32 1623 ; CHECK: liveins: $vgpr0_vgpr1, $vgpr2 1624 ; CHECK-NEXT: {{ $}} 1625 ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(s64) = COPY $vgpr0_vgpr1 1626 ; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(s32) = COPY $vgpr2 1627 ; CHECK-NEXT: [[TRUNC:%[0-9]+]]:_(s16) = G_TRUNC [[COPY1]](s32) 1628 ; CHECK-NEXT: [[INSERT:%[0-9]+]]:_(s64) = G_INSERT [[COPY]], [[TRUNC]](s16), 32 1629 ; CHECK-NEXT: $vgpr0_vgpr1 = COPY [[INSERT]](s64) 1630 %0:_(s64) = COPY $vgpr0_vgpr1 1631 %1:_(s32) = COPY $vgpr2 1632 %2:_(s16) = G_TRUNC %1 1633 %3:_(s64) = G_INSERT %0, %2, 32 1634 $vgpr0_vgpr1 = COPY %3 1635... 1636--- 1637name: test_insert_s64_s16_offset48 1638body: | 1639 bb.0: 1640 liveins: $vgpr0_vgpr1, $vgpr2 1641 1642 ; CHECK-LABEL: name: test_insert_s64_s16_offset48 1643 ; CHECK: liveins: $vgpr0_vgpr1, $vgpr2 1644 ; CHECK-NEXT: {{ $}} 1645 ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(s64) = COPY $vgpr0_vgpr1 1646 ; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(s32) = COPY $vgpr2 1647 ; CHECK-NEXT: [[TRUNC:%[0-9]+]]:_(s16) = G_TRUNC [[COPY1]](s32) 1648 ; CHECK-NEXT: [[INSERT:%[0-9]+]]:_(s64) = G_INSERT [[COPY]], [[TRUNC]](s16), 48 1649 ; CHECK-NEXT: $vgpr0_vgpr1 = COPY [[INSERT]](s64) 1650 %0:_(s64) = COPY $vgpr0_vgpr1 1651 %1:_(s32) = COPY $vgpr2 1652 %2:_(s16) = G_TRUNC %1 1653 %3:_(s64) = G_INSERT %0, %2, 48 1654 $vgpr0_vgpr1 = COPY %3 1655... 1656--- 1657name: test_insert_s32_s16_offset0 1658body: | 1659 bb.0: 1660 liveins: $vgpr0, $vgpr1 1661 1662 ; CHECK-LABEL: name: test_insert_s32_s16_offset0 1663 ; CHECK: liveins: $vgpr0, $vgpr1 1664 ; CHECK-NEXT: {{ $}} 1665 ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(s32) = COPY $vgpr0 1666 ; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(s32) = COPY $vgpr1 1667 ; CHECK-NEXT: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 65535 1668 ; CHECK-NEXT: [[AND:%[0-9]+]]:_(s32) = G_AND [[COPY1]], [[C]] 1669 ; CHECK-NEXT: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 -65536 1670 ; CHECK-NEXT: [[AND1:%[0-9]+]]:_(s32) = G_AND [[COPY1]], [[C1]] 1671 ; CHECK-NEXT: [[OR:%[0-9]+]]:_(s32) = G_OR [[AND1]], [[AND]] 1672 ; CHECK-NEXT: [[COPY2:%[0-9]+]]:_(s32) = COPY [[OR]](s32) 1673 ; CHECK-NEXT: $vgpr0 = COPY [[COPY2]](s32) 1674 %0:_(s32) = COPY $vgpr0 1675 %1:_(s32) = COPY $vgpr1 1676 %2:_(s16) = G_TRUNC %1 1677 %3:_(s32) = G_INSERT %1, %2, 0 1678 $vgpr0 = COPY %3 1679... 1680 1681--- 1682name: test_insert_s32_s16_offset1 1683body: | 1684 bb.0: 1685 liveins: $vgpr0, $vgpr1 1686 1687 ; CHECK-LABEL: name: test_insert_s32_s16_offset1 1688 ; CHECK: liveins: $vgpr0, $vgpr1 1689 ; CHECK-NEXT: {{ $}} 1690 ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(s32) = COPY $vgpr0 1691 ; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(s32) = COPY $vgpr1 1692 ; CHECK-NEXT: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 65535 1693 ; CHECK-NEXT: [[AND:%[0-9]+]]:_(s32) = G_AND [[COPY1]], [[C]] 1694 ; CHECK-NEXT: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 1 1695 ; CHECK-NEXT: [[SHL:%[0-9]+]]:_(s32) = G_SHL [[AND]], [[C1]](s32) 1696 ; CHECK-NEXT: [[C2:%[0-9]+]]:_(s32) = G_CONSTANT i32 -131071 1697 ; CHECK-NEXT: [[AND1:%[0-9]+]]:_(s32) = G_AND [[COPY1]], [[C2]] 1698 ; CHECK-NEXT: [[OR:%[0-9]+]]:_(s32) = G_OR [[AND1]], [[SHL]] 1699 ; CHECK-NEXT: [[COPY2:%[0-9]+]]:_(s32) = COPY [[OR]](s32) 1700 ; CHECK-NEXT: $vgpr0 = COPY [[COPY2]](s32) 1701 %0:_(s32) = COPY $vgpr0 1702 %1:_(s32) = COPY $vgpr1 1703 %2:_(s16) = G_TRUNC %1 1704 %3:_(s32) = G_INSERT %1, %2, 1 1705 $vgpr0 = COPY %3 1706... 1707 1708--- 1709name: test_insert_s32_s16_offset8 1710body: | 1711 bb.0: 1712 liveins: $vgpr0, $vgpr1 1713 1714 ; CHECK-LABEL: name: test_insert_s32_s16_offset8 1715 ; CHECK: liveins: $vgpr0, $vgpr1 1716 ; CHECK-NEXT: {{ $}} 1717 ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(s32) = COPY $vgpr0 1718 ; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(s32) = COPY $vgpr1 1719 ; CHECK-NEXT: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 65535 1720 ; CHECK-NEXT: [[AND:%[0-9]+]]:_(s32) = G_AND [[COPY1]], [[C]] 1721 ; CHECK-NEXT: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 8 1722 ; CHECK-NEXT: [[SHL:%[0-9]+]]:_(s32) = G_SHL [[AND]], [[C1]](s32) 1723 ; CHECK-NEXT: [[C2:%[0-9]+]]:_(s32) = G_CONSTANT i32 -16776961 1724 ; CHECK-NEXT: [[AND1:%[0-9]+]]:_(s32) = G_AND [[COPY1]], [[C2]] 1725 ; CHECK-NEXT: [[OR:%[0-9]+]]:_(s32) = G_OR [[AND1]], [[SHL]] 1726 ; CHECK-NEXT: [[COPY2:%[0-9]+]]:_(s32) = COPY [[OR]](s32) 1727 ; CHECK-NEXT: $vgpr0 = COPY [[COPY2]](s32) 1728 %0:_(s32) = COPY $vgpr0 1729 %1:_(s32) = COPY $vgpr1 1730 %2:_(s16) = G_TRUNC %1 1731 %3:_(s32) = G_INSERT %1, %2, 8 1732 $vgpr0 = COPY %3 1733... 1734 1735--- 1736name: test_insert_s32_s16_offset16 1737body: | 1738 bb.0: 1739 liveins: $vgpr0, $vgpr1 1740 1741 ; CHECK-LABEL: name: test_insert_s32_s16_offset16 1742 ; CHECK: liveins: $vgpr0, $vgpr1 1743 ; CHECK-NEXT: {{ $}} 1744 ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(s32) = COPY $vgpr0 1745 ; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(s32) = COPY $vgpr1 1746 ; CHECK-NEXT: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 65535 1747 ; CHECK-NEXT: [[AND:%[0-9]+]]:_(s32) = G_AND [[COPY1]], [[C]] 1748 ; CHECK-NEXT: [[COPY2:%[0-9]+]]:_(s32) = COPY [[AND]](s32) 1749 ; CHECK-NEXT: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 16 1750 ; CHECK-NEXT: [[SHL:%[0-9]+]]:_(s32) = G_SHL [[COPY2]], [[C1]](s32) 1751 ; CHECK-NEXT: [[OR:%[0-9]+]]:_(s32) = G_OR [[AND]], [[SHL]] 1752 ; CHECK-NEXT: [[COPY3:%[0-9]+]]:_(s32) = COPY [[OR]](s32) 1753 ; CHECK-NEXT: $vgpr0 = COPY [[COPY3]](s32) 1754 %0:_(s32) = COPY $vgpr0 1755 %1:_(s32) = COPY $vgpr1 1756 %2:_(s16) = G_TRUNC %1 1757 %3:_(s32) = G_INSERT %1, %2, 16 1758 $vgpr0 = COPY %3 1759... 1760