1# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py 2# RUN: llc -mtriple=amdgcn -mcpu=tahiti -run-pass=instruction-select -verify-machineinstrs -o - %s | FileCheck -check-prefix=WAVE64 %s 3# RUN: llc -mtriple=amdgcn -mcpu=fiji -run-pass=instruction-select -verify-machineinstrs -o - %s | FileCheck -check-prefix=WAVE64 %s 4# RUN: llc -mtriple=amdgcn -mcpu=gfx900 -run-pass=instruction-select -verify-machineinstrs -o - %s | FileCheck -check-prefix=WAVE64 %s 5# RUN: llc -mtriple=amdgcn -mcpu=gfx1010 -run-pass=instruction-select -verify-machineinstrs -o - %s | FileCheck -check-prefix=WAVE32 %s 6# RUN: llc -mtriple=amdgcn -mcpu=gfx1100 -run-pass=instruction-select -verify-machineinstrs -o - %s | FileCheck -check-prefix=WAVE32 %s 7 8--- 9name: usube_s32_s1_sss 10legalized: true 11regBankSelected: true 12 13body: | 14 bb.0: 15 liveins: $sgpr0, $sgpr1, $sgpr2 16 17 ; WAVE64-LABEL: name: usube_s32_s1_sss 18 ; WAVE64: liveins: $sgpr0, $sgpr1, $sgpr2 19 ; WAVE64-NEXT: {{ $}} 20 ; WAVE64-NEXT: [[COPY:%[0-9]+]]:sreg_32 = COPY $sgpr0 21 ; WAVE64-NEXT: [[COPY1:%[0-9]+]]:sreg_32 = COPY $sgpr1 22 ; WAVE64-NEXT: [[COPY2:%[0-9]+]]:sreg_32 = COPY $sgpr2 23 ; WAVE64-NEXT: [[S_MOV_B32_:%[0-9]+]]:sreg_32 = S_MOV_B32 0 24 ; WAVE64-NEXT: S_CMP_EQ_U32 [[COPY2]], [[S_MOV_B32_]], implicit-def $scc 25 ; WAVE64-NEXT: [[COPY3:%[0-9]+]]:sreg_32 = COPY $scc 26 ; WAVE64-NEXT: $scc = COPY [[COPY3]] 27 ; WAVE64-NEXT: [[S_SUBB_U32_:%[0-9]+]]:sreg_32 = S_SUBB_U32 [[COPY]], [[COPY1]], implicit-def $scc, implicit $scc 28 ; WAVE64-NEXT: [[COPY4:%[0-9]+]]:sreg_32 = COPY $scc 29 ; WAVE64-NEXT: $scc = COPY [[COPY4]] 30 ; WAVE64-NEXT: [[S_CSELECT_B32_:%[0-9]+]]:sreg_32 = S_CSELECT_B32 [[COPY]], [[COPY1]], implicit $scc 31 ; WAVE64-NEXT: S_ENDPGM 0, implicit [[S_SUBB_U32_]], implicit [[S_CSELECT_B32_]] 32 ; 33 ; WAVE32-LABEL: name: usube_s32_s1_sss 34 ; WAVE32: liveins: $sgpr0, $sgpr1, $sgpr2 35 ; WAVE32-NEXT: {{ $}} 36 ; WAVE32-NEXT: [[COPY:%[0-9]+]]:sreg_32 = COPY $sgpr0 37 ; WAVE32-NEXT: [[COPY1:%[0-9]+]]:sreg_32 = COPY $sgpr1 38 ; WAVE32-NEXT: [[COPY2:%[0-9]+]]:sreg_32 = COPY $sgpr2 39 ; WAVE32-NEXT: [[S_MOV_B32_:%[0-9]+]]:sreg_32 = S_MOV_B32 0 40 ; WAVE32-NEXT: S_CMP_EQ_U32 [[COPY2]], [[S_MOV_B32_]], implicit-def $scc 41 ; WAVE32-NEXT: [[COPY3:%[0-9]+]]:sreg_32 = COPY $scc 42 ; WAVE32-NEXT: $scc = COPY [[COPY3]] 43 ; WAVE32-NEXT: [[S_SUBB_U32_:%[0-9]+]]:sreg_32 = S_SUBB_U32 [[COPY]], [[COPY1]], implicit-def $scc, implicit $scc 44 ; WAVE32-NEXT: [[COPY4:%[0-9]+]]:sreg_32 = COPY $scc 45 ; WAVE32-NEXT: $scc = COPY [[COPY4]] 46 ; WAVE32-NEXT: [[S_CSELECT_B32_:%[0-9]+]]:sreg_32 = S_CSELECT_B32 [[COPY]], [[COPY1]], implicit $scc 47 ; WAVE32-NEXT: S_ENDPGM 0, implicit [[S_SUBB_U32_]], implicit [[S_CSELECT_B32_]] 48 %0:sgpr(s32) = COPY $sgpr0 49 %1:sgpr(s32) = COPY $sgpr1 50 %2:sgpr(s32) = COPY $sgpr2 51 %3:sgpr(s32) = G_CONSTANT i32 0 52 %4:sgpr(s32) = G_ICMP intpred(eq), %2, %3 53 %5:sgpr(s32), %6:sgpr(s32) = G_USUBE %0, %1, %4 54 %7:sgpr(s32) = G_SELECT %6, %0, %1 55 S_ENDPGM 0, implicit %5, implicit %7 56... 57 58--- 59name: usube_s32_s1_vvv 60legalized: true 61regBankSelected: true 62 63body: | 64 bb.0: 65 liveins: $vgpr0, $vgpr1, $vgpr2 66 67 ; WAVE64-LABEL: name: usube_s32_s1_vvv 68 ; WAVE64: liveins: $vgpr0, $vgpr1, $vgpr2 69 ; WAVE64-NEXT: {{ $}} 70 ; WAVE64-NEXT: [[COPY:%[0-9]+]]:vgpr_32 = COPY $vgpr0 71 ; WAVE64-NEXT: [[COPY1:%[0-9]+]]:vgpr_32 = COPY $vgpr1 72 ; WAVE64-NEXT: [[COPY2:%[0-9]+]]:vgpr_32 = COPY $vgpr2 73 ; WAVE64-NEXT: [[V_MOV_B32_e32_:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 0, implicit $exec 74 ; WAVE64-NEXT: [[V_CMP_EQ_U32_e64_:%[0-9]+]]:sreg_64_xexec = V_CMP_EQ_U32_e64 [[COPY2]], [[V_MOV_B32_e32_]], implicit $exec 75 ; WAVE64-NEXT: [[V_SUBB_U32_e64_:%[0-9]+]]:vgpr_32, [[V_SUBB_U32_e64_1:%[0-9]+]]:sreg_64_xexec = V_SUBB_U32_e64 [[COPY]], [[COPY1]], [[V_CMP_EQ_U32_e64_]], 0, implicit $exec 76 ; WAVE64-NEXT: [[V_CNDMASK_B32_e64_:%[0-9]+]]:vgpr_32 = V_CNDMASK_B32_e64 0, [[COPY1]], 0, [[COPY]], [[V_SUBB_U32_e64_1]], implicit $exec 77 ; WAVE64-NEXT: S_ENDPGM 0, implicit [[V_SUBB_U32_e64_]], implicit [[V_CNDMASK_B32_e64_]] 78 ; 79 ; WAVE32-LABEL: name: usube_s32_s1_vvv 80 ; WAVE32: liveins: $vgpr0, $vgpr1, $vgpr2 81 ; WAVE32-NEXT: {{ $}} 82 ; WAVE32-NEXT: [[COPY:%[0-9]+]]:vgpr_32 = COPY $vgpr0 83 ; WAVE32-NEXT: [[COPY1:%[0-9]+]]:vgpr_32 = COPY $vgpr1 84 ; WAVE32-NEXT: [[COPY2:%[0-9]+]]:vgpr_32 = COPY $vgpr2 85 ; WAVE32-NEXT: [[V_MOV_B32_e32_:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 0, implicit $exec 86 ; WAVE32-NEXT: [[V_CMP_EQ_U32_e64_:%[0-9]+]]:sreg_32_xm0_xexec = V_CMP_EQ_U32_e64 [[COPY2]], [[V_MOV_B32_e32_]], implicit $exec 87 ; WAVE32-NEXT: [[V_SUBB_U32_e64_:%[0-9]+]]:vgpr_32, [[V_SUBB_U32_e64_1:%[0-9]+]]:sreg_32_xm0_xexec = V_SUBB_U32_e64 [[COPY]], [[COPY1]], [[V_CMP_EQ_U32_e64_]], 0, implicit $exec 88 ; WAVE32-NEXT: [[V_CNDMASK_B32_e64_:%[0-9]+]]:vgpr_32 = V_CNDMASK_B32_e64 0, [[COPY1]], 0, [[COPY]], [[V_SUBB_U32_e64_1]], implicit $exec 89 ; WAVE32-NEXT: S_ENDPGM 0, implicit [[V_SUBB_U32_e64_]], implicit [[V_CNDMASK_B32_e64_]] 90 %0:vgpr(s32) = COPY $vgpr0 91 %1:vgpr(s32) = COPY $vgpr1 92 %2:vgpr(s32) = COPY $vgpr2 93 %3:vgpr(s32) = G_CONSTANT i32 0 94 %4:vcc(s1) = G_ICMP intpred(eq), %2, %3 95 %5:vgpr(s32), %6:vcc(s1) = G_USUBE %0, %1, %4 96 %7:vgpr(s32) = G_SELECT %6, %0, %1 97 S_ENDPGM 0, implicit %5, implicit %7 98... 99 100--- 101name: usube_s32_s1_sss_unused_co 102legalized: true 103regBankSelected: true 104 105body: | 106 bb.0: 107 liveins: $sgpr0, $sgpr1, $sgpr2 108 109 ; WAVE64-LABEL: name: usube_s32_s1_sss_unused_co 110 ; WAVE64: liveins: $sgpr0, $sgpr1, $sgpr2 111 ; WAVE64-NEXT: {{ $}} 112 ; WAVE64-NEXT: [[COPY:%[0-9]+]]:sreg_32 = COPY $sgpr0 113 ; WAVE64-NEXT: [[COPY1:%[0-9]+]]:sreg_32 = COPY $sgpr1 114 ; WAVE64-NEXT: [[COPY2:%[0-9]+]]:sreg_32 = COPY $sgpr2 115 ; WAVE64-NEXT: [[S_MOV_B32_:%[0-9]+]]:sreg_32 = S_MOV_B32 0 116 ; WAVE64-NEXT: S_CMP_EQ_U32 [[COPY2]], [[S_MOV_B32_]], implicit-def $scc 117 ; WAVE64-NEXT: [[COPY3:%[0-9]+]]:sreg_32 = COPY $scc 118 ; WAVE64-NEXT: $scc = COPY [[COPY3]] 119 ; WAVE64-NEXT: [[S_SUBB_U32_:%[0-9]+]]:sreg_32 = S_SUBB_U32 [[COPY]], [[COPY1]], implicit-def dead $scc, implicit $scc 120 ; WAVE64-NEXT: S_ENDPGM 0, implicit [[S_SUBB_U32_]] 121 ; 122 ; WAVE32-LABEL: name: usube_s32_s1_sss_unused_co 123 ; WAVE32: liveins: $sgpr0, $sgpr1, $sgpr2 124 ; WAVE32-NEXT: {{ $}} 125 ; WAVE32-NEXT: [[COPY:%[0-9]+]]:sreg_32 = COPY $sgpr0 126 ; WAVE32-NEXT: [[COPY1:%[0-9]+]]:sreg_32 = COPY $sgpr1 127 ; WAVE32-NEXT: [[COPY2:%[0-9]+]]:sreg_32 = COPY $sgpr2 128 ; WAVE32-NEXT: [[S_MOV_B32_:%[0-9]+]]:sreg_32 = S_MOV_B32 0 129 ; WAVE32-NEXT: S_CMP_EQ_U32 [[COPY2]], [[S_MOV_B32_]], implicit-def $scc 130 ; WAVE32-NEXT: [[COPY3:%[0-9]+]]:sreg_32 = COPY $scc 131 ; WAVE32-NEXT: $scc = COPY [[COPY3]] 132 ; WAVE32-NEXT: [[S_SUBB_U32_:%[0-9]+]]:sreg_32 = S_SUBB_U32 [[COPY]], [[COPY1]], implicit-def dead $scc, implicit $scc 133 ; WAVE32-NEXT: S_ENDPGM 0, implicit [[S_SUBB_U32_]] 134 %0:sgpr(s32) = COPY $sgpr0 135 %1:sgpr(s32) = COPY $sgpr1 136 %2:sgpr(s32) = COPY $sgpr2 137 %3:sgpr(s32) = G_CONSTANT i32 0 138 %4:sgpr(s32) = G_ICMP intpred(eq), %2, %3 139 %5:sgpr(s32), %6:sgpr(s32) = G_USUBE %0, %1, %4 140 S_ENDPGM 0, implicit %5 141... 142 143--- 144name: usube_s32_s1_vvv_unused_co 145legalized: true 146regBankSelected: true 147 148body: | 149 bb.0: 150 liveins: $vgpr0, $vgpr1, $vgpr2 151 152 ; WAVE64-LABEL: name: usube_s32_s1_vvv_unused_co 153 ; WAVE64: liveins: $vgpr0, $vgpr1, $vgpr2 154 ; WAVE64-NEXT: {{ $}} 155 ; WAVE64-NEXT: [[COPY:%[0-9]+]]:vgpr_32 = COPY $vgpr0 156 ; WAVE64-NEXT: [[COPY1:%[0-9]+]]:vgpr_32 = COPY $vgpr1 157 ; WAVE64-NEXT: [[COPY2:%[0-9]+]]:vgpr_32 = COPY $vgpr2 158 ; WAVE64-NEXT: [[V_MOV_B32_e32_:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 0, implicit $exec 159 ; WAVE64-NEXT: [[V_CMP_EQ_U32_e64_:%[0-9]+]]:sreg_64_xexec = V_CMP_EQ_U32_e64 [[COPY2]], [[V_MOV_B32_e32_]], implicit $exec 160 ; WAVE64-NEXT: [[V_SUBB_U32_e64_:%[0-9]+]]:vgpr_32, [[V_SUBB_U32_e64_1:%[0-9]+]]:sreg_64_xexec = V_SUBB_U32_e64 [[COPY]], [[COPY1]], [[V_CMP_EQ_U32_e64_]], 0, implicit $exec 161 ; WAVE64-NEXT: S_ENDPGM 0, implicit [[V_SUBB_U32_e64_]] 162 ; 163 ; WAVE32-LABEL: name: usube_s32_s1_vvv_unused_co 164 ; WAVE32: liveins: $vgpr0, $vgpr1, $vgpr2 165 ; WAVE32-NEXT: {{ $}} 166 ; WAVE32-NEXT: [[COPY:%[0-9]+]]:vgpr_32 = COPY $vgpr0 167 ; WAVE32-NEXT: [[COPY1:%[0-9]+]]:vgpr_32 = COPY $vgpr1 168 ; WAVE32-NEXT: [[COPY2:%[0-9]+]]:vgpr_32 = COPY $vgpr2 169 ; WAVE32-NEXT: [[V_MOV_B32_e32_:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 0, implicit $exec 170 ; WAVE32-NEXT: [[V_CMP_EQ_U32_e64_:%[0-9]+]]:sreg_32_xm0_xexec = V_CMP_EQ_U32_e64 [[COPY2]], [[V_MOV_B32_e32_]], implicit $exec 171 ; WAVE32-NEXT: [[V_SUBB_U32_e64_:%[0-9]+]]:vgpr_32, [[V_SUBB_U32_e64_1:%[0-9]+]]:sreg_32_xm0_xexec = V_SUBB_U32_e64 [[COPY]], [[COPY1]], [[V_CMP_EQ_U32_e64_]], 0, implicit $exec 172 ; WAVE32-NEXT: S_ENDPGM 0, implicit [[V_SUBB_U32_e64_]] 173 %0:vgpr(s32) = COPY $vgpr0 174 %1:vgpr(s32) = COPY $vgpr1 175 %2:vgpr(s32) = COPY $vgpr2 176 %3:vgpr(s32) = G_CONSTANT i32 0 177 %4:vcc(s1) = G_ICMP intpred(eq), %2, %3 178 %5:vgpr(s32), %6:vcc(s1) = G_USUBE %0, %1, %4 179 S_ENDPGM 0, implicit %5 180... 181