xref: /llvm-project/llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-uitofp.mir (revision 35e937b4de1890186347a382f7727ba86441dbda) 
1# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
2# RUN: llc -mtriple=amdgcn -mcpu=hawaii -run-pass=instruction-select -verify-machineinstrs %s -o - | FileCheck -check-prefix=WAVE64 %s
3# RUN: llc -mtriple=amdgcn -mcpu=gfx1010 -run-pass=instruction-select -verify-machineinstrs %s -o - | FileCheck -check-prefix=WAVE32 %s
4# RUN: llc -mtriple=amdgcn -mcpu=gfx1100 -mattr=+real-true16 -run-pass=instruction-select -verify-machineinstrs %s -o - | FileCheck -check-prefixes=GFX11,GFX11-TRUE16 %s
5# RUN: llc -mtriple=amdgcn -mcpu=gfx1100 -mattr=-real-true16 -run-pass=instruction-select -verify-machineinstrs %s -o - | FileCheck -check-prefixes=GFX11,GFX11-FAKE16 %s
6
7---
8name: uitofp_s32_to_s32_vv
9legalized: true
10regBankSelected: true
11tracksRegLiveness: true
12
13body: |
14  bb.0:
15    liveins: $vgpr0
16
17    ; WAVE64-LABEL: name: uitofp_s32_to_s32_vv
18    ; WAVE64: liveins: $vgpr0
19    ; WAVE64-NEXT: {{  $}}
20    ; WAVE64-NEXT: [[COPY:%[0-9]+]]:vgpr_32 = COPY $vgpr0
21    ; WAVE64-NEXT: [[V_CVT_F32_U32_e64_:%[0-9]+]]:vgpr_32 = V_CVT_F32_U32_e64 [[COPY]], 0, 0, implicit $mode, implicit $exec
22    ; WAVE64-NEXT: $vgpr0 = COPY [[V_CVT_F32_U32_e64_]]
23    ;
24    ; WAVE32-LABEL: name: uitofp_s32_to_s32_vv
25    ; WAVE32: liveins: $vgpr0
26    ; WAVE32-NEXT: {{  $}}
27    ; WAVE32-NEXT: [[COPY:%[0-9]+]]:vgpr_32 = COPY $vgpr0
28    ; WAVE32-NEXT: [[V_CVT_F32_U32_e64_:%[0-9]+]]:vgpr_32 = V_CVT_F32_U32_e64 [[COPY]], 0, 0, implicit $mode, implicit $exec
29    ; WAVE32-NEXT: $vgpr0 = COPY [[V_CVT_F32_U32_e64_]]
30    ;
31    ; GFX11-LABEL: name: uitofp_s32_to_s32_vv
32    ; GFX11: liveins: $vgpr0
33    ; GFX11-NEXT: {{  $}}
34    ; GFX11-NEXT: [[COPY:%[0-9]+]]:vgpr_32 = COPY $vgpr0
35    ; GFX11-NEXT: [[V_CVT_F32_U32_e64_:%[0-9]+]]:vgpr_32 = V_CVT_F32_U32_e64 [[COPY]], 0, 0, implicit $mode, implicit $exec
36    ; GFX11-NEXT: $vgpr0 = COPY [[V_CVT_F32_U32_e64_]]
37    %0:vgpr(s32) = COPY $vgpr0
38    %1:vgpr(s32) = G_UITOFP %0
39    $vgpr0 = COPY %1
40...
41
42---
43name: uitofp_s32_to_s32_vs
44legalized: true
45regBankSelected: true
46tracksRegLiveness: true
47
48body: |
49  bb.0:
50    liveins: $sgpr0
51
52    ; WAVE64-LABEL: name: uitofp_s32_to_s32_vs
53    ; WAVE64: liveins: $sgpr0
54    ; WAVE64-NEXT: {{  $}}
55    ; WAVE64-NEXT: [[COPY:%[0-9]+]]:sreg_32 = COPY $sgpr0
56    ; WAVE64-NEXT: [[V_CVT_F32_U32_e64_:%[0-9]+]]:vgpr_32 = V_CVT_F32_U32_e64 [[COPY]], 0, 0, implicit $mode, implicit $exec
57    ; WAVE64-NEXT: $vgpr0 = COPY [[V_CVT_F32_U32_e64_]]
58    ;
59    ; WAVE32-LABEL: name: uitofp_s32_to_s32_vs
60    ; WAVE32: liveins: $sgpr0
61    ; WAVE32-NEXT: {{  $}}
62    ; WAVE32-NEXT: [[COPY:%[0-9]+]]:sreg_32 = COPY $sgpr0
63    ; WAVE32-NEXT: [[V_CVT_F32_U32_e64_:%[0-9]+]]:vgpr_32 = V_CVT_F32_U32_e64 [[COPY]], 0, 0, implicit $mode, implicit $exec
64    ; WAVE32-NEXT: $vgpr0 = COPY [[V_CVT_F32_U32_e64_]]
65    ;
66    ; GFX11-LABEL: name: uitofp_s32_to_s32_vs
67    ; GFX11: liveins: $sgpr0
68    ; GFX11-NEXT: {{  $}}
69    ; GFX11-NEXT: [[COPY:%[0-9]+]]:sreg_32 = COPY $sgpr0
70    ; GFX11-NEXT: [[V_CVT_F32_U32_e64_:%[0-9]+]]:vgpr_32 = V_CVT_F32_U32_e64 [[COPY]], 0, 0, implicit $mode, implicit $exec
71    ; GFX11-NEXT: $vgpr0 = COPY [[V_CVT_F32_U32_e64_]]
72    %0:sgpr(s32) = COPY $sgpr0
73    %1:vgpr(s32) = G_UITOFP %0
74    $vgpr0 = COPY %1
75...
76
77---
78name: uitofp_s32_to_s16_vv
79legalized: true
80regBankSelected: true
81tracksRegLiveness: true
82
83body: |
84  bb.0:
85    liveins: $vgpr0
86
87    ; WAVE64-LABEL: name: uitofp_s32_to_s16_vv
88    ; WAVE64: liveins: $vgpr0
89    ; WAVE64-NEXT: {{  $}}
90    ; WAVE64-NEXT: [[COPY:%[0-9]+]]:vgpr_32 = COPY $vgpr0
91    ; WAVE64-NEXT: [[V_CVT_F32_U32_e32_:%[0-9]+]]:vgpr_32 = V_CVT_F32_U32_e32 [[COPY]], implicit $mode, implicit $exec
92    ; WAVE64-NEXT: [[V_CVT_F16_F32_e64_:%[0-9]+]]:vgpr_32 = nofpexcept V_CVT_F16_F32_e64 0, [[V_CVT_F32_U32_e32_]], 0, 0, implicit $mode, implicit $exec
93    ; WAVE64-NEXT: $vgpr0 = COPY [[V_CVT_F16_F32_e64_]]
94    ;
95    ; WAVE32-LABEL: name: uitofp_s32_to_s16_vv
96    ; WAVE32: liveins: $vgpr0
97    ; WAVE32-NEXT: {{  $}}
98    ; WAVE32-NEXT: [[COPY:%[0-9]+]]:vgpr_32 = COPY $vgpr0
99    ; WAVE32-NEXT: [[V_CVT_F32_U32_e32_:%[0-9]+]]:vgpr_32 = V_CVT_F32_U32_e32 [[COPY]], implicit $mode, implicit $exec
100    ; WAVE32-NEXT: [[V_CVT_F16_F32_e64_:%[0-9]+]]:vgpr_32 = nofpexcept V_CVT_F16_F32_e64 0, [[V_CVT_F32_U32_e32_]], 0, 0, implicit $mode, implicit $exec
101    ; WAVE32-NEXT: $vgpr0 = COPY [[V_CVT_F16_F32_e64_]]
102    ;
103    ; GFX11-TRUE16-LABEL: name: uitofp_s32_to_s16_vv
104    ; GFX11-TRUE16: liveins: $vgpr0
105    ; GFX11-TRUE16-NEXT: {{  $}}
106    ; GFX11-TRUE16-NEXT: [[COPY:%[0-9]+]]:vgpr_32 = COPY $vgpr0
107    ; GFX11-TRUE16-NEXT: [[V_CVT_F32_U32_e32_:%[0-9]+]]:vgpr_32 = V_CVT_F32_U32_e32 [[COPY]], implicit $mode, implicit $exec
108    ; GFX11-TRUE16-NEXT: [[V_CVT_F16_F32_t16_e64_:%[0-9]+]]:vgpr_16 = nofpexcept V_CVT_F16_F32_t16_e64 0, [[V_CVT_F32_U32_e32_]], 0, 0, 0, implicit $mode, implicit $exec
109    ; GFX11-TRUE16-NEXT: [[DEF:%[0-9]+]]:vgpr_16 = IMPLICIT_DEF
110    ; GFX11-TRUE16-NEXT: [[REG_SEQUENCE:%[0-9]+]]:vgpr_32 = REG_SEQUENCE [[V_CVT_F16_F32_t16_e64_]], %subreg.lo16, [[DEF]], %subreg.hi16
111    ; GFX11-TRUE16-NEXT: $vgpr0 = COPY [[REG_SEQUENCE]]
112    ;
113    ; GFX11-FAKE16-LABEL: name: uitofp_s32_to_s16_vv
114    ; GFX11-FAKE16: liveins: $vgpr0
115    ; GFX11-FAKE16-NEXT: {{  $}}
116    ; GFX11-FAKE16-NEXT: [[COPY:%[0-9]+]]:vgpr_32 = COPY $vgpr0
117    ; GFX11-FAKE16-NEXT: [[V_CVT_F32_U32_e32_:%[0-9]+]]:vgpr_32 = V_CVT_F32_U32_e32 [[COPY]], implicit $mode, implicit $exec
118    ; GFX11-FAKE16-NEXT: [[V_CVT_F16_F32_fake16_e64_:%[0-9]+]]:vgpr_32 = nofpexcept V_CVT_F16_F32_fake16_e64 0, [[V_CVT_F32_U32_e32_]], 0, 0, implicit $mode, implicit $exec
119    ; GFX11-FAKE16-NEXT: $vgpr0 = COPY [[V_CVT_F16_F32_fake16_e64_]]
120    %0:vgpr(s32) = COPY $vgpr0
121    %1:vgpr(s16) = G_UITOFP %0
122    %2:vgpr(s32) = G_ANYEXT %1
123    $vgpr0 = COPY %2
124...
125
126---
127name: uitofp_s32_to_s16_vs
128legalized: true
129regBankSelected: true
130tracksRegLiveness: true
131
132body: |
133  bb.0:
134    liveins: $sgpr0
135
136    ; WAVE64-LABEL: name: uitofp_s32_to_s16_vs
137    ; WAVE64: liveins: $sgpr0
138    ; WAVE64-NEXT: {{  $}}
139    ; WAVE64-NEXT: [[COPY:%[0-9]+]]:sreg_32 = COPY $sgpr0
140    ; WAVE64-NEXT: [[V_CVT_F32_U32_e32_:%[0-9]+]]:vgpr_32 = V_CVT_F32_U32_e32 [[COPY]], implicit $mode, implicit $exec
141    ; WAVE64-NEXT: [[V_CVT_F16_F32_e64_:%[0-9]+]]:vgpr_32 = nofpexcept V_CVT_F16_F32_e64 0, [[V_CVT_F32_U32_e32_]], 0, 0, implicit $mode, implicit $exec
142    ; WAVE64-NEXT: $vgpr0 = COPY [[V_CVT_F16_F32_e64_]]
143    ;
144    ; WAVE32-LABEL: name: uitofp_s32_to_s16_vs
145    ; WAVE32: liveins: $sgpr0
146    ; WAVE32-NEXT: {{  $}}
147    ; WAVE32-NEXT: [[COPY:%[0-9]+]]:sreg_32 = COPY $sgpr0
148    ; WAVE32-NEXT: [[V_CVT_F32_U32_e32_:%[0-9]+]]:vgpr_32 = V_CVT_F32_U32_e32 [[COPY]], implicit $mode, implicit $exec
149    ; WAVE32-NEXT: [[V_CVT_F16_F32_e64_:%[0-9]+]]:vgpr_32 = nofpexcept V_CVT_F16_F32_e64 0, [[V_CVT_F32_U32_e32_]], 0, 0, implicit $mode, implicit $exec
150    ; WAVE32-NEXT: $vgpr0 = COPY [[V_CVT_F16_F32_e64_]]
151    ;
152    ; GFX11-TRUE16-LABEL: name: uitofp_s32_to_s16_vs
153    ; GFX11-TRUE16: liveins: $sgpr0
154    ; GFX11-TRUE16-NEXT: {{  $}}
155    ; GFX11-TRUE16-NEXT: [[COPY:%[0-9]+]]:sreg_32 = COPY $sgpr0
156    ; GFX11-TRUE16-NEXT: [[V_CVT_F32_U32_e32_:%[0-9]+]]:vgpr_32 = V_CVT_F32_U32_e32 [[COPY]], implicit $mode, implicit $exec
157    ; GFX11-TRUE16-NEXT: [[V_CVT_F16_F32_t16_e64_:%[0-9]+]]:vgpr_16 = nofpexcept V_CVT_F16_F32_t16_e64 0, [[V_CVT_F32_U32_e32_]], 0, 0, 0, implicit $mode, implicit $exec
158    ; GFX11-TRUE16-NEXT: [[DEF:%[0-9]+]]:vgpr_16 = IMPLICIT_DEF
159    ; GFX11-TRUE16-NEXT: [[REG_SEQUENCE:%[0-9]+]]:vgpr_32 = REG_SEQUENCE [[V_CVT_F16_F32_t16_e64_]], %subreg.lo16, [[DEF]], %subreg.hi16
160    ; GFX11-TRUE16-NEXT: $vgpr0 = COPY [[REG_SEQUENCE]]
161    ;
162    ; GFX11-FAKE16-LABEL: name: uitofp_s32_to_s16_vs
163    ; GFX11-FAKE16: liveins: $sgpr0
164    ; GFX11-FAKE16-NEXT: {{  $}}
165    ; GFX11-FAKE16-NEXT: [[COPY:%[0-9]+]]:sreg_32 = COPY $sgpr0
166    ; GFX11-FAKE16-NEXT: [[V_CVT_F32_U32_e32_:%[0-9]+]]:vgpr_32 = V_CVT_F32_U32_e32 [[COPY]], implicit $mode, implicit $exec
167    ; GFX11-FAKE16-NEXT: [[V_CVT_F16_F32_fake16_e64_:%[0-9]+]]:vgpr_32 = nofpexcept V_CVT_F16_F32_fake16_e64 0, [[V_CVT_F32_U32_e32_]], 0, 0, implicit $mode, implicit $exec
168    ; GFX11-FAKE16-NEXT: $vgpr0 = COPY [[V_CVT_F16_F32_fake16_e64_]]
169    %0:sgpr(s32) = COPY $sgpr0
170    %1:vgpr(s16) = G_UITOFP %0
171    %2:vgpr(s32) = G_ANYEXT %1
172    $vgpr0 = COPY %2
173...
174