xref: /llvm-project/llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-scalar-float-sop2.mir (revision 2d6d723a85c2d007b0359c206d66cd2e5a9f00e1) 
1# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
2# RUN: llc -mtriple=amdgcn -mcpu=gfx1150 -run-pass=instruction-select -verify-machineinstrs -o - %s | FileCheck -check-prefix=GFX1150 %s
3# RUN: llc -mtriple=amdgcn -mcpu=gfx1200 -run-pass=instruction-select -verify-machineinstrs -o - %s | FileCheck -check-prefix=GFX1150 %s
4
5---
6name:            fadd_f32
7legalized:       true
8regBankSelected: true
9body:             |
10  bb.0:
11    liveins: $sgpr0, $sgpr1
12
13    ; GFX1150-LABEL: name: fadd_f32
14    ; GFX1150: liveins: $sgpr0, $sgpr1
15    ; GFX1150-NEXT: {{  $}}
16    ; GFX1150-NEXT: [[COPY:%[0-9]+]]:sreg_32 = COPY $sgpr0
17    ; GFX1150-NEXT: [[COPY1:%[0-9]+]]:sreg_32 = COPY $sgpr1
18    ; GFX1150-NEXT: %2:sreg_32 = nofpexcept S_ADD_F32 [[COPY]], [[COPY1]], implicit $mode
19    ; GFX1150-NEXT: $sgpr0 = COPY %2
20    %0:sgpr(s32) = COPY $sgpr0
21    %1:sgpr(s32) = COPY $sgpr1
22    %2:sgpr(s32) = G_FADD %0, %1
23    $sgpr0 = COPY %2(s32)
24
25...
26---
27name:            fsub_f32
28legalized:       true
29regBankSelected: true
30body:             |
31  bb.0:
32    liveins: $sgpr0, $sgpr1
33
34    ; GFX1150-LABEL: name: fsub_f32
35    ; GFX1150: liveins: $sgpr0, $sgpr1
36    ; GFX1150-NEXT: {{  $}}
37    ; GFX1150-NEXT: [[COPY:%[0-9]+]]:sreg_32 = COPY $sgpr0
38    ; GFX1150-NEXT: [[COPY1:%[0-9]+]]:sreg_32 = COPY $sgpr1
39    ; GFX1150-NEXT: %2:sreg_32 = nofpexcept S_SUB_F32 [[COPY]], [[COPY1]], implicit $mode
40    ; GFX1150-NEXT: $sgpr0 = COPY %2
41    %0:sgpr(s32) = COPY $sgpr0
42    %1:sgpr(s32) = COPY $sgpr1
43    %2:sgpr(s32) = G_FSUB %0, %1
44    $sgpr0 = COPY %2(s32)
45
46...
47---
48name:            fmul_f32
49legalized:       true
50regBankSelected: true
51body:             |
52  bb.0:
53    liveins: $sgpr0, $sgpr1
54
55    ; GFX1150-LABEL: name: fmul_f32
56    ; GFX1150: liveins: $sgpr0, $sgpr1
57    ; GFX1150-NEXT: {{  $}}
58    ; GFX1150-NEXT: [[COPY:%[0-9]+]]:sreg_32 = COPY $sgpr0
59    ; GFX1150-NEXT: [[COPY1:%[0-9]+]]:sreg_32 = COPY $sgpr1
60    ; GFX1150-NEXT: %2:sreg_32 = nofpexcept S_MUL_F32 [[COPY]], [[COPY1]], implicit $mode
61    ; GFX1150-NEXT: $sgpr0 = COPY %2
62    %0:sgpr(s32) = COPY $sgpr0
63    %1:sgpr(s32) = COPY $sgpr1
64    %2:sgpr(s32) = G_FMUL %0, %1
65    $sgpr0 = COPY %2(s32)
66
67...
68---
69name:            fmin_f32
70legalized:       true
71regBankSelected: true
72body:             |
73  bb.0:
74    liveins: $sgpr0, $sgpr1
75
76    ; GFX1150-LABEL: name: fmin_f32
77    ; GFX1150: liveins: $sgpr0, $sgpr1
78    ; GFX1150-NEXT: {{  $}}
79    ; GFX1150-NEXT: [[COPY:%[0-9]+]]:sreg_32 = COPY $sgpr0
80    ; GFX1150-NEXT: [[COPY1:%[0-9]+]]:sreg_32 = COPY $sgpr1
81    ; GFX1150-NEXT: %2:sreg_32 = nofpexcept S_MIN_F32 [[COPY]], [[COPY1]], implicit $mode
82    ; GFX1150-NEXT: $sgpr0 = COPY %2
83    %0:sgpr(s32) = COPY $sgpr0
84    %1:sgpr(s32) = COPY $sgpr1
85    %2:sgpr(s32) = G_FMINNUM %0, %1
86    $sgpr0 = COPY %2(s32)
87
88...
89---
90name:            fmax_f32
91legalized:       true
92regBankSelected: true
93body:             |
94  bb.0:
95    liveins: $sgpr0, $sgpr1
96
97    ; GFX1150-LABEL: name: fmax_f32
98    ; GFX1150: liveins: $sgpr0, $sgpr1
99    ; GFX1150-NEXT: {{  $}}
100    ; GFX1150-NEXT: [[COPY:%[0-9]+]]:sreg_32 = COPY $sgpr0
101    ; GFX1150-NEXT: [[COPY1:%[0-9]+]]:sreg_32 = COPY $sgpr1
102    ; GFX1150-NEXT: %2:sreg_32 = nofpexcept S_MAX_F32 [[COPY]], [[COPY1]], implicit $mode
103    ; GFX1150-NEXT: $sgpr0 = COPY %2
104    %0:sgpr(s32) = COPY $sgpr0
105    %1:sgpr(s32) = COPY $sgpr1
106    %2:sgpr(s32) = G_FMAXNUM %0, %1
107    $sgpr0 = COPY %2(s32)
108
109...
110---
111name:            fadd_f16
112legalized:       true
113regBankSelected: true
114body:             |
115  bb.0:
116    liveins: $sgpr0, $sgpr1
117
118    ; GFX1150-LABEL: name: fadd_f16
119    ; GFX1150: liveins: $sgpr0, $sgpr1
120    ; GFX1150-NEXT: {{  $}}
121    ; GFX1150-NEXT: [[COPY:%[0-9]+]]:sreg_32 = COPY $sgpr0
122    ; GFX1150-NEXT: [[COPY1:%[0-9]+]]:sreg_32 = COPY $sgpr1
123    ; GFX1150-NEXT: %4:sreg_32 = nofpexcept S_ADD_F16 [[COPY]], [[COPY1]], implicit $mode
124    ; GFX1150-NEXT: $sgpr0 = COPY %4
125    %0:sgpr(s32) = COPY $sgpr0
126    %1:sgpr(s16) = G_TRUNC %0(s32)
127    %2:sgpr(s32) = COPY $sgpr1
128    %3:sgpr(s16) = G_TRUNC %2(s32)
129    %4:sgpr(s16) = G_FADD %1, %3
130    %5:sgpr(s32) = G_ANYEXT %4(s16)
131    $sgpr0 = COPY %5(s32)
132
133...
134---
135name:            fsub_f16
136legalized:       true
137regBankSelected: true
138body:             |
139 bb.0:
140    liveins: $sgpr0, $sgpr1
141
142    ; GFX1150-LABEL: name: fsub_f16
143    ; GFX1150: liveins: $sgpr0, $sgpr1
144    ; GFX1150-NEXT: {{  $}}
145    ; GFX1150-NEXT: [[COPY:%[0-9]+]]:sreg_32 = COPY $sgpr0
146    ; GFX1150-NEXT: [[COPY1:%[0-9]+]]:sreg_32 = COPY $sgpr1
147    ; GFX1150-NEXT: %4:sreg_32 = nofpexcept S_SUB_F16 [[COPY]], [[COPY1]], implicit $mode
148    ; GFX1150-NEXT: $sgpr0 = COPY %4
149    %0:sgpr(s32) = COPY $sgpr0
150    %1:sgpr(s16) = G_TRUNC %0(s32)
151    %2:sgpr(s32) = COPY $sgpr1
152    %3:sgpr(s16) = G_TRUNC %2(s32)
153    %4:sgpr(s16) = G_FSUB %1, %3
154    %5:sgpr(s32) = G_ANYEXT %4(s16)
155    $sgpr0 = COPY %5(s32)
156
157...
158---
159name:            fmul_f16
160legalized:       true
161regBankSelected: true
162body:             |
163  bb.0:
164    liveins: $sgpr0, $sgpr1
165
166    ; GFX1150-LABEL: name: fmul_f16
167    ; GFX1150: liveins: $sgpr0, $sgpr1
168    ; GFX1150-NEXT: {{  $}}
169    ; GFX1150-NEXT: [[COPY:%[0-9]+]]:sreg_32 = COPY $sgpr0
170    ; GFX1150-NEXT: [[COPY1:%[0-9]+]]:sreg_32 = COPY $sgpr1
171    ; GFX1150-NEXT: %4:sreg_32 = nofpexcept S_MUL_F16 [[COPY]], [[COPY1]], implicit $mode
172    ; GFX1150-NEXT: $sgpr0 = COPY %4
173    %0:sgpr(s32) = COPY $sgpr0
174    %1:sgpr(s16) = G_TRUNC %0(s32)
175    %2:sgpr(s32) = COPY $sgpr1
176    %3:sgpr(s16) = G_TRUNC %2(s32)
177    %4:sgpr(s16) = G_FMUL %1, %3
178    %5:sgpr(s32) = G_ANYEXT %4(s16)
179    $sgpr0 = COPY %5(s32)
180
181...
182---
183name:            fmin_f16
184legalized:       true
185regBankSelected: true
186body:             |
187  bb.0:
188    liveins: $sgpr0, $sgpr1
189
190    ; GFX1150-LABEL: name: fmin_f16
191    ; GFX1150: liveins: $sgpr0, $sgpr1
192    ; GFX1150-NEXT: {{  $}}
193    ; GFX1150-NEXT: [[COPY:%[0-9]+]]:sreg_32 = COPY $sgpr0
194    ; GFX1150-NEXT: [[COPY1:%[0-9]+]]:sreg_32 = COPY $sgpr1
195    ; GFX1150-NEXT: %4:sreg_32 = nofpexcept S_MIN_F16 [[COPY]], [[COPY1]], implicit $mode
196    ; GFX1150-NEXT: $sgpr0 = COPY %4
197    %0:sgpr(s32) = COPY $sgpr0
198    %1:sgpr(s16) = G_TRUNC %0(s32)
199    %2:sgpr(s32) = COPY $sgpr1
200    %3:sgpr(s16) = G_TRUNC %2(s32)
201    %4:sgpr(s16) = G_FMINNUM %1, %3
202    %5:sgpr(s32) = G_ANYEXT %4(s16)
203    $sgpr0 = COPY %5(s32)
204
205...
206---
207name:            fmax_f16
208legalized:       true
209regBankSelected: true
210body:             |
211  bb.0:
212    liveins: $sgpr0, $sgpr1
213
214    ; GFX1150-LABEL: name: fmax_f16
215    ; GFX1150: liveins: $sgpr0, $sgpr1
216    %0:sgpr(s32) = COPY $sgpr0
217    %1:sgpr(s16) = G_TRUNC %0(s32)
218    %2:sgpr(s32) = COPY $sgpr1
219    %3:sgpr(s16) = G_TRUNC %2(s32)
220    %4:sgpr(s16) = G_FMAXNUM %1, %3
221    %5:sgpr(s32) = G_ANYEXT %4(s16)
222
223...
224---
225name:            s_cvt_pkrtz_v2f16_f32
226legalized:       true
227regBankSelected: true
228body:             |
229  bb.0:
230    liveins: $sgpr0, $sgpr1
231
232    ; GFX1150-LABEL: name: s_cvt_pkrtz_v2f16_f32
233    ; GFX1150: liveins: $sgpr0, $sgpr1
234    ; GFX1150-NEXT: {{  $}}
235    ; GFX1150-NEXT: [[COPY:%[0-9]+]]:sreg_32 = COPY $sgpr0
236    ; GFX1150-NEXT: [[COPY1:%[0-9]+]]:sreg_32 = COPY $sgpr1
237    ; GFX1150-NEXT: %2:sreg_32 = nofpexcept S_CVT_PK_RTZ_F16_F32 [[COPY]], [[COPY1]], implicit $mode
238    ; GFX1150-NEXT: $sgpr0 = COPY %2
239    %0:sgpr(s32) = COPY $sgpr0
240    %1:sgpr(s32) = COPY $sgpr1
241    %2:sgpr(<2 x s16>) = G_INTRINSIC intrinsic(@llvm.amdgcn.cvt.pkrtz), %0(s32), %1(s32)
242    $sgpr0 = COPY %2(<2 x s16>)
243
244...
245---
246name:            fmac_f32
247legalized:       true
248regBankSelected: true
249body:             |
250  bb.0:
251    liveins: $sgpr0, $sgpr1, $sgpr2
252
253    ; GFX1150-LABEL: name: fmac_f32
254    ; GFX1150: liveins: $sgpr0, $sgpr1, $sgpr2
255    ; GFX1150-NEXT: {{  $}}
256    ; GFX1150-NEXT: [[COPY:%[0-9]+]]:sreg_32 = COPY $sgpr0
257    ; GFX1150-NEXT: [[COPY1:%[0-9]+]]:sreg_32 = COPY $sgpr1
258    ; GFX1150-NEXT: [[COPY2:%[0-9]+]]:sreg_32 = COPY $sgpr2
259    ; GFX1150-NEXT: %3:sreg_32 = nofpexcept S_FMAC_F32 [[COPY1]], [[COPY2]], [[COPY]], implicit $mode
260    ; GFX1150-NEXT: $sgpr0 = COPY %3
261    %0:sgpr(s32) = COPY $sgpr0
262    %1:sgpr(s32) = COPY $sgpr1
263    %2:sgpr(s32) = COPY $sgpr2
264    %3:sgpr(s32) = G_FMA %1, %2, %0
265    $sgpr0 = COPY %3(s32)
266
267...
268---
269name:            fmac_f16
270legalized:       true
271regBankSelected: true
272body:             |
273  bb.0:
274    liveins: $sgpr0, $sgpr1, $sgpr2
275
276    ; GFX1150-LABEL: name: fmac_f16
277    ; GFX1150: liveins: $sgpr0, $sgpr1, $sgpr2
278    ; GFX1150-NEXT: {{  $}}
279    ; GFX1150-NEXT: [[COPY:%[0-9]+]]:sreg_32 = COPY $sgpr0
280    ; GFX1150-NEXT: [[COPY1:%[0-9]+]]:sreg_32 = COPY $sgpr1
281    ; GFX1150-NEXT: [[COPY2:%[0-9]+]]:sreg_32 = COPY $sgpr2
282    ; GFX1150-NEXT: %6:sreg_32 = nofpexcept S_FMAC_F16 [[COPY1]], [[COPY2]], [[COPY]], implicit $mode
283    ; GFX1150-NEXT: $sgpr0 = COPY %6
284    %0:sgpr(s32) = COPY $sgpr0
285    %1:sgpr(s16) = G_TRUNC %0(s32)
286    %2:sgpr(s32) = COPY $sgpr1
287    %3:sgpr(s16) = G_TRUNC %2(s32)
288    %4:sgpr(s32) = COPY $sgpr2
289    %5:sgpr(s16) = G_TRUNC %4(s32)
290    %6:sgpr(s16) = G_FMA %3, %5, %1
291    %7:sgpr(s32) = G_ANYEXT %6(s16)
292    $sgpr0 = COPY %7(s32)
293
294...
295