1# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py 2# RUN: llc -mtriple=amdgcn -mcpu=gfx1150 -run-pass=instruction-select -verify-machineinstrs -o - %s | FileCheck -check-prefix=GFX1150 %s 3# RUN: llc -mtriple=amdgcn -mcpu=gfx1200 -run-pass=instruction-select -verify-machineinstrs -o - %s | FileCheck -check-prefix=GFX1150 %s 4 5--- 6name: sitofp_i32_to_f32 7legalized: true 8regBankSelected: true 9body: | 10 bb.0: 11 liveins: $sgpr0 12 13 ; GFX1150-LABEL: name: sitofp_i32_to_f32 14 ; GFX1150: liveins: $sgpr0 15 ; GFX1150-NEXT: {{ $}} 16 ; GFX1150-NEXT: [[COPY:%[0-9]+]]:sreg_32 = COPY $sgpr0 17 ; GFX1150-NEXT: [[S_CVT_F32_I32_:%[0-9]+]]:sreg_32 = S_CVT_F32_I32 [[COPY]], implicit $mode 18 ; GFX1150-NEXT: $sgpr0 = COPY [[S_CVT_F32_I32_]] 19 %0:sgpr(s32) = COPY $sgpr0 20 %1:sgpr(s32) = G_SITOFP %0(s32) 21 $sgpr0 = COPY %1(s32) 22 23... 24--- 25name: uitofp_u32_to_f32 26legalized: true 27regBankSelected: true 28body: | 29 bb.0: 30 liveins: $sgpr0 31 32 ; GFX1150-LABEL: name: uitofp_u32_to_f32 33 ; GFX1150: liveins: $sgpr0 34 ; GFX1150-NEXT: {{ $}} 35 ; GFX1150-NEXT: [[COPY:%[0-9]+]]:sreg_32 = COPY $sgpr0 36 ; GFX1150-NEXT: [[S_CVT_F32_U32_:%[0-9]+]]:sreg_32 = S_CVT_F32_U32 [[COPY]], implicit $mode 37 ; GFX1150-NEXT: $sgpr0 = COPY [[S_CVT_F32_U32_]] 38 %0:sgpr(s32) = COPY $sgpr0 39 %1:sgpr(s32) = G_UITOFP %0(s32) 40 $sgpr0 = COPY %1(s32) 41 42... 43--- 44name: fptosi_f32_to_i32 45legalized: true 46regBankSelected: true 47body: | 48 bb.0: 49 liveins: $sgpr0 50 51 ; GFX1150-LABEL: name: fptosi_f32_to_i32 52 ; GFX1150: liveins: $sgpr0 53 ; GFX1150-NEXT: {{ $}} 54 ; GFX1150-NEXT: [[COPY:%[0-9]+]]:sreg_32 = COPY $sgpr0 55 ; GFX1150-NEXT: %1:sreg_32 = nofpexcept S_CVT_I32_F32 [[COPY]], implicit $mode 56 ; GFX1150-NEXT: $sgpr0 = COPY %1 57 %0:sgpr(s32) = COPY $sgpr0 58 %1:sgpr(s32) = G_FPTOSI %0(s32) 59 $sgpr0 = COPY %1(s32) 60 61... 62--- 63name: fptoui_f32_to_u32 64legalized: true 65regBankSelected: true 66body: | 67 bb.0: 68 liveins: $sgpr0 69 70 ; GFX1150-LABEL: name: fptoui_f32_to_u32 71 ; GFX1150: liveins: $sgpr0 72 ; GFX1150-NEXT: {{ $}} 73 ; GFX1150-NEXT: [[COPY:%[0-9]+]]:sreg_32 = COPY $sgpr0 74 ; GFX1150-NEXT: %1:sreg_32 = nofpexcept S_CVT_U32_F32 [[COPY]], implicit $mode 75 ; GFX1150-NEXT: $sgpr0 = COPY %1 76 %0:sgpr(s32) = COPY $sgpr0 77 %1:sgpr(s32) = G_FPTOUI %0(s32) 78 $sgpr0 = COPY %1(s32) 79 80... 81--- 82name: fpext_f16_to_f32 83legalized: true 84regBankSelected: true 85body: | 86 bb.0: 87 liveins: $sgpr0 88 89 ; GFX1150-LABEL: name: fpext_f16_to_f32 90 ; GFX1150: liveins: $sgpr0 91 ; GFX1150-NEXT: {{ $}} 92 ; GFX1150-NEXT: [[COPY:%[0-9]+]]:sreg_32 = COPY $sgpr0 93 ; GFX1150-NEXT: %2:sreg_32 = nofpexcept S_CVT_F32_F16 [[COPY]], implicit $mode 94 ; GFX1150-NEXT: $sgpr0 = COPY %2 95 %0:sgpr(s32) = COPY $sgpr0 96 %1:sgpr(s16) = G_TRUNC %0(s32) 97 %2:sgpr(s32) = G_FPEXT %1(s16) 98 $sgpr0 = COPY %2(s32) 99 100... 101--- 102name: fpext_hif16_to_32 103legalized: true 104regBankSelected: true 105body: | 106 bb.0: 107 liveins: $sgpr0 108 109 ; GFX1150-LABEL: name: fpext_hif16_to_32 110 ; GFX1150: liveins: $sgpr0 111 ; GFX1150-NEXT: {{ $}} 112 ; GFX1150-NEXT: [[COPY:%[0-9]+]]:sreg_32 = COPY $sgpr0 113 ; GFX1150-NEXT: [[S_CVT_HI_F32_F16_:%[0-9]+]]:sreg_32 = S_CVT_HI_F32_F16 [[COPY]], implicit $mode 114 ; GFX1150-NEXT: $sgpr0 = COPY [[S_CVT_HI_F32_F16_]] 115 %0:sgpr(<2 x s16>) = COPY $sgpr0 116 %2:sgpr(s32) = G_BITCAST %0(<2 x s16>) 117 %3:sgpr(s32) = G_CONSTANT i32 16 118 %4:sgpr(s32) = G_LSHR %2, %3(s32) 119 %5:sgpr(s16) = G_TRUNC %4(s32) 120 %6:sgpr(s32) = G_FPEXT %5(s16) 121 $sgpr0 = COPY %6(s32) 122 123... 124--- 125name: fptrunc_f32_to_f16 126legalized: true 127regBankSelected: true 128body: | 129 bb.0: 130 liveins: $sgpr0 131 132 ; GFX1150-LABEL: name: fptrunc_f32_to_f16 133 ; GFX1150: liveins: $sgpr0 134 ; GFX1150-NEXT: {{ $}} 135 ; GFX1150-NEXT: [[COPY:%[0-9]+]]:sreg_32 = COPY $sgpr0 136 ; GFX1150-NEXT: %1:sreg_32 = nofpexcept S_CVT_F16_F32 [[COPY]], implicit $mode 137 ; GFX1150-NEXT: $sgpr0 = COPY %1 138 %0:sgpr(s32) = COPY $sgpr0 139 %1:sgpr(s16) = G_FPTRUNC %0(s32) 140 %2:sgpr(s32) = G_ANYEXT %1(s16) 141 $sgpr0 = COPY %2(s32) 142 143... 144--- 145name: fceil_f32 146legalized: true 147regBankSelected: true 148body: | 149 bb.0: 150 liveins: $sgpr0 151 152 ; GFX1150-LABEL: name: fceil_f32 153 ; GFX1150: liveins: $sgpr0 154 ; GFX1150-NEXT: {{ $}} 155 ; GFX1150-NEXT: [[COPY:%[0-9]+]]:sreg_32 = COPY $sgpr0 156 ; GFX1150-NEXT: %1:sreg_32 = nofpexcept S_CEIL_F32 [[COPY]], implicit $mode 157 ; GFX1150-NEXT: $sgpr0 = COPY %1 158 %0:sgpr(s32) = COPY $sgpr0 159 %1:sgpr(s32) = G_FCEIL %0 160 $sgpr0 = COPY %1(s32) 161 162... 163--- 164name: ffloor_f32 165legalized: true 166regBankSelected: true 167body: | 168 bb.0: 169 liveins: $sgpr0 170 171 ; GFX1150-LABEL: name: ffloor_f32 172 ; GFX1150: liveins: $sgpr0 173 ; GFX1150-NEXT: {{ $}} 174 ; GFX1150-NEXT: [[COPY:%[0-9]+]]:sreg_32 = COPY $sgpr0 175 ; GFX1150-NEXT: %1:sreg_32 = nofpexcept S_FLOOR_F32 [[COPY]], implicit $mode 176 ; GFX1150-NEXT: $sgpr0 = COPY %1 177 %0:sgpr(s32) = COPY $sgpr0 178 %1:sgpr(s32) = G_FFLOOR %0 179 $sgpr0 = COPY %1(s32) 180 181... 182--- 183name: ftrunc_f32 184legalized: true 185regBankSelected: true 186body: | 187 bb.0: 188 liveins: $sgpr0 189 190 ; GFX1150-LABEL: name: ftrunc_f32 191 ; GFX1150: liveins: $sgpr0 192 ; GFX1150-NEXT: {{ $}} 193 ; GFX1150-NEXT: [[COPY:%[0-9]+]]:sreg_32 = COPY $sgpr0 194 ; GFX1150-NEXT: %1:sreg_32 = nofpexcept S_TRUNC_F32 [[COPY]], implicit $mode 195 ; GFX1150-NEXT: $sgpr0 = COPY %1 196 %0:sgpr(s32) = COPY $sgpr0 197 %1:sgpr(s32) = G_INTRINSIC_TRUNC %0 198 $sgpr0 = COPY %1(s32) 199 200... 201--- 202name: frint_f32 203legalized: true 204regBankSelected: true 205body: | 206 bb.0: 207 liveins: $sgpr0 208 209 ; GFX1150-LABEL: name: frint_f32 210 ; GFX1150: liveins: $sgpr0 211 ; GFX1150-NEXT: {{ $}} 212 ; GFX1150-NEXT: [[COPY:%[0-9]+]]:sreg_32 = COPY $sgpr0 213 ; GFX1150-NEXT: %1:sreg_32 = nofpexcept S_RNDNE_F32 [[COPY]], implicit $mode 214 ; GFX1150-NEXT: $sgpr0 = COPY %1 215 %0:sgpr(s32) = COPY $sgpr0 216 %1:sgpr(s32) = G_INTRINSIC_ROUNDEVEN %0 217 $sgpr0 = COPY %1(s32) 218 219... 220--- 221name: fceil_f16 222legalized: true 223regBankSelected: true 224body: | 225 bb.0: 226 liveins: $sgpr0 227 228 ; GFX1150-LABEL: name: fceil_f16 229 ; GFX1150: liveins: $sgpr0 230 ; GFX1150-NEXT: {{ $}} 231 ; GFX1150-NEXT: [[COPY:%[0-9]+]]:sreg_32 = COPY $sgpr0 232 ; GFX1150-NEXT: %2:sreg_32 = nofpexcept S_CEIL_F16 [[COPY]], implicit $mode 233 ; GFX1150-NEXT: $sgpr0 = COPY %2 234 %0:sgpr(s32) = COPY $sgpr0 235 %1:sgpr(s16) = G_TRUNC %0(s32) 236 %2:sgpr(s16) = G_FCEIL %1 237 %3:sgpr(s32) = G_ANYEXT %2(s16) 238 $sgpr0 = COPY %3(s32) 239 240... 241--- 242name: ffloor_f16 243legalized: true 244regBankSelected: true 245body: | 246 bb.0: 247 liveins: $sgpr0 248 249 ; GFX1150-LABEL: name: ffloor_f16 250 ; GFX1150: liveins: $sgpr0 251 ; GFX1150-NEXT: {{ $}} 252 ; GFX1150-NEXT: [[COPY:%[0-9]+]]:sreg_32 = COPY $sgpr0 253 ; GFX1150-NEXT: %2:sreg_32 = nofpexcept S_FLOOR_F16 [[COPY]], implicit $mode 254 ; GFX1150-NEXT: $sgpr0 = COPY %2 255 %0:sgpr(s32) = COPY $sgpr0 256 %1:sgpr(s16) = G_TRUNC %0(s32) 257 %2:sgpr(s16) = G_FFLOOR %1 258 %3:sgpr(s32) = G_ANYEXT %2(s16) 259 $sgpr0 = COPY %3(s32) 260 261... 262--- 263name: ftrunc_f16 264legalized: true 265regBankSelected: true 266body: | 267 bb.0: 268 liveins: $sgpr0 269 270 ; GFX1150-LABEL: name: ftrunc_f16 271 ; GFX1150: liveins: $sgpr0 272 ; GFX1150-NEXT: {{ $}} 273 ; GFX1150-NEXT: [[COPY:%[0-9]+]]:sreg_32 = COPY $sgpr0 274 ; GFX1150-NEXT: %2:sreg_32 = nofpexcept S_TRUNC_F16 [[COPY]], implicit $mode 275 ; GFX1150-NEXT: $sgpr0 = COPY %2 276 %0:sgpr(s32) = COPY $sgpr0 277 %1:sgpr(s16) = G_TRUNC %0(s32) 278 %2:sgpr(s16) = G_INTRINSIC_TRUNC %1 279 %3:sgpr(s32) = G_ANYEXT %2(s16) 280 $sgpr0 = COPY %3(s32) 281 282... 283--- 284name: frint_f16 285legalized: true 286regBankSelected: true 287body: | 288 bb.0: 289 liveins: $sgpr0 290 291 ; GFX1150-LABEL: name: frint_f16 292 ; GFX1150: liveins: $sgpr0 293 ; GFX1150-NEXT: {{ $}} 294 ; GFX1150-NEXT: [[COPY:%[0-9]+]]:sreg_32 = COPY $sgpr0 295 ; GFX1150-NEXT: %2:sreg_32 = nofpexcept S_RNDNE_F16 [[COPY]], implicit $mode 296 ; GFX1150-NEXT: $sgpr0 = COPY %2 297 %0:sgpr(s32) = COPY $sgpr0 298 %1:sgpr(s16) = G_TRUNC %0(s32) 299 %2:sgpr(s16) = G_INTRINSIC_ROUNDEVEN %1 300 %3:sgpr(s32) = G_ANYEXT %2(s16) 301 $sgpr0 = COPY %3(s32) 302 303... 304