1# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py 2# RUN: llc -mtriple=amdgcn -mcpu=tahiti -run-pass=instruction-select -verify-machineinstrs -o - %s | FileCheck -check-prefix=GCN %s 3# RUN: llc -mtriple=amdgcn -mcpu=fiji -run-pass=instruction-select -verify-machineinstrs -o - %s | FileCheck -check-prefix=GCN %s 4# RUN: llc -mtriple=amdgcn -mcpu=gfx900 -run-pass=instruction-select -verify-machineinstrs -o - %s | FileCheck -check-prefix=GCN %s 5# RUN: llc -mtriple=amdgcn -mcpu=gfx1010 -run-pass=instruction-select -verify-machineinstrs -o - %s | FileCheck -check-prefix=GCN %s 6# RUN: llc -mtriple=amdgcn -mcpu=gfx1100 -run-pass=instruction-select -verify-machineinstrs -o - %s | FileCheck -check-prefix=GCN %s 7 8--- 9 10name: fshr_s32 11legalized: true 12regBankSelected: true 13 14body: | 15 bb.0: 16 liveins: $vgpr0, $vgpr1, $vgpr2 17 18 ; GCN-LABEL: name: fshr_s32 19 ; GCN: liveins: $vgpr0, $vgpr1, $vgpr2 20 ; GCN-NEXT: {{ $}} 21 ; GCN-NEXT: [[COPY:%[0-9]+]]:vgpr_32 = COPY $vgpr0 22 ; GCN-NEXT: [[COPY1:%[0-9]+]]:vgpr_32 = COPY $vgpr1 23 ; GCN-NEXT: [[COPY2:%[0-9]+]]:vgpr_32 = COPY $vgpr2 24 ; GCN-NEXT: [[V_ALIGNBIT_B32_e64_:%[0-9]+]]:vgpr_32 = V_ALIGNBIT_B32_e64 [[COPY]], [[COPY1]], [[COPY2]], implicit $exec 25 ; GCN-NEXT: S_ENDPGM 0, implicit [[V_ALIGNBIT_B32_e64_]] 26 %0:vgpr(s32) = COPY $vgpr0 27 %1:vgpr(s32) = COPY $vgpr1 28 %2:vgpr(s32) = COPY $vgpr2 29 %3:vgpr(s32) = G_FSHR %0, %1, %2 30 S_ENDPGM 0, implicit %3 31 32... 33