xref: /llvm-project/llvm/test/CodeGen/AMDGPU/GlobalISel/fmamix-constant-bus-violation.ll (revision 6548b6354d1d990e1c98736f5e7c3de876bedc8e) 
1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 5
2; RUN: llc -global-isel -mtriple=amdgcn -mcpu=gfx908 %s -o - | FileCheck %s
3
4define float @test_fmamix_constant_bus_violation_sss(i32 inreg %val.0, i32 inreg %val.1, i32 inreg %val.2) #0 {
5; CHECK-LABEL: test_fmamix_constant_bus_violation_sss:
6; CHECK:       ; %bb.0:
7; CHECK-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
8; CHECK-NEXT:    s_lshr_b32 s5, s17, 16
9; CHECK-NEXT:    s_lshr_b32 s6, s18, 16
10; CHECK-NEXT:    s_lshr_b32 s4, s16, 16
11; CHECK-NEXT:    v_mov_b32_e32 v0, s5
12; CHECK-NEXT:    v_mov_b32_e32 v1, s6
13; CHECK-NEXT:    v_fma_mix_f32 v0, s4, v0, v1 op_sel_hi:[1,1,1]
14; CHECK-NEXT:    s_setpc_b64 s[30:31]
15  %lshr.0 = lshr i32 %val.0, 16
16  %lshr.1 = lshr i32 %val.1, 16
17  %lshr.2 = lshr i32 %val.2, 16
18  %trunc.0 = trunc i32 %lshr.0 to i16
19  %trunc.1 = trunc i32 %lshr.1 to i16
20  %trunc.2 = trunc i32 %lshr.2 to i16
21  %cast.0 = bitcast i16 %trunc.0 to half
22  %cast.1 = bitcast i16 %trunc.1 to half
23  %cast.2 = bitcast i16 %trunc.2 to half
24  %fpext.0 = fpext half %cast.0 to float
25  %fpext.1 = fpext half %cast.1 to float
26  %fpext.2 = fpext half %cast.2 to float
27  %fma = call float @llvm.fma.f32(float %fpext.0, float %fpext.1, float %fpext.2)
28  ret float %fma
29}
30
31define float @test_fmamix_constant_bus_violation_ssv(i32 inreg %val.0, i32 inreg %val.1, i32 %val.2) #0 {
32; CHECK-LABEL: test_fmamix_constant_bus_violation_ssv:
33; CHECK:       ; %bb.0:
34; CHECK-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
35; CHECK-NEXT:    s_lshr_b32 s5, s17, 16
36; CHECK-NEXT:    s_lshr_b32 s4, s16, 16
37; CHECK-NEXT:    v_mov_b32_e32 v1, s5
38; CHECK-NEXT:    v_fma_mix_f32 v0, s4, v1, v0 op_sel:[0,0,1] op_sel_hi:[1,1,1]
39; CHECK-NEXT:    s_setpc_b64 s[30:31]
40  %lshr.0 = lshr i32 %val.0, 16
41  %lshr.1 = lshr i32 %val.1, 16
42  %lshr.2 = lshr i32 %val.2, 16
43  %trunc.0 = trunc i32 %lshr.0 to i16
44  %trunc.1 = trunc i32 %lshr.1 to i16
45  %trunc.2 = trunc i32 %lshr.2 to i16
46  %cast.0 = bitcast i16 %trunc.0 to half
47  %cast.1 = bitcast i16 %trunc.1 to half
48  %cast.2 = bitcast i16 %trunc.2 to half
49  %fpext.0 = fpext half %cast.0 to float
50  %fpext.1 = fpext half %cast.1 to float
51  %fpext.2 = fpext half %cast.2 to float
52  %fma = call float @llvm.fma.f32(float %fpext.0, float %fpext.1, float %fpext.2)
53  ret float %fma
54}
55
56define float @test_fmamix_constant_bus_violation_svs(i32 inreg %val.0, i32 %val.1, i32 inreg %val.2) #0 {
57; CHECK-LABEL: test_fmamix_constant_bus_violation_svs:
58; CHECK:       ; %bb.0:
59; CHECK-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
60; CHECK-NEXT:    s_lshr_b32 s5, s17, 16
61; CHECK-NEXT:    s_lshr_b32 s4, s16, 16
62; CHECK-NEXT:    v_mov_b32_e32 v1, s5
63; CHECK-NEXT:    v_fma_mix_f32 v0, s4, v0, v1 op_sel:[0,1,0] op_sel_hi:[1,1,1]
64; CHECK-NEXT:    s_setpc_b64 s[30:31]
65  %lshr.0 = lshr i32 %val.0, 16
66  %lshr.1 = lshr i32 %val.1, 16
67  %lshr.2 = lshr i32 %val.2, 16
68  %trunc.0 = trunc i32 %lshr.0 to i16
69  %trunc.1 = trunc i32 %lshr.1 to i16
70  %trunc.2 = trunc i32 %lshr.2 to i16
71  %cast.0 = bitcast i16 %trunc.0 to half
72  %cast.1 = bitcast i16 %trunc.1 to half
73  %cast.2 = bitcast i16 %trunc.2 to half
74  %fpext.0 = fpext half %cast.0 to float
75  %fpext.1 = fpext half %cast.1 to float
76  %fpext.2 = fpext half %cast.2 to float
77  %fma = call float @llvm.fma.f32(float %fpext.0, float %fpext.1, float %fpext.2)
78  ret float %fma
79}
80
81define float @test_fmamix_constant_bus_violation_vss(i32 %val.0, i32 inreg %val.1, i32 inreg %val.2) #0 {
82; CHECK-LABEL: test_fmamix_constant_bus_violation_vss:
83; CHECK:       ; %bb.0:
84; CHECK-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
85; CHECK-NEXT:    s_lshr_b32 s5, s17, 16
86; CHECK-NEXT:    s_lshr_b32 s4, s16, 16
87; CHECK-NEXT:    v_mov_b32_e32 v1, s5
88; CHECK-NEXT:    v_fma_mix_f32 v0, v0, s4, v1 op_sel:[1,0,0] op_sel_hi:[1,1,1]
89; CHECK-NEXT:    s_setpc_b64 s[30:31]
90  %lshr.0 = lshr i32 %val.0, 16
91  %lshr.1 = lshr i32 %val.1, 16
92  %lshr.2 = lshr i32 %val.2, 16
93  %trunc.0 = trunc i32 %lshr.0 to i16
94  %trunc.1 = trunc i32 %lshr.1 to i16
95  %trunc.2 = trunc i32 %lshr.2 to i16
96  %cast.0 = bitcast i16 %trunc.0 to half
97  %cast.1 = bitcast i16 %trunc.1 to half
98  %cast.2 = bitcast i16 %trunc.2 to half
99  %fpext.0 = fpext half %cast.0 to float
100  %fpext.1 = fpext half %cast.1 to float
101  %fpext.2 = fpext half %cast.2 to float
102  %fma = call float @llvm.fma.f32(float %fpext.0, float %fpext.1, float %fpext.2)
103  ret float %fma
104}
105
106attributes #0 = { "denormal-fp-math-f32"="preserve-sign" }
107