1# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py 2# RUN: llc -mtriple=amdgcn-amd-amdhsa -run-pass=amdgpu-postlegalizer-combiner -verify-machineinstrs %s -o - | FileCheck %s 3 4--- 5name: uitofp_char_to_f32 6tracksRegLiveness: true 7body: | 8 bb.0: 9 liveins: $vgpr0 10 11 ; CHECK-LABEL: name: uitofp_char_to_f32 12 ; CHECK: liveins: $vgpr0 13 ; CHECK-NEXT: {{ $}} 14 ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(s32) = COPY $vgpr0 15 ; CHECK-NEXT: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 255 16 ; CHECK-NEXT: [[AND:%[0-9]+]]:_(s32) = G_AND [[COPY]], [[C]] 17 ; CHECK-NEXT: [[AMDGPU_CVT_F32_UBYTE0_:%[0-9]+]]:_(s32) = G_AMDGPU_CVT_F32_UBYTE0 [[AND]] 18 ; CHECK-NEXT: $vgpr0 = COPY [[AMDGPU_CVT_F32_UBYTE0_]](s32) 19 %0:_(s32) = COPY $vgpr0 20 %1:_(s32) = G_CONSTANT i32 255 21 %2:_(s32) = G_AND %0, %1 22 %3:_(s32) = G_UITOFP %2 23 $vgpr0 = COPY %3 24... 25 26--- 27name: uitofp_too_many_bits_to_f32 28tracksRegLiveness: true 29body: | 30 bb.0: 31 liveins: $vgpr0 32 33 ; CHECK-LABEL: name: uitofp_too_many_bits_to_f32 34 ; CHECK: liveins: $vgpr0 35 ; CHECK-NEXT: {{ $}} 36 ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(s32) = COPY $vgpr0 37 ; CHECK-NEXT: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 256 38 ; CHECK-NEXT: [[AND:%[0-9]+]]:_(s32) = G_AND [[COPY]], [[C]] 39 ; CHECK-NEXT: [[UITOFP:%[0-9]+]]:_(s32) = G_UITOFP [[AND]](s32) 40 ; CHECK-NEXT: $vgpr0 = COPY [[UITOFP]](s32) 41 %0:_(s32) = COPY $vgpr0 42 %1:_(s32) = G_CONSTANT i32 256 43 %2:_(s32) = G_AND %0, %1 44 %3:_(s32) = G_UITOFP %2 45 $vgpr0 = COPY %3 46... 47 48--- 49name: sitofp_char_to_f32 50tracksRegLiveness: true 51body: | 52 bb.0: 53 liveins: $vgpr0 54 55 ; CHECK-LABEL: name: sitofp_char_to_f32 56 ; CHECK: liveins: $vgpr0 57 ; CHECK-NEXT: {{ $}} 58 ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(s32) = COPY $vgpr0 59 ; CHECK-NEXT: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 255 60 ; CHECK-NEXT: [[AND:%[0-9]+]]:_(s32) = G_AND [[COPY]], [[C]] 61 ; CHECK-NEXT: [[AMDGPU_CVT_F32_UBYTE0_:%[0-9]+]]:_(s32) = G_AMDGPU_CVT_F32_UBYTE0 [[AND]] 62 ; CHECK-NEXT: $vgpr0 = COPY [[AMDGPU_CVT_F32_UBYTE0_]](s32) 63 %0:_(s32) = COPY $vgpr0 64 %1:_(s32) = G_CONSTANT i32 255 65 %2:_(s32) = G_AND %0, %1 66 %3:_(s32) = G_SITOFP %2 67 $vgpr0 = COPY %3 68... 69 70--- 71name: sitofp_bits127_to_f32 72tracksRegLiveness: true 73body: | 74 bb.0: 75 liveins: $vgpr0 76 77 ; CHECK-LABEL: name: sitofp_bits127_to_f32 78 ; CHECK: liveins: $vgpr0 79 ; CHECK-NEXT: {{ $}} 80 ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(s32) = COPY $vgpr0 81 ; CHECK-NEXT: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 127 82 ; CHECK-NEXT: [[AND:%[0-9]+]]:_(s32) = G_AND [[COPY]], [[C]] 83 ; CHECK-NEXT: [[AMDGPU_CVT_F32_UBYTE0_:%[0-9]+]]:_(s32) = G_AMDGPU_CVT_F32_UBYTE0 [[AND]] 84 ; CHECK-NEXT: $vgpr0 = COPY [[AMDGPU_CVT_F32_UBYTE0_]](s32) 85 %0:_(s32) = COPY $vgpr0 86 %1:_(s32) = G_CONSTANT i32 127 87 %2:_(s32) = G_AND %0, %1 88 %3:_(s32) = G_SITOFP %2 89 $vgpr0 = COPY %3 90... 91 92--- 93name: sitofp_bits128_to_f32 94tracksRegLiveness: true 95body: | 96 bb.0: 97 liveins: $vgpr0 98 99 ; CHECK-LABEL: name: sitofp_bits128_to_f32 100 ; CHECK: liveins: $vgpr0 101 ; CHECK-NEXT: {{ $}} 102 ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(s32) = COPY $vgpr0 103 ; CHECK-NEXT: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 128 104 ; CHECK-NEXT: [[AND:%[0-9]+]]:_(s32) = G_AND [[COPY]], [[C]] 105 ; CHECK-NEXT: [[AMDGPU_CVT_F32_UBYTE0_:%[0-9]+]]:_(s32) = G_AMDGPU_CVT_F32_UBYTE0 [[AND]] 106 ; CHECK-NEXT: $vgpr0 = COPY [[AMDGPU_CVT_F32_UBYTE0_]](s32) 107 %0:_(s32) = COPY $vgpr0 108 %1:_(s32) = G_CONSTANT i32 128 109 %2:_(s32) = G_AND %0, %1 110 %3:_(s32) = G_SITOFP %2 111 $vgpr0 = COPY %3 112... 113--- 114name: sitofp_too_many_bits_to_f32 115tracksRegLiveness: true 116body: | 117 bb.0: 118 liveins: $vgpr0 119 120 ; CHECK-LABEL: name: sitofp_too_many_bits_to_f32 121 ; CHECK: liveins: $vgpr0 122 ; CHECK-NEXT: {{ $}} 123 ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(s32) = COPY $vgpr0 124 ; CHECK-NEXT: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 256 125 ; CHECK-NEXT: [[AND:%[0-9]+]]:_(s32) = G_AND [[COPY]], [[C]] 126 ; CHECK-NEXT: [[SITOFP:%[0-9]+]]:_(s32) = G_SITOFP [[AND]](s32) 127 ; CHECK-NEXT: $vgpr0 = COPY [[SITOFP]](s32) 128 %0:_(s32) = COPY $vgpr0 129 %1:_(s32) = G_CONSTANT i32 256 130 %2:_(s32) = G_AND %0, %1 131 %3:_(s32) = G_SITOFP %2 132 $vgpr0 = COPY %3 133... 134 135--- 136name: uitofp_char_to_f16 137tracksRegLiveness: true 138body: | 139 bb.0: 140 liveins: $vgpr0 141 142 ; CHECK-LABEL: name: uitofp_char_to_f16 143 ; CHECK: liveins: $vgpr0 144 ; CHECK-NEXT: {{ $}} 145 ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(s32) = COPY $vgpr0 146 ; CHECK-NEXT: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 255 147 ; CHECK-NEXT: [[AND:%[0-9]+]]:_(s32) = G_AND [[COPY]], [[C]] 148 ; CHECK-NEXT: [[AMDGPU_CVT_F32_UBYTE0_:%[0-9]+]]:_(s32) = G_AMDGPU_CVT_F32_UBYTE0 [[AND]] 149 ; CHECK-NEXT: [[FPTRUNC:%[0-9]+]]:_(s16) = G_FPTRUNC [[AMDGPU_CVT_F32_UBYTE0_]](s32) 150 ; CHECK-NEXT: [[ANYEXT:%[0-9]+]]:_(s32) = G_ANYEXT [[FPTRUNC]](s16) 151 ; CHECK-NEXT: $vgpr0 = COPY [[ANYEXT]](s32) 152 %0:_(s32) = COPY $vgpr0 153 %1:_(s32) = G_CONSTANT i32 255 154 %2:_(s32) = G_AND %0, %1 155 %3:_(s16) = G_UITOFP %2 156 %4:_(s32) = G_ANYEXT %3 157 $vgpr0 = COPY %4 158... 159 160--- 161name: sitofp_char_to_f16 162tracksRegLiveness: true 163body: | 164 bb.0: 165 liveins: $vgpr0 166 167 ; CHECK-LABEL: name: sitofp_char_to_f16 168 ; CHECK: liveins: $vgpr0 169 ; CHECK-NEXT: {{ $}} 170 ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(s32) = COPY $vgpr0 171 ; CHECK-NEXT: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 255 172 ; CHECK-NEXT: [[AND:%[0-9]+]]:_(s32) = G_AND [[COPY]], [[C]] 173 ; CHECK-NEXT: [[AMDGPU_CVT_F32_UBYTE0_:%[0-9]+]]:_(s32) = G_AMDGPU_CVT_F32_UBYTE0 [[AND]] 174 ; CHECK-NEXT: [[FPTRUNC:%[0-9]+]]:_(s16) = G_FPTRUNC [[AMDGPU_CVT_F32_UBYTE0_]](s32) 175 ; CHECK-NEXT: [[ANYEXT:%[0-9]+]]:_(s32) = G_ANYEXT [[FPTRUNC]](s16) 176 ; CHECK-NEXT: $vgpr0 = COPY [[ANYEXT]](s32) 177 %0:_(s32) = COPY $vgpr0 178 %1:_(s32) = G_CONSTANT i32 255 179 %2:_(s32) = G_AND %0, %1 180 %3:_(s16) = G_SITOFP %2 181 %4:_(s32) = G_ANYEXT %3 182 $vgpr0 = COPY %4 183... 184 185--- 186name: uitofp_s64_char_to_f32 187tracksRegLiveness: true 188body: | 189 bb.0: 190 liveins: $vgpr0_vgpr1 191 192 ; CHECK-LABEL: name: uitofp_s64_char_to_f32 193 ; CHECK: liveins: $vgpr0_vgpr1 194 ; CHECK-NEXT: {{ $}} 195 ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(s64) = COPY $vgpr0_vgpr1 196 ; CHECK-NEXT: [[TRUNC:%[0-9]+]]:_(s32) = G_TRUNC [[COPY]](s64) 197 ; CHECK-NEXT: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 255 198 ; CHECK-NEXT: [[AND:%[0-9]+]]:_(s32) = G_AND [[TRUNC]], [[C]] 199 ; CHECK-NEXT: [[AMDGPU_CVT_F32_UBYTE0_:%[0-9]+]]:_(s32) = G_AMDGPU_CVT_F32_UBYTE0 [[AND]] 200 ; CHECK-NEXT: $vgpr0 = COPY [[AMDGPU_CVT_F32_UBYTE0_]](s32) 201 %0:_(s64) = COPY $vgpr0_vgpr1 202 %1:_(s64) = G_CONSTANT i64 255 203 %2:_(s64) = G_AND %0, %1 204 %3:_(s32) = G_UITOFP %2 205 $vgpr0 = COPY %3 206... 207 208--- 209name: sitofp_s64_char_to_f32 210tracksRegLiveness: true 211body: | 212 bb.0: 213 liveins: $vgpr0_vgpr1 214 215 ; CHECK-LABEL: name: sitofp_s64_char_to_f32 216 ; CHECK: liveins: $vgpr0_vgpr1 217 ; CHECK-NEXT: {{ $}} 218 ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(s64) = COPY $vgpr0_vgpr1 219 ; CHECK-NEXT: [[TRUNC:%[0-9]+]]:_(s32) = G_TRUNC [[COPY]](s64) 220 ; CHECK-NEXT: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 255 221 ; CHECK-NEXT: [[AND:%[0-9]+]]:_(s32) = G_AND [[TRUNC]], [[C]] 222 ; CHECK-NEXT: [[AMDGPU_CVT_F32_UBYTE0_:%[0-9]+]]:_(s32) = G_AMDGPU_CVT_F32_UBYTE0 [[AND]] 223 ; CHECK-NEXT: $vgpr0 = COPY [[AMDGPU_CVT_F32_UBYTE0_]](s32) 224 %0:_(s64) = COPY $vgpr0_vgpr1 225 %1:_(s64) = G_CONSTANT i64 255 226 %2:_(s64) = G_AND %0, %1 227 %3:_(s32) = G_SITOFP %2 228 $vgpr0 = COPY %3 229... 230 231--- 232name: uitofp_s16_char_to_f32 233tracksRegLiveness: true 234body: | 235 bb.0: 236 liveins: $vgpr0 237 238 ; CHECK-LABEL: name: uitofp_s16_char_to_f32 239 ; CHECK: liveins: $vgpr0 240 ; CHECK-NEXT: {{ $}} 241 ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(s32) = COPY $vgpr0 242 ; CHECK-NEXT: [[TRUNC:%[0-9]+]]:_(s16) = G_TRUNC [[COPY]](s32) 243 ; CHECK-NEXT: [[C:%[0-9]+]]:_(s16) = G_CONSTANT i16 255 244 ; CHECK-NEXT: [[AND:%[0-9]+]]:_(s16) = G_AND [[TRUNC]], [[C]] 245 ; CHECK-NEXT: [[ANYEXT:%[0-9]+]]:_(s32) = G_ANYEXT [[AND]](s16) 246 ; CHECK-NEXT: [[AMDGPU_CVT_F32_UBYTE0_:%[0-9]+]]:_(s32) = G_AMDGPU_CVT_F32_UBYTE0 [[ANYEXT]] 247 ; CHECK-NEXT: $vgpr0 = COPY [[AMDGPU_CVT_F32_UBYTE0_]](s32) 248 %0:_(s32) = COPY $vgpr0 249 %1:_(s16) = G_TRUNC %0 250 %2:_(s16) = G_CONSTANT i16 255 251 %3:_(s16) = G_AND %1, %2 252 %4:_(s32) = G_UITOFP %3 253 $vgpr0 = COPY %4 254... 255 256--- 257name: sitofp_s16_char_to_f32 258tracksRegLiveness: true 259body: | 260 bb.0: 261 liveins: $vgpr0 262 263 ; CHECK-LABEL: name: sitofp_s16_char_to_f32 264 ; CHECK: liveins: $vgpr0 265 ; CHECK-NEXT: {{ $}} 266 ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(s32) = COPY $vgpr0 267 ; CHECK-NEXT: [[TRUNC:%[0-9]+]]:_(s16) = G_TRUNC [[COPY]](s32) 268 ; CHECK-NEXT: [[C:%[0-9]+]]:_(s16) = G_CONSTANT i16 255 269 ; CHECK-NEXT: [[AND:%[0-9]+]]:_(s16) = G_AND [[TRUNC]], [[C]] 270 ; CHECK-NEXT: [[ANYEXT:%[0-9]+]]:_(s32) = G_ANYEXT [[AND]](s16) 271 ; CHECK-NEXT: [[AMDGPU_CVT_F32_UBYTE0_:%[0-9]+]]:_(s32) = G_AMDGPU_CVT_F32_UBYTE0 [[ANYEXT]] 272 ; CHECK-NEXT: $vgpr0 = COPY [[AMDGPU_CVT_F32_UBYTE0_]](s32) 273 %0:_(s32) = COPY $vgpr0 274 %1:_(s16) = G_TRUNC %0 275 %2:_(s16) = G_CONSTANT i16 255 276 %3:_(s16) = G_AND %1, %2 277 %4:_(s32) = G_SITOFP %3 278 $vgpr0 = COPY %4 279... 280