1# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py 2# RUN: llc -mtriple=amdgcn -run-pass=amdgpu-prelegalizer-combiner -verify-machineinstrs %s -o - | FileCheck %s 3 4--- 5name: fshl_i32 6tracksRegLiveness: true 7body: | 8 bb.0: 9 liveins: $vgpr0, $vgpr1, $vgpr2, $vgpr3 10 11 ; CHECK-LABEL: name: fshl_i32 12 ; CHECK: liveins: $vgpr0, $vgpr1, $vgpr2, $vgpr3 13 ; CHECK-NEXT: {{ $}} 14 ; CHECK-NEXT: %a:_(s32) = COPY $vgpr0 15 ; CHECK-NEXT: %b:_(s32) = COPY $vgpr1 16 ; CHECK-NEXT: %amt:_(s32) = COPY $vgpr2 17 ; CHECK-NEXT: %or:_(s32) = G_FSHL %a, %b, %amt(s32) 18 ; CHECK-NEXT: $vgpr3 = COPY %or(s32) 19 %a:_(s32) = COPY $vgpr0 20 %b:_(s32) = COPY $vgpr1 21 %amt:_(s32) = COPY $vgpr2 22 %bw:_(s32) = G_CONSTANT i32 32 23 %shl:_(s32) = G_SHL %a, %amt 24 %sub:_(s32) = G_SUB %bw, %amt 25 %lshr:_(s32) = G_LSHR %b, %sub 26 %or:_(s32) = G_OR %shl, %lshr 27 $vgpr3 = COPY %or 28... 29 30--- 31name: fshl_v2i32 32tracksRegLiveness: true 33body: | 34 bb.0: 35 liveins: $vgpr0_vgpr1, $vgpr2_vgpr3, $vgpr4_vgpr5, $vgpr6_vgpr7 36 37 ; CHECK-LABEL: name: fshl_v2i32 38 ; CHECK: liveins: $vgpr0_vgpr1, $vgpr2_vgpr3, $vgpr4_vgpr5, $vgpr6_vgpr7 39 ; CHECK-NEXT: {{ $}} 40 ; CHECK-NEXT: %a:_(<2 x s32>) = COPY $vgpr0_vgpr1 41 ; CHECK-NEXT: %b:_(<2 x s32>) = COPY $vgpr2_vgpr3 42 ; CHECK-NEXT: %amt:_(<2 x s32>) = COPY $vgpr4_vgpr5 43 ; CHECK-NEXT: %or:_(<2 x s32>) = G_FSHL %a, %b, %amt(<2 x s32>) 44 ; CHECK-NEXT: $vgpr6_vgpr7 = COPY %or(<2 x s32>) 45 %a:_(<2 x s32>) = COPY $vgpr0_vgpr1 46 %b:_(<2 x s32>) = COPY $vgpr2_vgpr3 47 %amt:_(<2 x s32>) = COPY $vgpr4_vgpr5 48 %scalar_bw:_(s32) = G_CONSTANT i32 32 49 %bw:_(<2 x s32>) = G_BUILD_VECTOR %scalar_bw, %scalar_bw 50 %shl:_(<2 x s32>) = G_SHL %a, %amt 51 %sub:_(<2 x s32>) = G_SUB %bw, %amt 52 %lshr:_(<2 x s32>) = G_LSHR %b, %sub 53 %or:_(<2 x s32>) = G_OR %shl, %lshr 54 $vgpr6_vgpr7 = COPY %or 55... 56 57--- 58name: fshl_commute_i32 59tracksRegLiveness: true 60body: | 61 bb.0: 62 liveins: $vgpr0, $vgpr1, $vgpr2, $vgpr3 63 64 ; CHECK-LABEL: name: fshl_commute_i32 65 ; CHECK: liveins: $vgpr0, $vgpr1, $vgpr2, $vgpr3 66 ; CHECK-NEXT: {{ $}} 67 ; CHECK-NEXT: %a:_(s32) = COPY $vgpr0 68 ; CHECK-NEXT: %b:_(s32) = COPY $vgpr1 69 ; CHECK-NEXT: %amt:_(s32) = COPY $vgpr2 70 ; CHECK-NEXT: %or:_(s32) = G_FSHL %a, %b, %amt(s32) 71 ; CHECK-NEXT: $vgpr3 = COPY %or(s32) 72 %a:_(s32) = COPY $vgpr0 73 %b:_(s32) = COPY $vgpr1 74 %amt:_(s32) = COPY $vgpr2 75 %bw:_(s32) = G_CONSTANT i32 32 76 %shl:_(s32) = G_SHL %a, %amt 77 %sub:_(s32) = G_SUB %bw, %amt 78 %lshr:_(s32) = G_LSHR %b, %sub 79 %or:_(s32) = G_OR %lshr, %shl 80 $vgpr3 = COPY %or 81... 82 83--- 84name: fshr_i32 85tracksRegLiveness: true 86body: | 87 bb.0: 88 liveins: $vgpr0, $vgpr1, $vgpr2, $vgpr3 89 90 ; CHECK-LABEL: name: fshr_i32 91 ; CHECK: liveins: $vgpr0, $vgpr1, $vgpr2, $vgpr3 92 ; CHECK-NEXT: {{ $}} 93 ; CHECK-NEXT: %a:_(s32) = COPY $vgpr0 94 ; CHECK-NEXT: %b:_(s32) = COPY $vgpr1 95 ; CHECK-NEXT: %amt:_(s32) = COPY $vgpr2 96 ; CHECK-NEXT: %or:_(s32) = G_FSHR %a, %b, %amt(s32) 97 ; CHECK-NEXT: $vgpr3 = COPY %or(s32) 98 %a:_(s32) = COPY $vgpr0 99 %b:_(s32) = COPY $vgpr1 100 %amt:_(s32) = COPY $vgpr2 101 %bw:_(s32) = G_CONSTANT i32 32 102 %lshr:_(s32) = G_LSHR %b, %amt 103 %sub:_(s32) = G_SUB %bw, %amt 104 %shl:_(s32) = G_SHL %a, %sub 105 %or:_(s32) = G_OR %shl, %lshr 106 $vgpr3 = COPY %or 107... 108 109--- 110name: fsh_i32_const 111tracksRegLiveness: true 112body: | 113 bb.0: 114 liveins: $vgpr0, $vgpr1, $vgpr2 115 116 ; CHECK-LABEL: name: fsh_i32_const 117 ; CHECK: liveins: $vgpr0, $vgpr1, $vgpr2 118 ; CHECK-NEXT: {{ $}} 119 ; CHECK-NEXT: %a:_(s32) = COPY $vgpr0 120 ; CHECK-NEXT: %b:_(s32) = COPY $vgpr1 121 ; CHECK-NEXT: %amt1:_(s32) = G_CONSTANT i32 12 122 ; CHECK-NEXT: %or:_(s32) = G_FSHR %a, %b, %amt1(s32) 123 ; CHECK-NEXT: $vgpr2 = COPY %or(s32) 124 %a:_(s32) = COPY $vgpr0 125 %b:_(s32) = COPY $vgpr1 126 %amt0:_(s32) = G_CONSTANT i32 20 127 %amt1:_(s32) = G_CONSTANT i32 12 128 %shl:_(s32) = G_SHL %a, %amt0 129 %lshr:_(s32) = G_LSHR %b, %amt1 130 %or:_(s32) = G_OR %shl, %lshr 131 $vgpr2 = COPY %or 132... 133 134--- 135name: fsh_v2i32_const 136tracksRegLiveness: true 137body: | 138 bb.0: 139 liveins: $vgpr0_vgpr1, $vgpr2_vgpr3, $vgpr4_vgpr5 140 141 ; CHECK-LABEL: name: fsh_v2i32_const 142 ; CHECK: liveins: $vgpr0_vgpr1, $vgpr2_vgpr3, $vgpr4_vgpr5 143 ; CHECK-NEXT: {{ $}} 144 ; CHECK-NEXT: %a:_(<2 x s32>) = COPY $vgpr0_vgpr1 145 ; CHECK-NEXT: %b:_(<2 x s32>) = COPY $vgpr2_vgpr3 146 ; CHECK-NEXT: %scalar_amt1:_(s32) = G_CONSTANT i32 12 147 ; CHECK-NEXT: %amt1:_(<2 x s32>) = G_BUILD_VECTOR %scalar_amt1(s32), %scalar_amt1(s32) 148 ; CHECK-NEXT: %or:_(<2 x s32>) = G_FSHR %a, %b, %amt1(<2 x s32>) 149 ; CHECK-NEXT: $vgpr4_vgpr5 = COPY %or(<2 x s32>) 150 %a:_(<2 x s32>) = COPY $vgpr0_vgpr1 151 %b:_(<2 x s32>) = COPY $vgpr2_vgpr3 152 %scalar_amt0:_(s32) = G_CONSTANT i32 20 153 %amt0:_(<2 x s32>) = G_BUILD_VECTOR %scalar_amt0, %scalar_amt0 154 %scalar_amt1:_(s32) = G_CONSTANT i32 12 155 %amt1:_(<2 x s32>) = G_BUILD_VECTOR %scalar_amt1, %scalar_amt1 156 %shl:_(<2 x s32>) = G_SHL %a, %amt0 157 %lshr:_(<2 x s32>) = G_LSHR %b, %amt1 158 %or:_(<2 x s32>) = G_OR %shl, %lshr 159 $vgpr4_vgpr5 = COPY %or 160... 161 162--- 163name: fsh_i32_bad_const 164tracksRegLiveness: true 165body: | 166 bb.0: 167 liveins: $vgpr0, $vgpr1, $vgpr2 168 169 ; CHECK-LABEL: name: fsh_i32_bad_const 170 ; CHECK: liveins: $vgpr0, $vgpr1, $vgpr2 171 ; CHECK-NEXT: {{ $}} 172 ; CHECK-NEXT: %a:_(s32) = COPY $vgpr0 173 ; CHECK-NEXT: %b:_(s32) = COPY $vgpr1 174 ; CHECK-NEXT: %amt0:_(s32) = G_CONSTANT i32 20 175 ; CHECK-NEXT: %amt1:_(s32) = G_CONSTANT i32 11 176 ; CHECK-NEXT: %shl:_(s32) = G_SHL %a, %amt0(s32) 177 ; CHECK-NEXT: %lshr:_(s32) = G_LSHR %b, %amt1(s32) 178 ; CHECK-NEXT: %or:_(s32) = G_OR %shl, %lshr 179 ; CHECK-NEXT: $vgpr2 = COPY %or(s32) 180 %a:_(s32) = COPY $vgpr0 181 %b:_(s32) = COPY $vgpr1 182 %amt0:_(s32) = G_CONSTANT i32 20 183 %amt1:_(s32) = G_CONSTANT i32 11 184 %shl:_(s32) = G_SHL %a, %amt0 185 %lshr:_(s32) = G_LSHR %b, %amt1 186 %or:_(s32) = G_OR %shl, %lshr 187 $vgpr2 = COPY %or 188... 189 190--- 191name: fshl_i32_bad_bw 192tracksRegLiveness: true 193body: | 194 bb.0: 195 liveins: $vgpr0, $vgpr1, $vgpr2, $vgpr3 196 197 ; CHECK-LABEL: name: fshl_i32_bad_bw 198 ; CHECK: liveins: $vgpr0, $vgpr1, $vgpr2, $vgpr3 199 ; CHECK-NEXT: {{ $}} 200 ; CHECK-NEXT: %a:_(s32) = COPY $vgpr0 201 ; CHECK-NEXT: %b:_(s32) = COPY $vgpr1 202 ; CHECK-NEXT: %amt:_(s32) = COPY $vgpr2 203 ; CHECK-NEXT: %bw:_(s32) = G_CONSTANT i32 31 204 ; CHECK-NEXT: %shl:_(s32) = G_SHL %a, %amt(s32) 205 ; CHECK-NEXT: %sub:_(s32) = G_SUB %bw, %amt 206 ; CHECK-NEXT: %lshr:_(s32) = G_LSHR %b, %sub(s32) 207 ; CHECK-NEXT: %or:_(s32) = G_OR %shl, %lshr 208 ; CHECK-NEXT: $vgpr3 = COPY %or(s32) 209 %a:_(s32) = COPY $vgpr0 210 %b:_(s32) = COPY $vgpr1 211 %amt:_(s32) = COPY $vgpr2 212 %bw:_(s32) = G_CONSTANT i32 31 213 %shl:_(s32) = G_SHL %a, %amt 214 %sub:_(s32) = G_SUB %bw, %amt 215 %lshr:_(s32) = G_LSHR %b, %sub 216 %or:_(s32) = G_OR %shl, %lshr 217 $vgpr3 = COPY %or 218... 219 220--- 221name: fshl_i32_bad_amt_reg 222tracksRegLiveness: true 223body: | 224 bb.0: 225 liveins: $vgpr0, $vgpr1, $vgpr2, $vgpr3, $vgpr4 226 227 ; CHECK-LABEL: name: fshl_i32_bad_amt_reg 228 ; CHECK: liveins: $vgpr0, $vgpr1, $vgpr2, $vgpr3, $vgpr4 229 ; CHECK-NEXT: {{ $}} 230 ; CHECK-NEXT: %a:_(s32) = COPY $vgpr0 231 ; CHECK-NEXT: %b:_(s32) = COPY $vgpr1 232 ; CHECK-NEXT: %amt:_(s32) = COPY $vgpr2 233 ; CHECK-NEXT: %amt1:_(s32) = COPY $vgpr3 234 ; CHECK-NEXT: %bw:_(s32) = G_CONSTANT i32 32 235 ; CHECK-NEXT: %shl:_(s32) = G_SHL %a, %amt(s32) 236 ; CHECK-NEXT: %sub:_(s32) = G_SUB %bw, %amt1 237 ; CHECK-NEXT: %lshr:_(s32) = G_LSHR %b, %sub(s32) 238 ; CHECK-NEXT: %or:_(s32) = G_OR %shl, %lshr 239 ; CHECK-NEXT: $vgpr4 = COPY %or(s32) 240 %a:_(s32) = COPY $vgpr0 241 %b:_(s32) = COPY $vgpr1 242 %amt:_(s32) = COPY $vgpr2 243 %amt1:_(s32) = COPY $vgpr3 244 %bw:_(s32) = G_CONSTANT i32 32 245 %shl:_(s32) = G_SHL %a, %amt 246 %sub:_(s32) = G_SUB %bw, %amt1 247 %lshr:_(s32) = G_LSHR %b, %sub 248 %or:_(s32) = G_OR %shl, %lshr 249 $vgpr4 = COPY %or 250... 251